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20 | 20 | zephyr,flash-controller = &iap; |
21 | 21 | }; |
22 | 22 |
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23 | | - aliases{ |
| 23 | + aliases { |
24 | 24 | led0 = &red_led; |
25 | 25 | led1 = &green_led; |
26 | 26 | led2 = &blue_led; |
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82 | 82 | gpio-map-mask = <0xffffffff 0xffffffc0>; |
83 | 83 | gpio-map-pass-thru = <0 0x3f>; |
84 | 84 | gpio-map = /* Not a GPIO*/ /* AN */ |
85 | | - /* Not a GPIO*/ /* RST */ |
86 | | - <2 0 &gpio0 8 0>, /* CS */ |
87 | | - <3 0 &gpio0 10 0>, /* SCK */ |
88 | | - <4 0 &gpio0 7 0>, /* MISO */ |
89 | | - <5 0 &gpio0 6 0>, /* MOSI */ |
90 | | - <6 0 &gpio0 15 0>, /* PWM */ |
91 | | - <7 0 &gpio0 16 0>, /* INT */ |
92 | | - <8 0 &gpio0 3 0>, /* RX */ |
93 | | - <9 0 &gpio0 2 0>, /* TX */ |
94 | | - <10 0 &gpio0 14 0>, /* SCL */ |
95 | | - <11 0 &gpio0 13 0>; /* SDA */ |
| 85 | + /* Not a GPIO*/ /* RST */ |
| 86 | + <2 0 &gpio0 8 0>, /* CS */ |
| 87 | + <3 0 &gpio0 10 0>, /* SCK */ |
| 88 | + <4 0 &gpio0 7 0>, /* MISO */ |
| 89 | + <5 0 &gpio0 6 0>, /* MOSI */ |
| 90 | + <6 0 &gpio0 15 0>, /* PWM */ |
| 91 | + <7 0 &gpio0 16 0>, /* INT */ |
| 92 | + <8 0 &gpio0 3 0>, /* RX */ |
| 93 | + <9 0 &gpio0 2 0>, /* TX */ |
| 94 | + <10 0 &gpio0 14 0>, /* SCL */ |
| 95 | + <11 0 &gpio0 13 0>; /* SDA */ |
96 | 96 | }; |
97 | 97 |
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98 | 98 | arduino_header: arduino-connector { |
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101 | 101 | gpio-map-mask = <0xffffffff 0xffffffc0>; |
102 | 102 | gpio-map-pass-thru = <0 0x3f>; |
103 | 103 | gpio-map = <ARDUINO_HEADER_R3_A0 0 &gpio0 16 0>, |
104 | | - <ARDUINO_HEADER_R3_A1 0 &gpio0 19 0>, |
105 | | - <ARDUINO_HEADER_R3_A2 0 &gpio0 22 0>, |
106 | | - <ARDUINO_HEADER_R3_A3 0 &gpio0 20 0>, |
107 | | - <ARDUINO_HEADER_R3_A4 0 &gpio0 13 0>, |
108 | | - <ARDUINO_HEADER_R3_A5 0 &gpio0 14 0>, |
109 | | - <ARDUINO_HEADER_R3_D0 0 &gpio0 2 0>, |
110 | | - <ARDUINO_HEADER_R3_D1 0 &gpio0 3 0>, |
111 | | - <ARDUINO_HEADER_R3_D2 0 &gpio0 21 0>, |
112 | | - <ARDUINO_HEADER_R3_D3 0 &gpio0 18 0>, |
113 | | - <ARDUINO_HEADER_R3_D4 0 &gpio0 0 0>, |
114 | | - <ARDUINO_HEADER_R3_D5 0 &gpio0 9 0>, |
115 | | - <ARDUINO_HEADER_R3_D6 0 &gpio0 4 0>, |
116 | | - <ARDUINO_HEADER_R3_D7 0 &gpio0 1 0>, |
117 | | - <ARDUINO_HEADER_R3_D8 0 &gpio0 0 0>, /* D8 is not connected */ |
118 | | - <ARDUINO_HEADER_R3_D9 0 &gpio0 15 0>, |
119 | | - <ARDUINO_HEADER_R3_D10 0 &gpio0 8 0>, |
120 | | - <ARDUINO_HEADER_R3_D11 0 &gpio0 6 0>, |
121 | | - <ARDUINO_HEADER_R3_D12 0 &gpio0 7 0>, |
122 | | - <ARDUINO_HEADER_R3_D13 0 &gpio0 10 0>, |
123 | | - <ARDUINO_HEADER_R3_D14 0 &gpio0 13 0>, |
124 | | - <ARDUINO_HEADER_R3_D15 0 &gpio0 14 0>; |
| 104 | + <ARDUINO_HEADER_R3_A1 0 &gpio0 19 0>, |
| 105 | + <ARDUINO_HEADER_R3_A2 0 &gpio0 22 0>, |
| 106 | + <ARDUINO_HEADER_R3_A3 0 &gpio0 20 0>, |
| 107 | + <ARDUINO_HEADER_R3_A4 0 &gpio0 13 0>, |
| 108 | + <ARDUINO_HEADER_R3_A5 0 &gpio0 14 0>, |
| 109 | + <ARDUINO_HEADER_R3_D0 0 &gpio0 2 0>, |
| 110 | + <ARDUINO_HEADER_R3_D1 0 &gpio0 3 0>, |
| 111 | + <ARDUINO_HEADER_R3_D2 0 &gpio0 21 0>, |
| 112 | + <ARDUINO_HEADER_R3_D3 0 &gpio0 18 0>, |
| 113 | + <ARDUINO_HEADER_R3_D4 0 &gpio0 0 0>, |
| 114 | + <ARDUINO_HEADER_R3_D5 0 &gpio0 9 0>, |
| 115 | + <ARDUINO_HEADER_R3_D6 0 &gpio0 4 0>, |
| 116 | + <ARDUINO_HEADER_R3_D7 0 &gpio0 1 0>, |
| 117 | + <ARDUINO_HEADER_R3_D8 0 &gpio0 0 0>, /* D8 is not connected */ |
| 118 | + <ARDUINO_HEADER_R3_D9 0 &gpio0 15 0>, |
| 119 | + <ARDUINO_HEADER_R3_D10 0 &gpio0 8 0>, |
| 120 | + <ARDUINO_HEADER_R3_D11 0 &gpio0 6 0>, |
| 121 | + <ARDUINO_HEADER_R3_D12 0 &gpio0 7 0>, |
| 122 | + <ARDUINO_HEADER_R3_D13 0 &gpio0 10 0>, |
| 123 | + <ARDUINO_HEADER_R3_D14 0 &gpio0 13 0>, |
| 124 | + <ARDUINO_HEADER_R3_D15 0 &gpio0 14 0>; |
125 | 125 | }; |
126 | 126 | }; |
127 | 127 |
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