samples: drivers: spi_flash: Use valid addresses/sizes for dual-flash

When a board contains two identical flash memories configured in
parallel dual-flash mode, the actual sector size is twice the sector
size of a single flash memory. So, assuming 4-KiB sectors for each flash
memory, any erase operation must be 8-KiB aligned.

This commit updates the start offset and sector size in the spi_flash
sample to be properly aligned when a dual-flash configuration is used.

At the moment, this is only supported for STM32-based boards and QSPI
flash memories.

Signed-off-by: Thomas Altenbach <[email protected]>

Author: taltenbach

samples/drivers/spi_flash/src/main.c

@@ -23,11 +23,15 @@
 #define SPI_FLASH_TEST_REGION_OFFSET 0x7F000
 #elif defined(CONFIG_BOARD_EK_RA8M1) || defined(CONFIG_BOARD_EK_RA8D1)
 #define SPI_FLASH_TEST_REGION_OFFSET 0x40000
+#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32_qspi_nor) && DT_PROP(DT_NODELABEL(quadspi), dual_flash)
+#define SPI_FLASH_TEST_REGION_OFFSET 0xfe000
 #else
 #define SPI_FLASH_TEST_REGION_OFFSET 0xff000
 #endif
 #if defined(CONFIG_BOARD_EK_RA8M1) || defined(CONFIG_BOARD_EK_RA8D1)
 #define SPI_FLASH_SECTOR_SIZE 262144
+#elif DT_HAS_COMPAT_STATUS_OKAY(st_stm32_qspi_nor) && DT_PROP(DT_NODELABEL(quadspi), dual_flash)
+#define SPI_FLASH_SECTOR_SIZE 8192
 #else
 #define SPI_FLASH_SECTOR_SIZE        4096
 #endif