drivers: gpio: GPIO driver updates to support PSC3

sreeramIfx · fabiobaltieri · commit ba144130ceb3 · 2025-08-04T19:57:57.000+01:00
Update GPIO driver to support PSC3

Signed-off-by: Sreeram Tatapudi &lt;sreeram.praveen@infineon.com&gt;
diff --git a/boards/infineon/kit_psc3m5_evk/kit_psc3m5_evk_defconfig b/boards/infineon/kit_psc3m5_evk/kit_psc3m5_evk_defconfig
@@ -7,3 +7,6 @@
 CONFIG_ARM_MPU=y
 CONFIG_HW_STACK_PROTECTION=y
 CONFIG_TRUSTED_EXECUTION_SECURE=y
+
+# Enable GPIO driver
+CONFIG_GPIO=y
diff --git a/boards/infineon/kit_psc3m5_evk/kit_psc3m5_evk_psc3m5fds2afq1_ns_defconfig b/boards/infineon/kit_psc3m5_evk/kit_psc3m5_evk_psc3m5fds2afq1_ns_defconfig
@@ -8,3 +8,6 @@ CONFIG_ARM_MPU=y
 CONFIG_HW_STACK_PROTECTION=y
 
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y
+
+# Enable GPIO driver
+CONFIG_GPIO=y
diff --git a/drivers/gpio/gpio_ifx_cat1.c b/drivers/gpio/gpio_ifx_cat1.c
@@ -93,7 +93,11 @@ static int gpio_cat1_configure(const struct device *dev, gpio_pin_t pin, gpio_fl
 		return -ENOTSUP;
 	}
 
+#if defined(CY_PDL_TZ_ENABLED)
+	Cy_GPIO_Pin_SecFastInit(base, pin, drive_mode, pin_val, HSIOM_SEL_GPIO);
+#else
 	Cy_GPIO_Pin_FastInit(base, pin, drive_mode, pin_val, HSIOM_SEL_GPIO);
+#endif /* defined(CY_PDL_TZ_ENABLED) */
 
 	return 0;
 }

Original file line number	Diff line number	Diff line change
`@@ -93,7 +93,11 @@ static int gpio_cat1_configure(const struct device *dev, gpio_pin_t pin, gpio_fl`
`93`	`93`	`return -ENOTSUP;`
`94`	`94`	`}`
`95`	`95`
	`96`	`+#if defined(CY_PDL_TZ_ENABLED)`
	`97`	`+ Cy_GPIO_Pin_SecFastInit(base, pin, drive_mode, pin_val, HSIOM_SEL_GPIO);`
	`98`	`+#else`
`96`	`99`	`Cy_GPIO_Pin_FastInit(base, pin, drive_mode, pin_val, HSIOM_SEL_GPIO);`
	`100`	`+#endif /* defined(CY_PDL_TZ_ENABLED) */`
`97`	`101`
`98`	`102`	`return 0;`
`99`	`103`	`}`