9696#define LVTS_MSR_READ_TIMEOUT_US 400
9797#define LVTS_MSR_READ_WAIT_US (LVTS_MSR_READ_TIMEOUT_US / 2)
9898
99- #define LVTS_HW_RESET_TEMP 125000
100-
10199#define LVTS_MINIMUM_THRESHOLD 20000
102100
103101static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT ;
@@ -138,7 +136,6 @@ struct lvts_data {
138136 int temp_offset ;
139137 int gt_calib_bit_offset ;
140138 unsigned int def_calibration ;
141- bool irq_enable ;
142139};
143140
144141struct lvts_sensor {
@@ -156,7 +153,6 @@ struct lvts_ctrl {
156153 const struct lvts_data * lvts_data ;
157154 u32 calibration [LVTS_SENSOR_MAX ];
158155 u8 valid_sensor_mask ;
159- u32 hw_reset_raw_temp ;
160156 int mode ;
161157 void __iomem * base ;
162158 int low_thresh ;
@@ -416,9 +412,6 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high)
416412 }
417413 lvts_update_irq_mask (lvts_ctrl );
418414
419- if (!lvts_data -> irq_enable )
420- return 0 ;
421-
422415 if (!should_update_thresh )
423416 return 0 ;
424417
@@ -868,14 +861,6 @@ static int lvts_ctrl_init(struct device *dev, struct lvts_domain *lvts_td,
868861 */
869862 lvts_ctrl [i ].mode = lvts_data -> lvts_ctrl [i ].mode ;
870863
871- /*
872- * The temperature to raw temperature must be done
873- * after initializing the calibration.
874- */
875- lvts_ctrl [i ].hw_reset_raw_temp =
876- lvts_temp_to_raw (LVTS_HW_RESET_TEMP ,
877- lvts_data -> temp_factor );
878-
879864 lvts_ctrl [i ].low_thresh = INT_MIN ;
880865 lvts_ctrl [i ].high_thresh = INT_MIN ;
881866 }
@@ -932,13 +917,12 @@ static void lvts_write_config(struct lvts_ctrl *lvts_ctrl, const u32 *cmds, int
932917 */
933918 for (i = 0 ; i < nr_cmds ; i ++ ) {
934919 writel (cmds [i ], LVTS_CONFIG (lvts_ctrl -> base ));
935- usleep_range (5 , 15 );
920+ usleep_range (2 , 4 );
936921 }
937922}
938923
939924static int lvts_irq_init (struct lvts_ctrl * lvts_ctrl )
940925{
941- const struct lvts_data * lvts_data = lvts_ctrl -> lvts_data ;
942926 /*
943927 * LVTS_PROTCTL : Thermal Protection Sensor Selection
944928 *
@@ -972,12 +956,8 @@ static int lvts_irq_init(struct lvts_ctrl *lvts_ctrl)
972956 * The LVTS_MONINT register layout is the same as the LVTS_MONINTSTS
973957 * register, except we set the bits to enable the interrupt.
974958 */
975- if (lvts_data -> irq_enable ) {
976- writel (0 , LVTS_MONINT (lvts_ctrl -> base ));
977- } else {
978- writel (BIT (16 ), LVTS_PROTCTL (lvts_ctrl -> base ));
979- writel (lvts_ctrl -> hw_reset_raw_temp , LVTS_PROTTC (lvts_ctrl -> base ));
980- }
959+ writel (0 , LVTS_MONINT (lvts_ctrl -> base ));
960+
981961 return 0 ;
982962}
983963
@@ -1360,11 +1340,9 @@ static int lvts_probe(struct platform_device *pdev)
13601340 if (IS_ERR (lvts_td -> reset ))
13611341 return dev_err_probe (dev , PTR_ERR (lvts_td -> reset ), "Failed to get reset control\n" );
13621342
1363- if (lvts_data -> irq_enable ) {
1364- irq = platform_get_irq (pdev , 0 );
1365- if (irq < 0 )
1366- return irq ;
1367- }
1343+ irq = platform_get_irq (pdev , 0 );
1344+ if (irq < 0 )
1345+ return irq ;
13681346
13691347 golden_temp_offset = lvts_data -> temp_offset ;
13701348
@@ -1376,12 +1354,10 @@ static int lvts_probe(struct platform_device *pdev)
13761354 * At this point the LVTS is initialized and enabled. We can
13771355 * safely enable the interrupt.
13781356 */
1379- if (lvts_data -> irq_enable ) {
1380- ret = devm_request_threaded_irq (dev , irq , NULL , lvts_irq_handler ,
1381- IRQF_ONESHOT , dev_name (dev ), lvts_td );
1382- if (ret )
1383- return dev_err_probe (dev , ret , "Failed to request interrupt\n" );
1384- }
1357+ ret = devm_request_threaded_irq (dev , irq , NULL , lvts_irq_handler ,
1358+ IRQF_ONESHOT , dev_name (dev ), lvts_td );
1359+ if (ret )
1360+ return dev_err_probe (dev , ret , "Failed to request interrupt\n" );
13851361
13861362 platform_set_drvdata (pdev , lvts_td );
13871363
@@ -1823,7 +1799,6 @@ static const struct lvts_data mt7988_lvts_ap_data = {
18231799 .temp_factor = LVTS_COEFF_A_MT7988 ,
18241800 .temp_offset = LVTS_COEFF_B_MT7988 ,
18251801 .gt_calib_bit_offset = 24 ,
1826- .irq_enable = true,
18271802};
18281803
18291804static const struct lvts_data mt8186_lvts_data = {
@@ -1837,7 +1812,6 @@ static const struct lvts_data mt8186_lvts_data = {
18371812 .temp_offset = LVTS_COEFF_B_MT7988 ,
18381813 .gt_calib_bit_offset = 24 ,
18391814 .def_calibration = 19000 ,
1840- .irq_enable = true,
18411815};
18421816
18431817static const struct lvts_data mt8188_lvts_mcu_data = {
@@ -1851,7 +1825,6 @@ static const struct lvts_data mt8188_lvts_mcu_data = {
18511825 .temp_offset = LVTS_COEFF_B_MT8195 ,
18521826 .gt_calib_bit_offset = 20 ,
18531827 .def_calibration = 35000 ,
1854- .irq_enable = true,
18551828};
18561829
18571830static const struct lvts_data mt8188_lvts_ap_data = {
@@ -1865,7 +1838,6 @@ static const struct lvts_data mt8188_lvts_ap_data = {
18651838 .temp_offset = LVTS_COEFF_B_MT8195 ,
18661839 .gt_calib_bit_offset = 20 ,
18671840 .def_calibration = 35000 ,
1868- .irq_enable = true,
18691841};
18701842
18711843static const struct lvts_data mt8192_lvts_mcu_data = {
@@ -1879,7 +1851,6 @@ static const struct lvts_data mt8192_lvts_mcu_data = {
18791851 .temp_offset = LVTS_COEFF_B_MT8195 ,
18801852 .gt_calib_bit_offset = 24 ,
18811853 .def_calibration = 35000 ,
1882- .irq_enable = true,
18831854};
18841855
18851856static const struct lvts_data mt8192_lvts_ap_data = {
@@ -1893,7 +1864,6 @@ static const struct lvts_data mt8192_lvts_ap_data = {
18931864 .temp_offset = LVTS_COEFF_B_MT8195 ,
18941865 .gt_calib_bit_offset = 24 ,
18951866 .def_calibration = 35000 ,
1896- .irq_enable = true,
18971867};
18981868
18991869static const struct lvts_data mt8195_lvts_mcu_data = {
@@ -1907,7 +1877,6 @@ static const struct lvts_data mt8195_lvts_mcu_data = {
19071877 .temp_offset = LVTS_COEFF_B_MT8195 ,
19081878 .gt_calib_bit_offset = 24 ,
19091879 .def_calibration = 35000 ,
1910- .irq_enable = true,
19111880};
19121881
19131882static const struct lvts_data mt8195_lvts_ap_data = {
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