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Unconditional constraint biases distribution, ignoring vsc.dist preference #243

@silobadTT

Description

@silobadTT

Hey,

I am observing that an unconditional not_inside constraint on a random variable (r_fmt_in) is causing its vsc.dist preference to be ignored, resulting in a heavily skewed distribution.

To isolate this, I created two test classes:

  • RandOpsA: Applies a dist for a uniform distribution over many formats, but also has a hard, unconditional constraint that r_fmt_in cannot be an MX format.
  • RandOpsB: The control case, which is identical but lacks the unconditional not_inside constraint.

My expectation is that RandOpsA should produce a uniform distribution among the remaining non-MX formats. However, the results show a significant bias towards Float32. This suggests the solver is finding an "easy" solution path (likely by satisfying a downstream constraint first and working backward) and is not honoring the dist preference, even when the r_disable_mx variable and if_then logic are removed from the equation. I am following the ongoing issue #242 , which is why I included the solve_order constraint to ensure that the variables are getting 'swizzled/randomized'.


Code to Reproduce

This self-contained script profiles both classes and prints the resulting distributions.

pyvsc_test.py

RandOpsA:

Distribution for: r_disable_mx
    - 0 : 158   ( 52.67%) ##########################
    - 1 : 142   ( 47.33%) #######################

Distribution for: r_fmt_in
    - Float32   : 152   ( 50.67%) #########################
    - Fp8e5m2   : 18    (  6.00%) ###
    - Int16     : 18    (  6.00%) ###
    - Int32     : 18    (  6.00%) ###
    - Int8      : 18    (  6.00%) ###
    - Float16   : 17    (  5.67%) ##
    - Fp8e4m3   : 15    (  5.00%) ##
    - Tf32      : 15    (  5.00%) ##
    - Uint8     : 15    (  5.00%) ##
    - Float16_b : 14    (  4.67%) ##

RandOpsB (without 'if_then' constraint):

Distribution for: r_disable_mx
    - 0 : 158   ( 52.67%) ##########################
    - 1 : 142   ( 47.33%) #######################

Distribution for: r_fmt_in
    - Fp8e5m2   : 22    (  7.33%) ###
    - MXFp6e2m3 : 21    (  7.00%) ###
    - Int16     : 20    (  6.67%) ###
    - Fp8e4m3   : 19    (  6.33%) ###
    - Float16_b : 18    (  6.00%) ###
    - MXFp4e2m1 : 18    (  6.00%) ###
    - Tf32      : 18    (  6.00%) ###
    - Uint8     : 18    (  6.00%) ###
    - Int8      : 17    (  5.67%) ##
    - MXFp8e4m3 : 17    (  5.67%) ##
    - MXFp8e5m2 : 17    (  5.67%) ##
    - MXInt8    : 16    (  5.33%) ##
    - Float16   : 14    (  4.67%) ##
    - MXFp6e3m2 : 14    (  4.67%) ##
    - MXInt2    : 14    (  4.67%) ##
    - Float32   : 13    (  4.33%) ##
    - Int32     : 13    (  4.33%) ##
    - MXInt4    : 11    (  3.67%) #

The isolated case is misleading; I can obviously take the MX formats out of the vsc.dist() constraint, but the end-goal is to have the constraint look as follows with an if_then statement:

@vsc.constraint
  def c_disable_mx_op_in(self):
    vsc.solve_order(self.r_disable_mx, self.r_fmt_in)
    with vsc.if_then(self.r_disable_mx == 1):
      self.r_fmt_in.not_inside(vsc.rangelist(
        FormatType.MXInt8,
        FormatType.MXInt4,
        FormatType.MXInt2,
        FormatType.MXFp8e5m2,
        FormatType.MXFp8e4m3,
        FormatType.MXFp6e3m2,
        FormatType.MXFp6e2m3,
        FormatType.MXFp4e2m1,
      ))

... but the issue that I am describing persists and I wanted to make the directed case as simple as possible

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