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amergnatnashif
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tests: protection: add riscv support
Execute tests are disabled for RISC-V because is isn't able to set an execution restriction. From RISC-V documentation: "Instruction address-translation and protection are unaffected by the setting of MPRV" MPRV is used to apply memory protection restriction when CPU is running in machine mode (kernel). Signed-off-by: Alexandre Mergnat <[email protected]>
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tests/kernel/mem_protect/protection/src/main.c

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#define SKIP_EXECUTE_TESTS
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#endif
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/* RISC-V have no mechanism to restrict execution */
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#if defined(CONFIG_RISCV)
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#define SKIP_EXECUTE_TESTS
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#endif
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#define INFO(fmt, ...) printk(fmt, ##__VA_ARGS__)
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void k_sys_fatal_error_handler(unsigned int reason, const z_arch_esf_t *pEsf)

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