drivers: gpio_esp32: added support for esp32c3

in the gpio drivers and pinmux for esp32 chip series

Signed-off-by: Felipe Neves <[email protected]>

Author: Felipe Neves

boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts

@@ -17,6 +17,18 @@
 		zephyr,console = &uart0;
 		zephyr,shell-uart = &uart0;
 	};
+
+	aliases {
+		sw0 = &user_button1;
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+		user_button1: button_1 {
+			label = "User SW1";
+			gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+		};
+	};
 };
 
 &uart0 {
@@ -27,3 +39,6 @@
 &trng0 {
 	status = "okay";
 };
+&gpio0 {
+	status = "okay";
+};

boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig

@@ -10,3 +10,7 @@ CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
 CONFIG_UART_ROM_ESP32C3=y
 CONFIG_XIP=n
+CONFIG_PINMUX=y
+CONFIG_PINMUX_ESP32=y
+CONFIG_GPIO=y
+CONFIG_GPIO_ESP32=y

drivers/gpio/Kconfig.esp32

@@ -5,7 +5,7 @@
 
 menuconfig GPIO_ESP32
 	bool "ESP32 GPIO"
-	depends on SOC_ESP32 || SOC_ESP32S2
+	depends on SOC_ESP32 || SOC_ESP32S2 || SOC_ESP32C3
 	help
 	  Enables the ESP32 GPIO driver
 
@@ -19,7 +19,8 @@ config GPIO_ESP32_0
 
 config GPIO_ESP32_1
 	bool "ESP32 GPIO (pins 32-39)"
-	default y
+	default y if SOC_ESP32 || SOC_ESP32S2
+	default n if SOC_ESP32C3
 	help
 	  Include support for GPIO pins 32-39 on the ESP32.
 

drivers/gpio/gpio_esp32.c

@@ -8,7 +8,9 @@
 #define DT_DRV_COMPAT espressif_esp32_gpio
 
 /* Include esp-idf headers first to avoid redefining BIT() macro */
+#ifndef CONFIG_SOC_ESP32C3
 #include <soc/dport_reg.h>
+#endif
 #include <soc/gpio_reg.h>
 #include <soc/io_mux_reg.h>
 #include <soc/soc.h>
@@ -18,7 +20,11 @@
 #include <errno.h>
 #include <device.h>
 #include <drivers/gpio.h>
+#ifdef CONFIG_SOC_ESP32C3
+#include <drivers/interrupt_controller/intc_esp32c3.h>
+#else
 #include <drivers/interrupt_controller/intc_esp32.h>
+#endif
 #include <kernel.h>
 #include <sys/util.h>
 #include <drivers/pinmux.h>
@@ -30,6 +36,20 @@ LOG_MODULE_REGISTER(gpio_esp32, CONFIG_LOG_DEFAULT_LEVEL);
 
 #define DEV_CFG(_dev) ((struct gpio_esp32_config *const)(_dev)->config)
 
+#ifdef CONFIG_SOC_ESP32C3
+/* gpio structs in esp32c3 series are diferent from xtensa ones */
+#define out out.data
+#define in in.data
+#define out_w1ts out_w1ts.val
+#define out_w1tc out_w1tc.val
+/* arch_curr_cpu() is not available for riscv based chips */
+#define CPU_ID()  0
+#define ISR_HANDLER isr_handler_t
+#else 
+#define CPU_ID() arch_curr_cpu()->id
+#define ISR_HANDLER intr_handler_t
+#endif
+
 struct gpio_esp32_config {
 	/* gpio_driver_config needs to be first */
 	struct gpio_driver_config drv_cfg;
@@ -144,8 +164,10 @@ static int gpio_esp32_port_get_raw(const struct device *port, uint32_t *value)
 
 	if (cfg->gpio_port0) {
 		*value = cfg->gpio_dev->in;
+#if defined(CONFIG_GPIO_ESP32_1)
 	} else {
 		*value = cfg->gpio_dev->in1.data;
+#endif
 	}
 
 	return 0;
@@ -160,8 +182,10 @@ static int gpio_esp32_port_set_masked_raw(const struct device *port,
 
 	if (cfg->gpio_port0) {
 		cfg->gpio_dev->out = (cfg->gpio_dev->out & ~mask) | (mask & value);
+#if defined(CONFIG_GPIO_ESP32_1)
 	} else {
 		cfg->gpio_dev->out1.data = (cfg->gpio_dev->out1.data & ~mask) | (mask & value);
+#endif
 	}
 
 	irq_unlock(key);
@@ -176,8 +200,10 @@ static int gpio_esp32_port_set_bits_raw(const struct device *port,
 
 	if (cfg->gpio_port0) {
 		cfg->gpio_dev->out_w1ts = pins;
+#if defined(CONFIG_GPIO_ESP32_1)
 	} else {
 		cfg->gpio_dev->out1_w1ts.data = pins;
+#endif
 	}
 
 	return 0;
@@ -190,8 +216,10 @@ static int gpio_esp32_port_clear_bits_raw(const struct device *port,
 
 	if (cfg->gpio_port0) {
 		cfg->gpio_dev->out_w1tc = pins;
+#if defined(CONFIG_GPIO_ESP32_1)
 	} else {
 		cfg->gpio_dev->out1_w1tc.data = pins;
+#endif
 	}
 
 	return 0;
@@ -205,8 +233,10 @@ static int gpio_esp32_port_toggle_bits(const struct device *port,
 
 	if (cfg->gpio_port0) {
 		cfg->gpio_dev->out ^= pins;
+#if defined(CONFIG_GPIO_ESP32_1)
 	} else {
 		cfg->gpio_dev->out1.data ^= pins;
+#endif
 	}
 
 	irq_unlock(key);
@@ -281,7 +311,7 @@ static uint32_t gpio_esp32_get_pending_int(const struct device *dev)
 {
 	struct gpio_esp32_config *const cfg = DEV_CFG(dev);
 	uint32_t irq_status;
-	uint32_t const core_id = arch_curr_cpu()->id;
+	uint32_t const core_id = CPU_ID();
 
 #if defined(CONFIG_GPIO_ESP32_1)
 	gpio_ll_get_intr_status_high(cfg->gpio_base, core_id, &irq_status);
@@ -296,7 +326,7 @@ static void IRAM_ATTR gpio_esp32_fire_callbacks(const struct device *dev)
 	struct gpio_esp32_config *const cfg = DEV_CFG(dev);
 	struct gpio_esp32_data *data = dev->data;
 	uint32_t irq_status;
-	uint32_t const core_id = arch_curr_cpu()->id;
+	uint32_t const core_id = CPU_ID();
 
 #if defined(CONFIG_GPIO_ESP32_1)
 	gpio_ll_get_intr_status_high(cfg->gpio_base, core_id, &irq_status);
@@ -327,7 +357,7 @@ static int gpio_esp32_init(const struct device *dev)
 	}
 
 	if (!isr_connected) {
-		esp_intr_alloc(DT_IRQN(DT_NODELABEL(gpio0)), 0, gpio_esp32_isr, (void *)dev, NULL);
+		esp_intr_alloc(DT_IRQN(DT_NODELABEL(gpio0)), 0, (ISR_HANDLER)gpio_esp32_isr, (void *)dev, NULL);
 		isr_connected = true;
 	}
 

drivers/pinmux/Kconfig.esp32

@@ -5,6 +5,6 @@
 
 config PINMUX_ESP32
 	bool "ESP32 Pin multiplexer driver"
-	depends on SOC_ESP32 || SOC_ESP32S2
+	depends on SOC_ESP32 || SOC_ESP32S2 || SOC_ESP32C3
 	help
 	  Enable driver for ESP32 Pin multiplexer.

dts/riscv/espressif/esp32c3.dtsi

@@ -4,6 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 #include <mem.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/esp-esp32c3-intmux.h>
 
 / {
@@ -35,6 +36,11 @@
 			reg = <0x3fc7c000 0x50000>;
 		};
 
+		pinmux: pinmux@60009000 {
+			compatible = "espressif,esp32-pinmux";
+			reg = <0x60009000 0x94>;
+		};
+
 		intc: interrupt-controller@600c2000 {
 			#interrupt-cells = <1>;
 			compatible = "espressif,esp32-intc";
@@ -53,6 +59,17 @@
 			status = "okay";
 		};
 
+		gpio0: gpio@60004000 {
+			compatible = "espressif,esp32-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			reg = <0x60004000 0x800>;
+			interrupts = <GPIO_INTR_SOURCE>;
+			interrupt-parent = <&intc>;
+			label = "GPIO_0";
+			ngpios = <32>;   /* 0..31 */
+		};
+
 		uart0: uart@60000000 {
 			compatible = "espressif,esp32c3-uart";
 			reg = <0x60000000 0x400>;