@@ -184,19 +184,35 @@ We'd better define the constants that set the catchup delay and timeout duration
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```
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<!-- Tick -->
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- Implement ` SioTick ` to update the timeout and ` SioAbort ` to cancel the ongoing transfer :
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+ Implement the timeout logic in ` SioTick ` :
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``` rgbasm,linenos,start={{#line_no_of "" ../../unbricked/serial-link/sio.asm:sio-tick}}
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{{#include ../../unbricked/serial-link/sio.asm:sio-tick}}
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```
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- Check that a transfer has been started, and that the clock source is set to * external* .
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- Before * ticking* the timer, check that the timer hasn't already expired with ` and a, a ` .
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- Do nothing if the timer value is already zero.
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- Decrement the timer and save the new value before jumping to ` SioAbort ` if new value is zero.
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+ ` SioTick ` checks the current state (` wSioState ` ) and jumps to a state-specific subroutine (labelled ` *_tick ` ).
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+
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+ ** ` SIO_ACTIVE ` :** a transfer has been started, if the clock source is * external* , update the timeout timer.
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+
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+ The timer's state is an unsigned integer stored in ` wSioTimer ` .
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+ Check that the timer is active (has a non-zero value) with ` and a, a ` .
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+ Decrement the timer and write the new value back to memory.
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+ If the timer expired (the new value is zero) the transfer should be aborted.
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+ The ` dec ` instruction sets the zero flag in that case, so all we have to do is ` jr z, SioAbort ` .
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+
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+ ** ` SIO_RESET ` :** ` SioReset ` has been called, change state to ` SIO_IDLE ` .
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+ This causes a one tick delay after ` SioReset ` is called.
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+
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+ <!-- Abort -->
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+ ``` rgbasm,linenos,start={{#line_no_of "" ../../unbricked/serial-link/sio.asm:sio-abort}}
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+ {{#include ../../unbricked/serial-link/sio.asm:sio-abort}}
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+ ```
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+
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+ ` SioAbort ` brings the serial port down and sets the current state to ` SIO_FAILED ` .
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+ The aborted transfer state is intentionally left intact (or as intact as it was, at least) so it can be used to inform error handling and debugging.
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<!-- PortEnd -->
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- The last part of the core implementation handles the end of a transfer:
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+ The last part of the core implementation handles the end of each byte transfer:
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``` rgbasm,linenos,start={{#line_no_of "" ../../unbricked/serial-link/sio.asm:sio-port-end}}
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{{#include ../../unbricked/serial-link/sio.asm:sio-port-end}}
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