|
1 | 1 | # Command Packet Transfers
|
2 | 2 |
|
3 |
| -Command packets (aka Register Files) are transferred from the Game Boy to |
4 |
| -the SNES by using P14 and P15 output lines of [the JOYPAD register](<#FF00 — P1/JOYP: Joypad>) (FF00). These same lines are also used to select the two rows in the |
5 |
| -Game Boy keyboard matrix (which still works). |
| 3 | +Command packets are transferred from the Game Boy to the SNES by using bits 6 and 7 of of [the `JOYP` register][JOYP]. |
6 | 4 |
|
7 | 5 | ## Transferring Bits
|
8 | 6 |
|
9 |
| -A command packet transfer must be initiated by setting both P14 and P15 |
10 |
| -to LOW; this will reset and start the ICD2 packet receiving circuit. |
11 |
| -Data is then transferred (LSB first), setting P14=LOW will indicate a |
12 |
| -"0" bit, and setting P15=LOW will indicate a "1" bit. For example: |
13 |
| - |
14 |
| -``` |
15 |
| - RESET 0 0 1 1 0 1 0 |
16 |
| -P14 --_---_---_-----------_-------_--... |
17 |
| -P15 --_-----------_---_-------_------... |
18 |
| - ↑ ↑ ↑ ↑ |
19 |
| -Time 0 50 100 150 |
20 |
| -``` |
21 |
| - |
22 |
| -[The boot ROM](<#Super Game Boy (SGB, SGB2)>) and licensed software keep data and reset pulses LOW for at least 5 μs and leave P14 and P15 HIGH for at least 15 μs after each pulse. |
23 |
| -Though the hardware is capable of receiving pulses and spaces as short as 2 μs (as tested using [sgb-speedtest]), |
24 |
| -following the common practice of 5-cycle pulses and 15-cycle spaces may improve reliability in some corner case that the community has not yet discovered. |
25 |
| - |
26 |
| -Obviously, it'd be no good idea to access [the joypad register](<#FF00 — P1/JOYP: Joypad>) during the transfer, |
27 |
| -for example, in case that your VBlank interrupt procedure reads-out |
28 |
| -joypad states each frame, so be sure to disable that interrupt during the |
29 |
| -transfer (or disable only the joypad procedure by using a software |
30 |
| -flag). |
| 7 | +A command packet transfer must be initiated by setting [`JOYP`][JOYP] bits 6 and 7 both to 0; this will reset and start the ICD2 packet receiving circuit. |
| 8 | +Data is then transferred (LSB first), setting bit 6 to 0 will indicate a `0` bit, and setting bit 7 to 0 will indicate a `1` bit. |
| 9 | +For example: |
31 | 10 |
|
32 |
| -[sgb-speedtest]: https://github.com/zlago/sgb-speedtest/ |
| 11 | +{{#include imgs/sgb_bits.svg}} |
| 12 | + |
| 13 | +[The boot ROM](<#Super Game Boy (SGB, SGB2)>) and licensed software keep data and reset pulses LOW for at least 5 M-cycles and leave bit 6 and 7 both to 1 for at least 15 M-cycles after each pulse. |
| 14 | +Though the hardware is capable of receiving pulses and spaces as short as 2 M-cycles (as tested using [sgb-speedtest]), following the common practice of 5 M-cycle pulses and 15 M-cycle spaces may improve reliability in some corner case that the community has not yet discovered. |
| 15 | + |
| 16 | +:::tip |
| 17 | + |
| 18 | +Obviously, it'd be no good idea to modify [the joypad register][JOYP] in the middle of a transfer. |
| 19 | +For example, if your VBlank interrupt procedure normally reads out button states each frame, you should disable that behavior using a variable (or disable the interrupt handler entirely). |
| 20 | + |
| 21 | +::: |
33 | 22 |
|
34 |
| -## Transferring Packets |
| 23 | +:::warning |
35 | 24 |
|
36 |
| -Each packet is invoked by a RESET pulse, then 128 bits of data are |
37 |
| -transferred (16 bytes, LSB of first byte first), and finally, a |
38 |
| -"0" bit must be transferred as a stop bit. |
39 |
| -These 130 bit periods correspond to at least 2600 cycles at the recommended rate. |
| 25 | +The GB program should wait 60 ms (4 frames) between each packet transfer and the next, as the "bomb" tool to erase a user-drawn border can cause the SGB system software not to check for packets for 4 frames. |
| 26 | + |
| 27 | +::: |
| 28 | + |
| 29 | +## Packet format |
| 30 | + |
| 31 | +Each packet transfer is started by a "Start" pulse, then 16 bytes (128 bits) of data are transferred, the LSB of each byte first; and finally, a `0` bit must be transferred as a stop bit. |
| 32 | +These 130 bit periods correspond to at least 2600 M-cycles at the recommended rate. |
40 | 33 |
|
41 | 34 | The structure of the first packet in a transmission is:
|
42 | 35 |
|
43 | 36 | 1. 1 pulse: Start signal
|
44 |
| -2. 1 byte: Header byte (Command Code \* 8 + Length) |
45 |
| -3. 15 bytes: Parameter Data |
46 |
| -4. 1 bit: Stop Bit (0) |
| 37 | +2. 1 byte: Header byte (<var>Command Code</var> × 8 + <var>Length</var>) |
| 38 | +3. 15 bytes: <var>Data</var> |
| 39 | +4. 1 bit: Stop Bit (`0`) |
47 | 40 |
|
48 |
| -The above "Length" indicates the total number of packets (1-7, |
49 |
| -including the first packet) which will be sent. If more than 15 |
50 |
| -parameter bytes are used, then further packet(s) will follow, as such: |
| 41 | +The above <var>Length</var> indicates the total number of packets (1-7, including the first packet) which will be sent. |
| 42 | +If more than 15 data bytes are used, then further packet(s) will follow, as such: |
51 | 43 |
|
52 | 44 | 1. 1 pulse: Start signal
|
53 |
| -2. 16 bytes: Parameter Data |
54 |
| -3. 1 bit: Stop Bit (0) |
| 45 | +2. 16 bytes: <var>Data</var> |
| 46 | +3. 1 bit: Stop Bit (`0`) |
55 | 47 |
|
56 |
| -By using all 7 packets, up to 111 data bytes (15+16\*6) may be sent. |
57 |
| -Unused bytes at the end of the last packet don't matter. |
58 |
| -The GB program should wait 60 ms (4 frames) between each packet transfer and the next, |
59 |
| -as the "bomb" tool to erase a user-drawn border can cause the SGB system software not to check for packets for 4 frames. |
| 48 | +By using all 7 packets, up to 111 data bytes (15 + 16 × 6) may be sent. |
60 | 49 |
|
61 | 50 | :::tip
|
62 | 51 |
|
63 | 52 | Bytes with no indicated purpose are simply ignored by the SGB BIOS.
|
64 | 53 | They can be set to any value (but they must still be transferred).
|
65 | 54 |
|
66 | 55 | :::
|
| 56 | + |
| 57 | +[JOYP]: <#FF00 — P1/JOYP: Joypad> |
| 58 | +[sgb-speedtest]: https://github.com/zlago/sgb-speedtest/ |
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