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Add a page with a table list of hardware regs (#466)
* Add a page with a table list of hardware regs * Use a markdown table for the hardware reg list, and use reference links instead of inline links * Add back P1 to hardware reg list * Add P1's ref link * Remove unnecessary [link, and use markdown links <# links * Update src/SUMMARY.md Co-authored-by: Eldred Habert <[email protected]> * Update src/Hardware_Reg_List.md Co-authored-by: Eldred Habert <[email protected]> * Add models column, indicate Mixed perms for R/W and Models * Clear that PCM12/34 are Audio digital outputs * Update src/Hardware_Reg_List.md Co-authored-by: Eldred Habert <[email protected]> * Update src/Hardware_Reg_List.md Co-authored-by: Eldred Habert <[email protected]> * Update src/Hardware_Reg_List.md Co-authored-by: Eldred Habert <[email protected]> * Fix alignment and wave ram link Co-authored-by: Eldred Habert <[email protected]>
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src/Hardware_Reg_List.md

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# Hardware Registers
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Address | Name | Description | Readable / Writable | Models
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-----------|-------------|-------------------------------------------------------------------|---------------------|-------
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$FF00 | [P1/JOYP] | Joypad | Mixed | All
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$FF01 | [SB] | Serial transfer data | R/W | All
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$FF02 | [SC] | Serial transfer control | R/W | Mixed
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$FF04 | [DIV] | Divider register | R/W | All
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$FF05 | [TIMA] | Timer counter | R/W | All
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$FF06 | [TMA] | Timer modulo | R/W | All
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$FF07 | [TAC] | Timer control | R/W | All
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$FF0F | [IF] | Interrupt flag | R/W | All
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$FF10 | [NR10] | Sound channel 1 sweep | R/W | All
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$FF11 | [NR11] | Sound channel 1 length timer & duty cycle | Mixed | All
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$FF12 | [NR12] | Sound channel 1 volume & envelope | R/W | All
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$FF13 | [NR13] | Sound channel 1 wavelength low | W | All
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$FF14 | [NR14] | Sound channel 1 wavelength high & control | Mixed | All
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$FF16 | [NR21] | Sound channel 2 length timer & duty cycle | Mixed | All
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$FF17 | [NR22] | Sound channel 2 volume & envelope | R/W | All
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$FF18 | [NR23] | Sound channel 2 wavelength low | W | All
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$FF19 | [NR24] | Sound channel 2 wavelength high & control | Mixed | All
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$FF1A | [NR30] | Sound channel 3 DAC enable | R/W | All
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$FF1B | [NR31] | Sound channel 3 length timer | W | All
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$FF1C | [NR32] | Sound channel 3 output level | R/W | All
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$FF1D | [NR33] | Sound channel 3 wavelength low | W | All
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$FF1E | [NR34] | Sound channel 3 wavelength high & control | Mixed | All
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$FF20 | [NR41] | Sound channel 4 length timer | W | All
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$FF21 | [NR42] | Sound channel 4 volume & envelope | R/W | All
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$FF22 | [NR43] | Sound channel 4 frequency & randomness | R/W | All
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$FF23 | [NR44] | Sound channel 4 control | Mixed | All
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$FF24 | [NR50] | Master volume & VIN panning | R/W | All
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$FF25 | [NR51] | Sound panning | R/W | All
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$FF26 | [NR52] | Sound on/off | Mixed | All
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$FF30-FF3F | [Wave RAM] | Storage for one of the sound channels' waveform | R/W | All
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$FF40 | [LCDC] | LCD control | R/W | All
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$FF41 | [STAT] | LCD status | Mixed | All
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$FF42 | [SCY] | Viewport Y position | R/W | All
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$FF43 | [SCX] | Viewport X position | R/W | All
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$FF44 | [LY] | LCD Y coordinate | R | All
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$FF45 | [LYC] | LY compare | R/W | All
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$FF46 | [DMA] | OAM DMA source address & start | R/W | All
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$FF47 | [BGP] | BG palette data | R/W | DMG
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$FF48 | [OBP0] | OBJ palette 0 data | R/W | DMG
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$FF49 | [OBP1] | OBJ palette 1 data | R/W | DMG
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$FF4A | [WY] | Window Y position | R/W | All
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$FF4B | [WX] | Window X position plus 7 | R/W | All
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$FF4D | [KEY1] | Prepare speed switch | Mixed | CGB
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$FF4F | [VBK] | VRAM bank | R/W | CGB
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$FF51 | [HDMA1] | VRAM DMA source high | W | CGB
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$FF52 | [HDMA2] | VRAM DMA source low | W | CGB
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$FF53 | [HDMA3] | VRAM DMA destination high | W | CGB
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$FF54 | [HDMA4] | VRAM DMA destination low | W | CGB
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$FF55 | [HDMA5] | VRAM DMA length/mode/start | R/W | CGB
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$FF56 | [RP] | Infrared communications port | Mixed | CGB
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$FF68 | [BCPS/BGPI] | Background color palette specification / Background palette index | R/W | CGB
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$FF69 | [BCPD/BGPD] | Background color palette data / Background palette data | R/W | CGB
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$FF6A | [OCPS/OBPI] | OBJ color palette specification / OBJ palette index | R/W | CGB
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$FF6B | [OCPD/OBPD] | OBJ color palette data / OBJ palette data | R/W | CGB
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$FF6C | [OPRI] | Object priority mode | R/W | CGB
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$FF70 | [SVBK] | WRAM bank | R/W | CGB
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$FF76 | [PCM12] | Audio digital outputs 1 & 2 | R | CGB
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$FF77 | [PCM34] | Audio digital outputs 3 & 4 | R | CGB
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$FFFF | [IE] | Interrupt enable | R/W | All
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[P1/JOYP]: <#FF00 — P1/JOYP: Joypad>
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[SB]: <#FF01 — SB: Serial transfer data>
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[SC]: <#FF02 — SC: Serial transfer control>
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[DIV]: <#FF04 — DIV: Divider register>
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[TIMA]: <#FF05 — TIMA: Timer counter>
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[TMA]: <#FF06 — TMA: Timer modulo>
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[TAC]: <#FF07 — TAC: Timer control>
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[IF]: <#FF0F — IF: Interrupt flag>
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[NR10]: <#FF10 — NR10: Channel 1 sweep>
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[NR11]: <#FF11 — NR11: Channel 1 length timer & duty cycle>
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[NR12]: <#FF12 — NR12: Channel 1 volume & envelope>
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[NR13]: <#FF13 — NR13: Channel 1 wavelength low \[write-only\]>
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[NR14]: <#FF14 — NR14: Channel 1 wavelength high & control>
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[NR21]: <#Sound Channel 2 — Pulse>
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[NR22]: <#Sound Channel 2 — Pulse>
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[NR23]: <#Sound Channel 2 — Pulse>
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[NR24]: <#Sound Channel 2 — Pulse>
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[NR30]: <#FF1A — NR30: Channel 3 DAC enable>
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[NR31]: <#FF1B — NR31: Channel 3 length timer \[write-only\]>
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[NR32]: <#FF1C — NR32: Channel 3 output level>
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[NR33]: <#FF1D — NR33: Channel 3 wavelength low \[write-only\]>
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[NR34]: <#FF1E — NR34: Channel 3 wavelength high & control>
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[NR41]: <#FF20 — NR41: Channel 4 length timer \[write-only\]>
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[NR42]: <#FF21 — NR42: Channel 4 volume & envelope>
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[NR43]: <#FF22 — NR43: Channel 4 frequency & randomness>
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[NR44]: <#FF23 — NR44: Channel 4 control>
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[NR50]: <#FF24 — NR50: Master volume & VIN panning>
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[NR51]: <#FF25 — NR51: Sound panning>
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[NR52]: <#FF26 — NR52: Sound on/off>
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[Wave RAM]: <#FF30–FF3F — Wave pattern RAM>
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[LCDC]: <#FF40 — LCDC: LCD control>
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[STAT]: <#FF41 — STAT: LCD status>
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[SCY]: <#FF42–FF43 — SCY, SCX: Viewport Y position, X position>
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[SCX]: <#FF42–FF43 — SCY, SCX: Viewport Y position, X position>
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[LY]: <#FF44 — LY: LCD Y coordinate \[read-only\]>
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[LYC]: <#FF45 — LYC: LY compare>
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[DMA]: <#FF46 — DMA: OAM DMA source address & start>
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[BGP]: <#FF47 — BGP (Non-CGB Mode only): BG palette data>
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[OBP0]: <#FF48–FF49 — OBP0, OBP1 (Non-CGB Mode only): OBJ palette 0, 1 data>
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[OBP1]: <#FF48–FF49 — OBP0, OBP1 (Non-CGB Mode only): OBJ palette 0, 1 data>
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[WY]: <#FF4A–FF4B — WY, WX: Window Y position, X position plus 7>
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[WX]: <#FF4A–FF4B — WY, WX: Window Y position, X position plus 7>
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[KEY1]: <#FF4D — KEY1 (CGB Mode only): Prepare speed switch>
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[VBK]: <#FF4F — VBK (CGB Mode only): VRAM bank>
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[HDMA1]: <#FF51–FF52 — HDMA1, HDMA2 (CGB Mode only): VRAM DMA source (high, low) \[write-only\]>
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[HDMA2]: <#FF51–FF52 — HDMA1, HDMA2 (CGB Mode only): VRAM DMA source (high, low) \[write-only\]>
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[HDMA3]: <#FF53–FF54 — HDMA3, HDMA4 (CGB Mode only): VRAM DMA destination (high, low) \[write-only\]>
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[HDMA4]: <#FF53–FF54 — HDMA3, HDMA4 (CGB Mode only): VRAM DMA destination (high, low) \[write-only\]>
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[HDMA5]: <#FF55 — HDMA5 (CGB Mode only): VRAM DMA length/mode/start>
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[RP]: <#FF56 — RP (CGB Mode only): Infrared communications port>
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[BCPS/BGPI]: <#FF68 — BCPS/BGPI (CGB Mode only): Background color palette specification / Background palette index>
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[BCPD/BGPD]: <#FF69 — BCPD/BGPD (CGB Mode only): Background color palette data / Background palette data>
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[OCPS/OBPI]: <#FF6A–FF6B — OCPS/OBPI, OCPD/OBPD (CGB Mode only): OBJ color palette specification / OBJ palette index, OBJ color palette data / OBJ palette data>
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[OCPD/OBPD]: <#FF6A–FF6B — OCPS/OBPI, OCPD/OBPD (CGB Mode only): OBJ color palette specification / OBJ palette index, OBJ color palette data / OBJ palette data>
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[OPRI]: <#FF6C — OPRI (CGB Mode only): Object priority mode>
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[SVBK]: <#FF70 — SVBK (CGB Mode only): WRAM bank>
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[PCM12]: <#FF76 — PCM12 (CGB Mode only): Digital outputs 1 & 2 \[read-only\]>
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[PCM34]: <#FF77 — PCM34 (CGB Mode only): Digital outputs 3 & 4 \[read-only\]>
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[IE]: <#FFFF — IE: Interrupt enable>

src/SUMMARY.md

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# I/O Ports
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- [Summary](./Hardware_Reg_List.md)
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- [Rendering](./Rendering.md)
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- [Tile Data](./Tile_Data.md)
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- [Tile Maps](./Tile_Maps.md)

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