Current work on Radeon 5450 card based on Coreforge's patch.

Author: geerlingguy

drivers/gpu/drm/radeon/atom.c

@@ -729,8 +729,8 @@ static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
 			cjiffies = jiffies;
 			if (time_after(cjiffies, ctx->last_jump_jiffies)) {
 				cjiffies -= ctx->last_jump_jiffies;
-				if ((jiffies_to_msecs(cjiffies) > 5000)) {
-					DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
+				if ((jiffies_to_msecs(cjiffies) > 30000)) {
+					DRM_ERROR("atombios stuck in loop for more than 30secs aborting\n");
 					ctx->abort = true;
 				}
 			} else {

drivers/gpu/drm/radeon/radeon_bios.c

@@ -101,7 +101,12 @@ static bool radeon_read_bios(struct radeon_device *rdev)
 		pci_unmap_rom(rdev->pdev, bios);
 		return false;
 	}
-	memcpy_fromio(rdev->bios, bios, size);
+	//memcpy_fromio(rdev->bios, bios, size);
+	int pos;
+	for(pos = 0;pos < size; pos++){
+	  //memcpy_fromio(rdev->bios+pos,bios+pos,1);
+	  rdev->bios[pos] = __raw_readb(bios+pos);
+	}
 	pci_unmap_rom(rdev->pdev, bios);
 	return true;
 }

drivers/gpu/drm/radeon/radeon_device.c

@@ -446,6 +446,35 @@ void radeon_wb_fini(struct radeon_device *rdev)
 	}
 }
 
+//memset_io with only 32-bit accesses
+void memset_io_pcie_wb(volatile void __iomem *dst, int c, size_t count)
+{
+  u32 qc = (u8)c;
+
+  qc |= qc << 8;
+  qc |= qc << 16;
+  //qc |= qc << 32;
+  mb();
+  while (count && !IS_ALIGNED((unsigned long)dst, 8)) {
+    __raw_writeb(c, dst);
+    dst++;
+    count--;
+  }
+
+  while (count >= 4) {
+    __raw_writel(qc, dst);
+    dst += 4;
+    count -= 4;
+  }
+
+  while (count) {
+    __raw_writeb(c, dst);
+    dst++;
+    count--;
+  }
+}
+
+
 /**
  * radeon_wb_init- Init Writeback driver info and allocate memory
  *
@@ -490,7 +519,7 @@ int radeon_wb_init(struct radeon_device *rdev)
 	}
 
 	/* clear wb memory */
-	memset((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE);
+	memset_io_pcie_wb((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE);
 	/* disable event_write fences */
 	rdev->wb.use_event = false;
 	/* disabled via module param */

drivers/gpu/drm/radeon/radeon_fb.c

@@ -209,6 +209,36 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
 	return ret;
 }
 
+//memset_io with only 32-bit accesses
+ void memset_io_pcie(volatile void __iomem *dst, int c, size_t count)
+ {
+  u64 qc = (u8)c;
+
+  qc |= qc << 8;
+  qc |= qc << 16;
+  //qc |= qc << 32;
+
+  __iowmb();
+
+  while (count && !IS_ALIGNED((unsigned long)dst, 16)) {
+    __raw_writeb(c, dst);
+    dst++;
+    count--;
+  }
+
+  while (count >= 4) {
+    __raw_writel(qc, dst);
+    dst += 4;
+    count -= 4;
+  }
+
+  while (count) {
+    __raw_writeb(c, dst);
+    dst++;
+    count--;
+  }
+}
+
 static int radeonfb_create(struct drm_fb_helper *helper,
 			   struct drm_fb_helper_surface_size *sizes)
 {
@@ -262,7 +292,7 @@ static int radeonfb_create(struct drm_fb_helper *helper,
 	/* setup helper */
 	rfbdev->helper.fb = fb;
 
-	memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
+	memset_io_pcie(rbo->kptr, 0x0, radeon_bo_size(rbo));
 
 	info->fbops = &radeonfb_ops;
 

drivers/gpu/drm/radeon/radeon_object.c

@@ -220,6 +220,10 @@ int radeon_bo_create(struct radeon_device *rdev,
 		bo->flags &= ~RADEON_GEM_GTT_WC;
 #endif
 
+	//Write combining may cause issues on the raspberry pi
+	bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
+	bo->flags |= RADEON_GEM_GTT_UC;
+
 	radeon_ttm_placement_from_domain(bo, domain);
 	/* Kernel allocation are uninterruptible */
 	down_read(&rdev->pm.mclk_lock);

drivers/gpu/drm/radeon/radeon_ttm.c

@@ -456,7 +456,8 @@ static int radeon_ttm_backend_bind(struct ttm_device *bdev,
 		     ttm->num_pages, bo_mem, ttm);
 	}
 	if (ttm->caching == ttm_cached)
-		flags |= RADEON_GART_PAGE_SNOOP;
+		printk("TTM Page would've been snooped\n");
+		// flags |= RADEON_GART_PAGE_SNOOP;
 	r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
 			     ttm->pages, gtt->ttm.dma_address, flags);
 	if (r) {

drivers/gpu/drm/radeon/radeon_vm.c

@@ -952,7 +952,8 @@ int radeon_vm_bo_update(struct radeon_device *rdev,
 		if (mem->mem_type == TTM_PL_TT) {
 			bo_va->flags |= RADEON_VM_PAGE_SYSTEM;
 			if (!(bo_va->bo->flags & (RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC)))
-				bo_va->flags |= RADEON_VM_PAGE_SNOOPED;
+				printk("VM Page would've been set to snooped\n");
+	      //bo_va->flags |= RADEON_VM_PAGE_SNOOPED;
 
 		} else {
 			addr += rdev->vm_manager.vram_base_offset;

drivers/gpu/drm/radeon/rs600.c

@@ -660,7 +660,10 @@ void rs600_gart_set_page(struct radeon_device *rdev, unsigned i,
 			 uint64_t entry)
 {
 	void __iomem *ptr = (void *)rdev->gart.ptr;
-	writeq(entry, ptr + (i * 8));
+	uint32_t high = entry >> 32;
+	writel(entry,ptr+(i*8));
+	writel(high,ptr + (i*8) + 4);
+	//writeq(entry, ptr + (i * 8));
 }
 
 int rs600_irq_set(struct radeon_device *rdev)

drivers/video/fbdev/core/cfbcopyarea.c

@@ -34,10 +34,22 @@
 #  define FB_WRITEL fb_writel
 #  define FB_READL  fb_readl
 #else
-#  define FB_WRITEL fb_writeq
-#  define FB_READL  fb_readq
+#  define FB_WRITEL fb_writel_writeq
+#  define FB_READL  fb_readl_readq
 #endif
 
+static void fb_writel_writeq(u64 val, volatile void __iomem *addr){
+  fb_writel(val,addr);
+  fb_writel(val >> 32, addr + 4);
+}
+
+static u64 fb_readl_readq(volatile void __iomem *addr){
+  u64 val;
+  val = fb_readl(addr);
+  val |= fb_readl(addr + 4) << 32;
+  return val;
+}
+
     /*
      *  Generic bitwise copy algorithm
      */

drivers/video/fbdev/core/cfbfillrect.c

@@ -23,10 +23,22 @@
 #  define FB_WRITEL fb_writel
 #  define FB_READL  fb_readl
 #else
-#  define FB_WRITEL fb_writeq
-#  define FB_READL  fb_readq
+#  define FB_WRITEL fb_writel_writeq
+#  define FB_READL  fb_readl_readq
 #endif
 
+static void fb_writel_writeq(u64 val, volatile void __iomem *addr){
+  fb_writel(val,addr);
+  fb_writel(val >> 32, addr + 4);
+}
+
+static u64 fb_readl_readq(volatile void __iomem *addr){
+  u64 val;
+  val = fb_readl(addr);
+  val |= fb_readl(addr + 4) << 32;
+  return val;
+}
+
     /*
      *  Aligned pattern fill using 32/64-bit memory accesses
      */