diff --git a/arch/arm64/mm/ioremap.c b/arch/arm64/mm/ioremap.c index 40a9205ab09016..b7c81dacabf079 100644 --- a/arch/arm64/mm/ioremap.c +++ b/arch/arm64/mm/ioremap.c @@ -87,7 +87,7 @@ void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size) if (pfn_is_map_memory(__phys_to_pfn(phys_addr))) return (void __iomem *)__phys_to_virt(phys_addr); - return __ioremap_caller(phys_addr, size, __pgprot(PROT_DEVICE_nGnRE), + return __ioremap_caller(phys_addr, size, __pgprot(PROT_NORMAL), __builtin_return_address(0)); } EXPORT_SYMBOL(ioremap_cache); diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c index ad4c568c9209be..f15b20da5315c8 100644 --- a/drivers/gpu/drm/radeon/atom.c +++ b/drivers/gpu/drm/radeon/atom.c @@ -729,8 +729,8 @@ static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg) cjiffies = jiffies; if (time_after(cjiffies, ctx->last_jump_jiffies)) { cjiffies -= ctx->last_jump_jiffies; - if ((jiffies_to_msecs(cjiffies) > 30000)) { - DRM_ERROR("atombios stuck in loop for more than 30secs aborting\n"); + if ((jiffies_to_msecs(cjiffies) > 5000)) { + DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n"); ctx->abort = true; } } else { diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index d8f97ec975c67c..eeb590d2dec2e7 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -5029,7 +5029,6 @@ static int evergreen_startup(struct radeon_device *rdev) if (r) return r; } - evergreen_gpu_init(rdev); /* allocate rlc buffers */ @@ -5045,17 +5044,11 @@ static int evergreen_startup(struct radeon_device *rdev) } } - /* TODO: Dying after here currently. */ - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); - /* allocate wb buffer */ r = radeon_wb_init(rdev); if (r) return r; - /* TODO: Dying before here currently. */ - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); - r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX); if (r) { dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r); diff --git a/drivers/gpu/drm/radeon/evergreen_dma.c b/drivers/gpu/drm/radeon/evergreen_dma.c index af9100167fc102..52c79da1ecf571 100644 --- a/drivers/gpu/drm/radeon/evergreen_dma.c +++ b/drivers/gpu/drm/radeon/evergreen_dma.c @@ -155,8 +155,6 @@ struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev, radeon_ring_unlock_commit(rdev, ring, false); radeon_sync_free(rdev, &sync, fence); - r600_dma_ring_test(rdev, ring); - return fence; } diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 23f54a7394a0b1..ca3fcae2adb537 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -2625,7 +2625,6 @@ u32 r600_gfx_get_rptr(struct radeon_device *rdev, else rptr = RREG32(R600_CP_RB_RPTR); - mb(); //CHANGED return rptr; } @@ -3484,7 +3483,7 @@ int r600_ih_ring_alloc(struct radeon_device *rdev) if (rdev->ih.ring_obj == NULL) { r = radeon_bo_create(rdev, rdev->ih.ring_size, PAGE_SIZE, true, - RADEON_GEM_DOMAIN_VRAM, 0, + RADEON_GEM_DOMAIN_GTT, 0, NULL, NULL, &rdev->ih.ring_obj); if (r) { DRM_ERROR("radeon: failed to create ih ring buffer (%d).\n", r); @@ -3494,7 +3493,7 @@ int r600_ih_ring_alloc(struct radeon_device *rdev) if (unlikely(r != 0)) return r; r = radeon_bo_pin(rdev->ih.ring_obj, - RADEON_GEM_DOMAIN_VRAM, + RADEON_GEM_DOMAIN_GTT, &rdev->ih.gpu_addr); if (r) { radeon_bo_unreserve(rdev->ih.ring_obj); @@ -4039,10 +4038,8 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev) { u32 wptr, tmp; - if (rdev->wb.enabled) { + if (rdev->wb.enabled) wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]); - mb(); - } else wptr = RREG32(IH_RB_WPTR); diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c index 1f6e86c8268e76..89ca2738c5d4c8 100644 --- a/drivers/gpu/drm/radeon/r600_dma.c +++ b/drivers/gpu/drm/radeon/r600_dma.c @@ -57,7 +57,6 @@ uint32_t r600_dma_get_rptr(struct radeon_device *rdev, else rptr = RREG32(DMA_RB_RPTR); - mb(); //CHANGED return (rptr & 0x3fffc) >> 2; } @@ -246,7 +245,6 @@ int r600_dma_ring_test(struct radeon_device *rdev, tmp = 0xCAFEDEAD; rdev->wb.wb[index/4] = cpu_to_le32(tmp); - mb(); //CHANGED r = radeon_ring_lock(rdev, ring, 4); if (r) { DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r); @@ -260,7 +258,6 @@ int r600_dma_ring_test(struct radeon_device *rdev, for (i = 0; i < rdev->usec_timeout; i++) { tmp = le32_to_cpu(rdev->wb.wb[index/4]); - mb(); //CHANGED if (tmp == 0xDEADBEEF) break; udelay(1); @@ -382,7 +379,6 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) r = 0; for (i = 0; i < rdev->usec_timeout; i++) { tmp = le32_to_cpu(rdev->wb.wb[index/4]); - mb(); //CHANGED if (tmp == 0xDEADBEEF) break; udelay(1); diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 3c133e0da0f244..37fbef271db338 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -370,7 +370,6 @@ struct radeon_fence_driver { atomic64_t last_seq; bool initialized, delayed_irq; struct delayed_work lockup_work; - dma_addr_t dma_addr; }; struct radeon_fence { @@ -669,8 +668,6 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, dma_addr_t *dma_addr, uint32_t flags); -void radeon_gart_sync_all_for_device(struct radeon_device *rdev); - /* * GPU MC structures, functions & helpers */ @@ -2347,11 +2344,6 @@ struct radeon_atcs { typedef uint32_t (*radeon_rreg_t)(struct radeon_device*, uint32_t); typedef void (*radeon_wreg_t)(struct radeon_device*, uint32_t, uint32_t); -struct moved_bos_entry{ - struct radeon_bo* bo; - struct list_head list; -}; - struct radeon_device { struct device *dev; struct drm_device *ddev; @@ -2497,25 +2489,6 @@ struct radeon_device { /* tracking pinned memory */ u64 vram_pin_size; u64 gart_pin_size; - struct radeon_bo *rick; - uint64_t rick_gpu; - void *rick_cpu; - uint64_t fb_gpu; - - // reading back shader code for debugging - struct radeon_bo* shader_read_bo; - uint64_t shader_read_gpu; - void* shader_read_cpu; - - // needed because of weird stuff - int numFSuses; - - // tracking moved BOs to move them back after CS execution - struct radeon_bo** moved_bos; // array of pointers to the BOs that were moved - int nMovedBos; // number of BOs moved (determines size of array) - struct mutex move_bos_mutex; - struct list_head move_bo_head; - bool trackMoves; // enables or disables tracking of the BO moves to avoid tracking while moving the BOs back after CS execution }; bool radeon_is_px(struct drm_device *dev); diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index 38a88f3297e890..85cdec1f59ae73 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c @@ -81,7 +81,6 @@ static bool radeon_read_bios(struct radeon_device *rdev) { uint8_t __iomem *bios, val1, val2; size_t size; - int pos; rdev->bios = NULL; /* XXX: some cards may return 0 for rom size? ddx has a workaround */ @@ -102,11 +101,7 @@ static bool radeon_read_bios(struct radeon_device *rdev) pci_unmap_rom(rdev->pdev, bios); return false; } - //memcpy_fromio(rdev->bios, bios, size); - for(pos = 0;pos < size; pos++){ - //memcpy_fromio(rdev->bios+pos,bios+pos,1); - rdev->bios[pos] = __raw_readb(bios+pos); - } + memcpy_fromio_pcie(rdev->bios, bios, size); pci_unmap_rom(rdev->pdev, bios); return true; } diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index 8ad893c91aa2be..9ed2b2700e0a56 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c @@ -663,7 +663,6 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) struct radeon_device *rdev = dev->dev_private; struct radeon_cs_parser parser; int r; - INIT_LIST_HEAD(&rdev->move_bo_head); down_read(&rdev->exclusive_lock); if (!rdev->accel_working) { @@ -677,7 +676,6 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) r = -EAGAIN; return r; } - rdev->trackMoves = true; /* initialize parser */ memset(&parser, 0, sizeof(struct radeon_cs_parser)); parser.filp = filp; diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index eeb4e2cc9c3b46..680415b98ad6e1 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -538,42 +538,6 @@ void radeon_wb_fini(struct radeon_device *rdev) } } -//memset_io with only 32-bit accesses -void memset_io_pcie_wb(volatile void __iomem *dst, int c, size_t count) -{ - u32 qc = (u8)c; - - qc |= qc << 8; - qc |= qc << 16; - //qc |= qc << 32; - mb(); - - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); - - while (count && !IS_ALIGNED((unsigned long)dst, 8)) { - __raw_writeb(c, dst); - dst++; - count--; - } - - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); - - while (count >= 4) { - __raw_writel(qc, dst); - dst += 4; - count -= 4; - } - - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); - - while (count) { - __raw_writeb(c, dst); - dst++; - count--; - } -} - - /** * radeon_wb_init- Init Writeback driver info and allocate memory * @@ -589,7 +553,7 @@ int radeon_wb_init(struct radeon_device *rdev) if (rdev->wb.wb_obj == NULL) { r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true, - RADEON_GEM_DOMAIN_VRAM, 0, NULL, NULL, + RADEON_GEM_DOMAIN_GTT, 0, NULL, NULL, &rdev->wb.wb_obj); if (r) { dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); @@ -600,7 +564,7 @@ int radeon_wb_init(struct radeon_device *rdev) radeon_wb_fini(rdev); return r; } - r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_VRAM, + r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT, &rdev->wb.gpu_addr); if (r) { radeon_bo_unreserve(rdev->wb.wb_obj); @@ -617,23 +581,14 @@ int radeon_wb_init(struct radeon_device *rdev) } } - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); - /* clear wb memory */ - memset_io_pcie_wb((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE); - - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); - + memset_io_pcie((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE); /* disable event_write fences */ rdev->wb.use_event = false; - - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); - /* disabled via module param */ if (radeon_no_wb == 1) { rdev->wb.enabled = false; } else { - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); if (rdev->flags & RADEON_IS_AGP) { /* often unreliable on AGP */ rdev->wb.enabled = false; @@ -641,7 +596,6 @@ int radeon_wb_init(struct radeon_device *rdev) /* often unreliable on pre-r300 */ rdev->wb.enabled = false; } else { - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); rdev->wb.enabled = true; /* event_write fences are only available on r600+ */ if (rdev->family >= CHIP_R600) { @@ -649,14 +603,12 @@ int radeon_wb_init(struct radeon_device *rdev) } } } - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); /* always use writeback/events on NI, APUs */ if (rdev->family >= CHIP_PALM) { rdev->wb.enabled = true; rdev->wb.use_event = true; } - printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200); dev_info(rdev->dev, "WB %sabled\n", rdev->wb.enabled ? "en" : "dis"); return 0; @@ -1641,9 +1593,6 @@ int radeon_device_init(struct radeon_device *rdev, else DRM_INFO("radeon: acceleration disabled, skipping benchmarks\n"); } - - mutex_init(&rdev->move_bos_mutex); - return 0; failed: diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c index 2557884a88f06c..7165c67ec45d1f 100644 --- a/drivers/gpu/drm/radeon/radeon_fb.c +++ b/drivers/gpu/drm/radeon/radeon_fb.c @@ -189,7 +189,7 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, /* Only 27 bit offset for legacy CRTC */ ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM, ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, - &rdev->fb_gpu); + NULL); if (ret) { radeon_bo_unreserve(rbo); goto out_unref; diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index 04e7ccb581569d..04109a2a6fd760 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c @@ -320,23 +320,6 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, return 0; } -/** - * syncs all bound pages for the card (workaround for incoherent systems) - * - */ -void radeon_gart_sync_all_for_device(struct radeon_device *rdev){ - int i; - printk("syncing all GART pages for device\n"); - for (i = 0; i < rdev->gart.num_gpu_pages; i++){ // loop over all gpu pages - if(rdev->gart.pages_entry[i] == rdev->dummy_page.entry){ - continue; // entry is just the dummy page, so it can be ignored - } - dma_sync_single_for_device(rdev->dev, rdev->gart.pages_entry[i] & 0xFFFFFFFFFFFFF000ULL, 4096, DMA_BIDIRECTIONAL); - dma_sync_single_for_cpu(rdev->dev, rdev->gart.pages_entry[i] & 0xFFFFFFFFFFFFF000ULL, 4096, DMA_BIDIRECTIONAL); - } - -} - /** * radeon_gart_init - init the driver info for managing the gart * diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c index ccc211f7c71cad..7ec6a9140b12be 100644 --- a/drivers/gpu/drm/radeon/radeon_gem.c +++ b/drivers/gpu/drm/radeon/radeon_gem.c @@ -330,39 +330,20 @@ int radeon_gem_create_ioctl(struct drm_device *dev, void *data, struct radeon_device *rdev = dev->dev_private; struct drm_radeon_gem_create *args = data; struct drm_gem_object *gobj; - struct radeon_bo* rbo; uint32_t handle; int r; - u64 size; - __u32 flags; down_read(&rdev->exclusive_lock); /* create a gem object to contain this object in */ - size = args->size; - flags = args->flags; - if(1){ - flags &= ~RADEON_GEM_NO_CPU_ACCESS; - flags &= ~RADEON_GEM_GTT_WC; - flags |= RADEON_GEM_GTT_UC; - - args->initial_domain = RADEON_GEM_DOMAIN_GTT; - } args->size = roundup(args->size, PAGE_SIZE); r = radeon_gem_object_create(rdev, args->size, args->alignment, - args->initial_domain, flags, + args->initial_domain, args->flags, false, &gobj); if (r) { up_read(&rdev->exclusive_lock); r = radeon_gem_handle_lockup(rdev, r); return r; } - - rbo = gem_to_radeon_bo(gobj); - if(size == 48){ - // 12 dw, first shader - printk("first shader?\n"); - } - r = drm_gem_handle_create(filp, gobj, &handle); /* drop reference from allocate - handle holds it now */ drm_gem_object_put(gobj); @@ -415,7 +396,7 @@ int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data, /* create a gem object to contain this object in */ r = radeon_gem_object_create(rdev, args->size, 0, - RADEON_GEM_DOMAIN_GTT, 0, + RADEON_GEM_DOMAIN_CPU, 0, false, &gobj); if (r) goto handle_lockup; @@ -439,7 +420,7 @@ int radeon_gem_userptr_ioctl(struct drm_device *dev, void *data, goto release_object; } - radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_VRAM); + radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_GTT); r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); radeon_bo_unreserve(bo); mmap_read_unlock(current->mm); @@ -823,9 +804,9 @@ int radeon_gem_op_ioctl(struct drm_device *dev, void *data, args->value = robj->initial_domain; break; case RADEON_GEM_OP_SET_INITIAL_DOMAIN: - robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM);// | - //RADEON_GEM_DOMAIN_GTT | - //RADEON_GEM_DOMAIN_CPU); + robj->initial_domain = args->value & (RADEON_GEM_DOMAIN_VRAM | + RADEON_GEM_DOMAIN_GTT | + RADEON_GEM_DOMAIN_CPU); break; default: r = -EINVAL; diff --git a/drivers/gpu/drm/radeon/radeon_ib.c b/drivers/gpu/drm/radeon/radeon_ib.c index 3acdb6fa6f378c..342cbe4479a5ec 100644 --- a/drivers/gpu/drm/radeon/radeon_ib.c +++ b/drivers/gpu/drm/radeon/radeon_ib.c @@ -30,7 +30,6 @@ #include #include "radeon.h" -#include "evergreend.h" /* * IB @@ -129,22 +128,6 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib, struct radeon_ring *ring = &rdev->ring[ib->ring]; int r = 0; - printk("IB scheduled, dumping %d DWORDs\n",ib->length_dw); - - if (0) { - radeon_ring_lock(rdev,ring,7); - radeon_ring_write(ring,PACKET3(PACKET3_CP_DMA,4)); - radeon_ring_write(ring,lower_32_bits(rdev->rick_gpu)); - radeon_ring_write(ring,upper_32_bits(rdev->rick_gpu) & 0xFF); - radeon_ring_write(ring,lower_32_bits(rdev->fb_gpu)); - radeon_ring_write(ring,upper_32_bits(rdev->fb_gpu) & 0xFF); - radeon_ring_write(ring,(1920*1080*4) & 0xFFFFF); - - radeon_ring_unlock_commit(rdev,ring,false); - printk("DMAd test image to FB\n"); - } - radeon_gart_sync_all_for_device(rdev); - if (!ib->length_dw || !ring->ready) { /* TODO: Nothings in the ib we should report. */ dev_err(rdev->dev, "couldn't schedule ib\n"); diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index 0b86054717f62c..4eab7460a9ce62 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c @@ -31,7 +31,6 @@ #include #include "radeon.h" -#include "evergreend.h" /* * Rings @@ -178,13 +177,6 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring, radeon_ring_write(ring, ring->nop); } mb(); - - __iowmb(); - dsb(sy); - int numdw; - int i; - numdw = ring->wptr - ring->wptr_old; - /* If we are emitting the HDP flush via MMIO, we need to do it after * all CPU writes to VRAM finished. */ diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 33544b5f78d002..8d2266ea17b22c 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -295,7 +295,7 @@ static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resourc return -EINVAL; mem->bus.offset += rdev->mc.aper_base; mem->bus.is_iomem = true; - mem->bus.caching = ttm_write_combined; + mem->bus.caching = ttm_uncached; #ifdef __alpha__ /* * Alpha: use bus.addr to hold the ioremap() return, @@ -523,7 +523,7 @@ static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, caching = ttm_write_combined; else caching = ttm_cached; - + caching = ttm_uncached; if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) { kfree(gtt); return NULL;