From cfde0357ced1d58439cc7472f1010fa57b48606e Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Fri, 20 Jun 2025 11:43:53 +0200 Subject: [PATCH 1/3] Regenerate on `sdk-1.4.313.0` --- autogen/external/SPIRV-Headers | 2 +- rspirv/Cargo.toml | 2 +- rspirv/binary/autogen_parse_operand.rs | 5 + rspirv/dr/autogen_operand.rs | 75 +++- rspirv/dr/build/autogen_norm_insts.rs | 255 ++++++++++- rspirv/dr/build/autogen_type.rs | 20 + rspirv/grammar/autogen_table.rs | 88 +++- rspirv/lift/autogen_context.rs | 572 +++++++++++++------------ rspirv/sr/autogen_ops.rs | 421 +++++++++--------- rspirv/sr/autogen_types.rs | 1 + spirv/Cargo.toml | 2 +- spirv/autogen_spirv.rs | 69 ++- 12 files changed, 1003 insertions(+), 509 deletions(-) diff --git a/autogen/external/SPIRV-Headers b/autogen/external/SPIRV-Headers index 09913f0..aa6cef1 160000 --- a/autogen/external/SPIRV-Headers +++ b/autogen/external/SPIRV-Headers @@ -1 +1 @@ -Subproject commit 09913f088a1197aba4aefd300a876b2ebbaa3391 +Subproject commit aa6cef192b8e693916eb713e7a9ccadf06062ceb diff --git a/rspirv/Cargo.toml b/rspirv/Cargo.toml index 58861c3..8cb4011 100644 --- a/rspirv/Cargo.toml +++ b/rspirv/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "rspirv" -version = "0.12.0+sdk-1.4.309.0" +version = "0.12.0+sdk-1.4.313.0" authors = ["Lei Zhang "] edition = "2018" diff --git a/rspirv/binary/autogen_parse_operand.rs b/rspirv/binary/autogen_parse_operand.rs index 16d8e78..d36a32f 100644 --- a/rspirv/binary/autogen_parse_operand.rs +++ b/rspirv/binary/autogen_parse_operand.rs @@ -380,6 +380,11 @@ impl Parser<'_, '_> { spirv::ExecutionMode::RoundingModeRTZ => { vec![dr::Operand::LiteralBit32(self.decoder.bit32()?)] } + spirv::ExecutionMode::TileShadingRateQCOM => vec![ + dr::Operand::LiteralBit32(self.decoder.bit32()?), + dr::Operand::LiteralBit32(self.decoder.bit32()?), + dr::Operand::LiteralBit32(self.decoder.bit32()?), + ], spirv::ExecutionMode::IsApiEntryAMDX => vec![dr::Operand::IdRef(self.decoder.id()?)], spirv::ExecutionMode::MaxNodeRecursionAMDX => { vec![dr::Operand::IdRef(self.decoder.id()?)] diff --git a/rspirv/dr/autogen_operand.rs b/rspirv/dr/autogen_operand.rs index b4b6f18..5f9c32d 100644 --- a/rspirv/dr/autogen_operand.rs +++ b/rspirv/dr/autogen_operand.rs @@ -1266,6 +1266,8 @@ impl Operand { s::ExecutionMode::NonCoherentStencilAttachmentReadEXT => { vec![spirv::Capability::TileImageStencilReadAccessEXT] } + s::ExecutionMode::NonCoherentTileAttachmentReadQCOM + | s::ExecutionMode::TileShadingRateQCOM => vec![spirv::Capability::TileShadingQCOM], s::ExecutionMode::Xfb => vec![spirv::Capability::TransformFeedback], s::ExecutionMode::SharedLocalMemorySizeINTEL | s::ExecutionMode::NamedBarrierCountINTEL => { @@ -1310,6 +1312,7 @@ impl Operand { s::StorageClass::TileImageEXT => { vec![spirv::Capability::TileImageColorReadAccessEXT] } + s::StorageClass::TileAttachmentQCOM => vec![spirv::Capability::TileShadingQCOM], s::StorageClass::DeviceOnlyINTEL | s::StorageClass::HostOnlyINTEL => { vec![spirv::Capability::USMStorageClassesINTEL] } @@ -1418,9 +1421,15 @@ impl Operand { | s::ImageChannelDataType::Float | s::ImageChannelDataType::UnormInt24 | s::ImageChannelDataType::UnormInt101010_2 + | s::ImageChannelDataType::UnormInt10X6EXT | s::ImageChannelDataType::UnsignedIntRaw10EXT | s::ImageChannelDataType::UnsignedIntRaw12EXT - | s::ImageChannelDataType::UnormInt2_101010EXT => vec![], + | s::ImageChannelDataType::UnormInt2_101010EXT + | s::ImageChannelDataType::UnsignedInt10X6EXT + | s::ImageChannelDataType::UnsignedInt12X4EXT + | s::ImageChannelDataType::UnsignedInt14X2EXT + | s::ImageChannelDataType::UnormInt12X4EXT + | s::ImageChannelDataType::UnormInt14X2EXT => vec![], }, Self::FPRoundingMode(v) => match v { s::FPRoundingMode::RTE @@ -1860,6 +1869,9 @@ impl Operand { | s::BuiltIn::TessLevelInner | s::BuiltIn::TessCoord | s::BuiltIn::PatchVertices => vec![spirv::Capability::Tessellation], + s::BuiltIn::TileOffsetQCOM + | s::BuiltIn::TileDimensionQCOM + | s::BuiltIn::TileApronSizeQCOM => vec![spirv::Capability::TileShadingQCOM], }, Self::Scope(v) => match v { s::Scope::CrossDevice @@ -1920,7 +1932,6 @@ impl Operand { | s::Capability::StoragePushConstant16 | s::Capability::StorageInputOutput16 | s::Capability::DeviceGroup - | s::Capability::AtomicStorageOps | s::Capability::SampleMaskPostDepthCoverage | s::Capability::StorageBuffer8BitAccess | s::Capability::StoragePushConstant8 @@ -1936,6 +1947,7 @@ impl Operand { | s::Capability::TextureBlockMatch2QCOM | s::Capability::ShaderClockKHR | s::Capability::QuadControlKHR + | s::Capability::BFloat16TypeKHR | s::Capability::ImageFootprintNV | s::Capability::FragmentBarycentricKHR | s::Capability::GroupNonUniformPartitionedNV @@ -2011,6 +2023,7 @@ impl Operand { | s::Capability::BFloat16ConversionINTEL | s::Capability::SplitBarrierINTEL | s::Capability::ArithmeticFenceEXT + | s::Capability::TaskSequenceINTEL | s::Capability::FPMaxErrorINTEL | s::Capability::FPGALatencyControlINTEL | s::Capability::FPGAArgumentInterfacesINTEL @@ -2019,11 +2032,19 @@ impl Operand { | s::Capability::SubgroupBufferPrefetchINTEL | s::Capability::Subgroup2DBlockIOINTEL | s::Capability::SubgroupMatrixMultiplyAccumulateINTEL + | s::Capability::TernaryBitwiseFunctionINTEL | s::Capability::GroupUniformArithmeticKHR + | s::Capability::TensorFloat32RoundingINTEL | s::Capability::MaskedGatherScatterINTEL | s::Capability::CacheControlsINTEL | s::Capability::RegisterLimitsINTEL => vec![], s::Capability::GenericPointer => vec![spirv::Capability::Addresses], + s::Capability::AtomicStorageOps => vec![spirv::Capability::AtomicStorage], + s::Capability::BFloat16DotProductKHR => vec![spirv::Capability::BFloat16TypeKHR], + s::Capability::BFloat16CooperativeMatrixKHR => vec![ + spirv::Capability::BFloat16TypeKHR, + spirv::Capability::CooperativeMatrixKHR, + ], s::Capability::SubgroupDispatch => vec![spirv::Capability::DeviceEnqueue], s::Capability::FPGAClusterAttributesV2INTEL => { vec![spirv::Capability::FPGAClusterAttributesINTEL] @@ -2078,8 +2099,7 @@ impl Operand { vec![spirv::Capability::MultiViewport] } s::Capability::PipeStorage => vec![spirv::Capability::Pipes], - s::Capability::RayTraversalPrimitiveCullingKHR - | s::Capability::RayTracingOpacityMicromapEXT => vec![ + s::Capability::RayTraversalPrimitiveCullingKHR => vec![ spirv::Capability::RayQueryKHR, spirv::Capability::RayTracingKHR, ], @@ -2135,6 +2155,7 @@ impl Operand { | s::Capability::RayQueryProvisionalKHR | s::Capability::RayQueryKHR | s::Capability::RayTracingKHR + | s::Capability::TileShadingQCOM | s::Capability::Float16ImageAMD | s::Capability::ImageGatherBiasLodAMD | s::Capability::FragmentMaskAMD @@ -2162,6 +2183,7 @@ impl Operand { | s::Capability::FragmentShaderPixelInterlockEXT | s::Capability::DemoteToHelperInvocation | s::Capability::DisplacementMicromapNV + | s::Capability::RayTracingOpacityMicromapEXT | s::Capability::RayQueryPositionFetchKHR => vec![spirv::Capability::Shader], s::Capability::UniformBufferArrayNonUniformIndexing | s::Capability::SampledImageArrayNonUniformIndexing @@ -2273,6 +2295,9 @@ impl Operand { vec![spirv::Capability::RegisterLimitsINTEL] } }, + Self::FPEncoding(v) => match v { + s::FPEncoding::BFloat16KHR => vec![spirv::Capability::BFloat16TypeKHR], + }, Self::CooperativeVectorMatrixLayout(v) => match v { s::CooperativeVectorMatrixLayout::RowMajorNV | s::CooperativeVectorMatrixLayout::ColumnMajorNV @@ -2432,6 +2457,8 @@ impl Operand { | s::ExecutionMode::NonCoherentColorAttachmentReadEXT | s::ExecutionMode::NonCoherentDepthAttachmentReadEXT | s::ExecutionMode::NonCoherentStencilAttachmentReadEXT + | s::ExecutionMode::NonCoherentTileAttachmentReadQCOM + | s::ExecutionMode::TileShadingRateQCOM | s::ExecutionMode::CoalescingAMDX | s::ExecutionMode::IsApiEntryAMDX | s::ExecutionMode::MaxNodeRecursionAMDX @@ -2514,6 +2541,7 @@ impl Operand { | s::StorageClass::AtomicCounter | s::StorageClass::Image | s::StorageClass::TileImageEXT + | s::StorageClass::TileAttachmentQCOM | s::StorageClass::NodePayloadAMDX | s::StorageClass::HitObjectAttributeNV => vec![], s::StorageClass::TaskPayloadWorkgroupEXT => vec!["SPV_EXT_mesh_shader"], @@ -2642,9 +2670,15 @@ impl Operand { | s::ImageChannelDataType::Float | s::ImageChannelDataType::UnormInt24 | s::ImageChannelDataType::UnormInt101010_2 + | s::ImageChannelDataType::UnormInt10X6EXT | s::ImageChannelDataType::UnsignedIntRaw10EXT | s::ImageChannelDataType::UnsignedIntRaw12EXT - | s::ImageChannelDataType::UnormInt2_101010EXT => vec![], + | s::ImageChannelDataType::UnormInt2_101010EXT + | s::ImageChannelDataType::UnsignedInt10X6EXT + | s::ImageChannelDataType::UnsignedInt12X4EXT + | s::ImageChannelDataType::UnsignedInt14X2EXT + | s::ImageChannelDataType::UnormInt12X4EXT + | s::ImageChannelDataType::UnormInt14X2EXT => vec![], }, Self::FPRoundingMode(v) => match v { s::FPRoundingMode::RTE @@ -2902,6 +2936,9 @@ impl Operand { | s::BuiltIn::CoreMaxIDARM | s::BuiltIn::WarpIDARM | s::BuiltIn::WarpMaxIDARM + | s::BuiltIn::TileOffsetQCOM + | s::BuiltIn::TileDimensionQCOM + | s::BuiltIn::TileApronSizeQCOM | s::BuiltIn::RemainingRecursionLevelsAMDX | s::BuiltIn::ShaderIndexAMDX | s::BuiltIn::HitTriangleVertexPositionsKHR @@ -3235,6 +3272,13 @@ impl Operand { s::Capability::SubgroupShuffleINTEL | s::Capability::SubgroupBufferBlockIOINTEL | s::Capability::SubgroupImageBlockIOINTEL => vec!["SPV_INTEL_subgroups"], + s::Capability::TaskSequenceINTEL => vec!["SPV_INTEL_task_sequence"], + s::Capability::TensorFloat32RoundingINTEL => { + vec!["SPV_INTEL_tensor_float32_conversion"] + } + s::Capability::TernaryBitwiseFunctionINTEL => { + vec!["SPV_INTEL_ternary_bitwise_function"] + } s::Capability::UnstructuredLoopControlsINTEL => { vec!["SPV_INTEL_unstructured_loop_controls"] } @@ -3250,6 +3294,9 @@ impl Operand { s::Capability::StorageBuffer8BitAccess | s::Capability::UniformAndStorageBuffer8BitAccess | s::Capability::StoragePushConstant8 => vec!["SPV_KHR_8bit_storage"], + s::Capability::BFloat16TypeKHR + | s::Capability::BFloat16DotProductKHR + | s::Capability::BFloat16CooperativeMatrixKHR => vec!["SPV_KHR_bfloat16"], s::Capability::BitInstructions => vec!["SPV_KHR_bit_instructions"], s::Capability::CooperativeMatrixKHR => vec!["SPV_KHR_cooperative_matrix"], s::Capability::DeviceGroup => vec!["SPV_KHR_device_group"], @@ -3362,6 +3409,7 @@ impl Operand { | s::Capability::TextureBoxFilterQCOM | s::Capability::TextureBlockMatchQCOM => vec!["SPV_QCOM_image_processing"], s::Capability::TextureBlockMatch2QCOM => vec!["SPV_QCOM_image_processing2"], + s::Capability::TileShadingQCOM => vec!["SPV_QCOM_tile_shading"], }, Self::RayQueryIntersection(v) => match v { s::RayQueryIntersection::RayQueryCandidateIntersectionKHR @@ -3423,6 +3471,9 @@ impl Operand { Self::NamedMaximumNumberOfRegisters(v) => match v { s::NamedMaximumNumberOfRegisters::AutoINTEL => vec![], }, + Self::FPEncoding(v) => match v { + s::FPEncoding::BFloat16KHR => vec![], + }, Self::CooperativeVectorMatrixLayout(v) => match v { s::CooperativeVectorMatrixLayout::RowMajorNV | s::CooperativeVectorMatrixLayout::ColumnMajorNV @@ -3756,6 +3807,20 @@ impl Operand { kind: crate::grammar::OperandKind::LiteralInteger, quantifier: crate::grammar::OperandQuantifier::One, }], + s::ExecutionMode::TileShadingRateQCOM => vec![ + crate::grammar::LogicalOperand { + kind: crate::grammar::OperandKind::LiteralInteger, + quantifier: crate::grammar::OperandQuantifier::One, + }, + crate::grammar::LogicalOperand { + kind: crate::grammar::OperandKind::LiteralInteger, + quantifier: crate::grammar::OperandQuantifier::One, + }, + crate::grammar::LogicalOperand { + kind: crate::grammar::OperandKind::LiteralInteger, + quantifier: crate::grammar::OperandQuantifier::One, + }, + ], s::ExecutionMode::LocalSize | s::ExecutionMode::LocalSizeHint => vec![ crate::grammar::LogicalOperand { kind: crate::grammar::OperandKind::LiteralInteger, diff --git a/rspirv/dr/build/autogen_norm_insts.rs b/rspirv/dr/build/autogen_norm_insts.rs index 6d83faf..032cc23 100644 --- a/rspirv/dr/build/autogen_norm_insts.rs +++ b/rspirv/dr/build/autogen_norm_insts.rs @@ -20880,7 +20880,6 @@ impl Builder { &mut self, result_type: spirv::Word, result_id: Option, - result: spirv::Word, input: spirv::Word, ) -> BuildResult { let _id = result_id.unwrap_or_else(|| self.id()); @@ -20889,7 +20888,7 @@ impl Builder { spirv::Op::FPGARegINTEL, Some(result_type), Some(_id), - vec![dr::Operand::IdRef(result), dr::Operand::IdRef(input)], + vec![dr::Operand::IdRef(input)], ); self.insert_into_block(InsertPoint::End, inst)?; Ok(_id) @@ -20900,7 +20899,6 @@ impl Builder { insert_point: InsertPoint, result_type: spirv::Word, result_id: Option, - result: spirv::Word, input: spirv::Word, ) -> BuildResult { let _id = result_id.unwrap_or_else(|| self.id()); @@ -20909,7 +20907,7 @@ impl Builder { spirv::Op::FPGARegINTEL, Some(result_type), Some(_id), - vec![dr::Operand::IdRef(result), dr::Operand::IdRef(input)], + vec![dr::Operand::IdRef(input)], ); self.insert_into_block(insert_point, inst)?; Ok(_id) @@ -21930,6 +21928,165 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpTaskSequenceCreateINTEL instruction to the current block."] + pub fn task_sequence_create_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + function: spirv::Word, + pipelined: u32, + use_stall_enable_clusters: u32, + get_capacity: u32, + async_capacity: u32, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TaskSequenceCreateINTEL, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(function), + dr::Operand::LiteralBit32(pipelined), + dr::Operand::LiteralBit32(use_stall_enable_clusters), + dr::Operand::LiteralBit32(get_capacity), + dr::Operand::LiteralBit32(async_capacity), + ], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpTaskSequenceCreateINTEL instruction to the current block."] + pub fn insert_task_sequence_create_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + function: spirv::Word, + pipelined: u32, + use_stall_enable_clusters: u32, + get_capacity: u32, + async_capacity: u32, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TaskSequenceCreateINTEL, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(function), + dr::Operand::LiteralBit32(pipelined), + dr::Operand::LiteralBit32(use_stall_enable_clusters), + dr::Operand::LiteralBit32(get_capacity), + dr::Operand::LiteralBit32(async_capacity), + ], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpTaskSequenceAsyncINTEL instruction to the current block."] + pub fn task_sequence_async_intel( + &mut self, + sequence: spirv::Word, + arguments: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TaskSequenceAsyncINTEL, + None, + None, + vec![dr::Operand::IdRef(sequence)], + ); + inst.operands + .extend(arguments.into_iter().map(dr::Operand::IdRef)); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpTaskSequenceAsyncINTEL instruction to the current block."] + pub fn insert_task_sequence_async_intel( + &mut self, + insert_point: InsertPoint, + sequence: spirv::Word, + arguments: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TaskSequenceAsyncINTEL, + None, + None, + vec![dr::Operand::IdRef(sequence)], + ); + inst.operands + .extend(arguments.into_iter().map(dr::Operand::IdRef)); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } + #[doc = "Appends an OpTaskSequenceGetINTEL instruction to the current block."] + pub fn task_sequence_get_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + sequence: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TaskSequenceGetINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(sequence)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpTaskSequenceGetINTEL instruction to the current block."] + pub fn insert_task_sequence_get_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + sequence: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TaskSequenceGetINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(sequence)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpTaskSequenceReleaseINTEL instruction to the current block."] + pub fn task_sequence_release_intel(&mut self, sequence: spirv::Word) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TaskSequenceReleaseINTEL, + None, + None, + vec![dr::Operand::IdRef(sequence)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpTaskSequenceReleaseINTEL instruction to the current block."] + pub fn insert_task_sequence_release_intel( + &mut self, + insert_point: InsertPoint, + sequence: spirv::Word, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TaskSequenceReleaseINTEL, + None, + None, + vec![dr::Operand::IdRef(sequence)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } #[doc = "Appends an OpSubgroupBlockPrefetchINTEL instruction to the current block."] pub fn subgroup_block_prefetch_intel( &mut self, @@ -22389,6 +22546,59 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpBitwiseFunctionINTEL instruction to the current block."] + pub fn bitwise_function_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + a: spirv::Word, + b: spirv::Word, + c: spirv::Word, + lut_index: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::BitwiseFunctionINTEL, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(a), + dr::Operand::IdRef(b), + dr::Operand::IdRef(c), + dr::Operand::IdRef(lut_index), + ], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpBitwiseFunctionINTEL instruction to the current block."] + pub fn insert_bitwise_function_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + a: spirv::Word, + b: spirv::Word, + c: spirv::Word, + lut_index: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::BitwiseFunctionINTEL, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(a), + dr::Operand::IdRef(b), + dr::Operand::IdRef(c), + dr::Operand::IdRef(lut_index), + ], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } #[doc = "Appends an OpGroupIMulKHR instruction to the current block."] pub fn group_i_mul_khr( &mut self, @@ -22781,6 +22991,43 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpRoundFToTF32INTEL instruction to the current block."] + pub fn round_f_to_tf32intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + float_value: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::RoundFToTF32INTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(float_value)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpRoundFToTF32INTEL instruction to the current block."] + pub fn insert_round_f_to_tf32intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + float_value: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::RoundFToTF32INTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(float_value)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } #[doc = "Appends an OpMaskedGatherINTEL instruction to the current block."] pub fn masked_gather_intel( &mut self, diff --git a/rspirv/dr/build/autogen_type.rs b/rspirv/dr/build/autogen_type.rs index 049fab7..98634be 100644 --- a/rspirv/dr/build/autogen_type.rs +++ b/rspirv/dr/build/autogen_type.rs @@ -934,4 +934,24 @@ impl Builder { new_id } } + #[doc = "Appends an OpTypeTaskSequenceINTEL instruction and returns the result id, or return the existing id if the instruction was already present."] + pub fn type_task_sequence_intel(&mut self) -> spirv::Word { + self.type_task_sequence_intel_id(None) + } + #[doc = "Appends an OpTypeTaskSequenceINTEL instruction and returns the result id, or return the existing id if the instruction was already present."] + pub fn type_task_sequence_intel_id(&mut self, result_id: Option) -> spirv::Word { + let mut inst = + dr::Instruction::new(spirv::Op::TypeTaskSequenceINTEL, None, result_id, vec![]); + if let Some(result_id) = result_id { + self.module.types_global_values.push(inst); + result_id + } else if let Some(id) = self.dedup_insert_type(&inst) { + id + } else { + let new_id = self.id(); + inst.result_id = Some(new_id); + self.module.types_global_values.push(inst); + new_id + } + } } diff --git a/rspirv/grammar/autogen_table.rs b/rspirv/grammar/autogen_table.rs index b293c22..91925d5 100644 --- a/rspirv/grammar/autogen_table.rs +++ b/rspirv/grammar/autogen_table.rs @@ -4535,11 +4535,17 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( TypeAccelerationStructureKHR, - [RayTracingNV, RayTracingKHR, RayQueryKHR], + [ + RayTracingNV, + RayTracingKHR, + RayQueryKHR, + DisplacementMicromapNV + ], [ "SPV_NV_ray_tracing", "SPV_KHR_ray_tracing", - "SPV_KHR_ray_query" + "SPV_KHR_ray_query", + "SPV_NV_displacement_micromap" ], [(IdResult, One)] ), @@ -6496,7 +6502,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), - (LiteralInteger, One), (LiteralInteger, One) ] ), @@ -6541,6 +6546,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), + (LiteralInteger, One), (LiteralInteger, One) ] ), @@ -7103,6 +7109,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), + (LiteralInteger, One), (LiteralInteger, One) ] ), @@ -7138,7 +7145,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7154,7 +7160,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7170,7 +7175,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7186,7 +7190,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7202,7 +7205,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7218,7 +7220,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7234,7 +7235,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7250,7 +7250,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7266,7 +7265,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7282,7 +7280,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7298,7 +7295,6 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdResultType, One), (IdResult, One), (IdRef, One), - (IdRef, One), (LiteralInteger, One), (LiteralInteger, One), (LiteralInteger, One), @@ -7344,12 +7340,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ FPGARegINTEL, [FPGARegINTEL], ["SPV_INTEL_fpga_reg"], - [ - (IdResultType, One), - (IdResult, One), - (IdRef, One), - (IdRef, One) - ] + [(IdResultType, One), (IdResult, One), (IdRef, One)] ), inst!( RayQueryGetRayTMinKHR, @@ -7591,6 +7582,44 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ [], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), + inst!( + TaskSequenceCreateINTEL, + [TaskSequenceINTEL], + [], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (LiteralInteger, One), + (LiteralInteger, One), + (LiteralInteger, One), + (LiteralInteger, One) + ] + ), + inst!( + TaskSequenceAsyncINTEL, + [TaskSequenceINTEL], + [], + [(IdRef, One), (IdRef, ZeroOrMore)] + ), + inst!( + TaskSequenceGetINTEL, + [TaskSequenceINTEL], + [], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), + inst!( + TaskSequenceReleaseINTEL, + [TaskSequenceINTEL], + [], + [(IdRef, One)] + ), + inst!( + TypeTaskSequenceINTEL, + [TaskSequenceINTEL], + [], + [(IdResult, One)] + ), inst!( SubgroupBlockPrefetchINTEL, [SubgroupBufferPrefetchINTEL], @@ -7695,6 +7724,19 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (MatrixMultiplyAccumulateOperands, ZeroOrOne) ] ), + inst!( + BitwiseFunctionINTEL, + [TernaryBitwiseFunctionINTEL], + [], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One) + ] + ), inst!( GroupIMulKHR, [GroupUniformArithmeticKHR], @@ -7791,6 +7833,12 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), + inst!( + RoundFToTF32INTEL, + [TensorFloat32RoundingINTEL], + [], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), inst!( MaskedGatherINTEL, [MaskedGatherScatterINTEL], diff --git a/rspirv/lift/autogen_context.rs b/rspirv/lift/autogen_context.rs index e1d20c2..98aa714 100644 --- a/rspirv/lift/autogen_context.rs +++ b/rspirv/lift/autogen_context.rs @@ -10721,31 +10721,25 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + m_result: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - from_sign: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { - Some(dr::Operand::LiteralBit32(value)) => Some(*value), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10765,31 +10759,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10803,7 +10797,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10815,19 +10809,19 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10841,25 +10835,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + to_sign: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + rounding: (match operands.next() { + Some(dr::Operand::LiteralBit32(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10873,7 +10873,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10885,31 +10885,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + m_result: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10923,7 +10923,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10935,31 +10935,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10973,7 +10973,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10985,31 +10985,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11023,7 +11023,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11035,31 +11035,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11073,7 +11073,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11085,7 +11085,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11099,7 +11099,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11111,7 +11111,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11125,7 +11125,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11137,7 +11137,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11151,7 +11151,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11163,7 +11163,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11177,7 +11177,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11189,7 +11189,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11203,31 +11203,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11241,31 +11241,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11279,31 +11279,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11317,7 +11317,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11329,31 +11329,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11367,31 +11367,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11405,31 +11405,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11443,31 +11443,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11481,31 +11481,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11519,31 +11519,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11557,31 +11557,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11595,31 +11595,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11633,31 +11633,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11671,31 +11671,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11709,31 +11709,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11747,31 +11747,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11785,31 +11785,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11823,31 +11823,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11861,31 +11861,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11899,31 +11899,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -11937,31 +11937,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12013,31 +12013,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12051,31 +12051,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12089,31 +12089,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12127,7 +12127,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12139,31 +12139,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12177,7 +12177,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12189,31 +12189,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12227,7 +12227,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12239,31 +12239,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m2: (match operands.next() { + mb: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + rounding: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12277,7 +12277,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - m1: (match operands.next() { + ma: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12289,25 +12289,31 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - mout: (match operands.next() { + sign_of_b: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - enable_subnormals: (match operands.next() { + mresult: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_mode: (match operands.next() { + subnormal: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) .ok_or(OperandError::Missing)?, - rounding_accuracy: (match operands.next() { + rounding: (match operands.next() { + Some(dr::Operand::LiteralBit32(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + accuracy: (match operands.next() { Some(dr::Operand::LiteralBit32(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -12361,12 +12367,6 @@ impl LiftContext { }, }), 5923u32 => Ok(ops::Op::FixedSqrtINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12405,12 +12405,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5924u32 => Ok(ops::Op::FixedRecipINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12449,12 +12443,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5925u32 => Ok(ops::Op::FixedRsqrtINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12493,12 +12481,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5926u32 => Ok(ops::Op::FixedSinINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12537,12 +12519,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5927u32 => Ok(ops::Op::FixedCosINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12581,12 +12557,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5928u32 => Ok(ops::Op::FixedSinCosINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12625,12 +12595,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5929u32 => Ok(ops::Op::FixedSinPiINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12669,12 +12633,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5930u32 => Ok(ops::Op::FixedCosPiINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12713,12 +12671,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5931u32 => Ok(ops::Op::FixedSinCosPiINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12757,12 +12709,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5932u32 => Ok(ops::Op::FixedLogINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12801,12 +12747,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5933u32 => Ok(ops::Op::FixedExpINTEL { - input_type: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -12889,12 +12829,6 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5949u32 => Ok(ops::Op::FPGARegINTEL { - result: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(*value), - Some(_) => return Err(OperandError::WrongType.into()), - None => None, - }) - .ok_or(OperandError::Missing)?, input: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -13215,6 +13149,73 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 6163u32 => Ok(ops::Op::TaskSequenceCreateINTEL { + function: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + pipelined: (match operands.next() { + Some(dr::Operand::LiteralBit32(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + use_stall_enable_clusters: (match operands.next() { + Some(dr::Operand::LiteralBit32(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + get_capacity: (match operands.next() { + Some(dr::Operand::LiteralBit32(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + async_capacity: (match operands.next() { + Some(dr::Operand::LiteralBit32(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 6164u32 => Ok(ops::Op::TaskSequenceAsyncINTEL { + sequence: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + arguments: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + } { + vec.push(item); + } + vec + }, + }), + 6165u32 => Ok(ops::Op::TaskSequenceGetINTEL { + sequence: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 6166u32 => Ok(ops::Op::TaskSequenceReleaseINTEL { + sequence: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), 6221u32 => Ok(ops::Op::SubgroupBlockPrefetchINTEL { ptr: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), @@ -13569,6 +13570,32 @@ impl LiftContext { None => None, }, }), + 6242u32 => Ok(ops::Op::BitwiseFunctionINTEL { + a: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + b: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + c: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + lut_index: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), 6401u32 => Ok(ops::Op::GroupIMulKHR { execution: (match operands.next() { Some(dr::Operand::IdScope(value)) => Some(*value), @@ -13729,6 +13756,14 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 6426u32 => Ok(ops::Op::RoundFToTF32INTEL { + float_value: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), 6428u32 => Ok(ops::Op::MaskedGatherINTEL { ptr_vector: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), @@ -14159,6 +14194,7 @@ impl LiftContext { vec }, }), + 6199u32 => Ok(Type::TaskSequenceINTEL), _ => Err(InstructionError::WrongOpcode), } } diff --git a/rspirv/sr/autogen_ops.rs b/rspirv/sr/autogen_ops.rs index a031eb1..8e4668d 100644 --- a/rspirv/sr/autogen_ops.rs +++ b/rspirv/sr/autogen_ops.rs @@ -2745,267 +2745,267 @@ pub enum Op { }, ArbitraryFloatSinCosPiINTEL { a: spirv::Word, - m1: u32, - mout: u32, - from_sign: u32, - enable_subnormals: u32, - rounding_mode: u32, + ma: u32, + m_result: u32, + subnormal: u32, + rounding: u32, rounding_accuracy: u32, }, ArbitraryFloatCastINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatCastFromIntINTEL { a: spirv::Word, - mout: u32, + mresult: u32, from_sign: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatCastToIntINTEL { a: spirv::Word, - m1: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + to_sign: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatAddINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + mb: u32, + m_result: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatSubINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + mb: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatMulINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + mb: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatDivINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + mb: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatGTINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, + mb: u32, }, ArbitraryFloatGEINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, + mb: u32, }, ArbitraryFloatLTINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, + mb: u32, }, ArbitraryFloatLEINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, + mb: u32, }, ArbitraryFloatEQINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, + mb: u32, }, ArbitraryFloatRecipINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatRSqrtINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatCbrtINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatHypotINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + mb: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatSqrtINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatLogINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatLog2INTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatLog10INTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatLog1pINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatExpINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatExp2INTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatExp10INTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatExpm1INTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatSinINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatCosINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatSinCosINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatSinPiINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatCosPiINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatASinINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatASinPiINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatACosINTEL { a: spirv::Word, @@ -3017,66 +3017,67 @@ pub enum Op { }, ArbitraryFloatACosPiINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatATanINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatATanPiINTEL { a: spirv::Word, - m1: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + ma: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatATan2INTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + mb: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatPowINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + mb: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatPowRINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - m2: u32, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + mb: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, ArbitraryFloatPowNINTEL { a: spirv::Word, - m1: u32, + ma: u32, b: spirv::Word, - mout: u32, - enable_subnormals: u32, - rounding_mode: u32, - rounding_accuracy: u32, + sign_of_b: u32, + mresult: u32, + subnormal: u32, + rounding: u32, + accuracy: u32, }, LoopControlINTEL { loop_control_parameters: Vec, @@ -3092,7 +3093,6 @@ pub enum Op { alias_scope1_alias_scope2: Vec, }, FixedSqrtINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3101,7 +3101,6 @@ pub enum Op { o: u32, }, FixedRecipINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3110,7 +3109,6 @@ pub enum Op { o: u32, }, FixedRsqrtINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3119,7 +3117,6 @@ pub enum Op { o: u32, }, FixedSinINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3128,7 +3125,6 @@ pub enum Op { o: u32, }, FixedCosINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3137,7 +3133,6 @@ pub enum Op { o: u32, }, FixedSinCosINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3146,7 +3141,6 @@ pub enum Op { o: u32, }, FixedSinPiINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3155,7 +3149,6 @@ pub enum Op { o: u32, }, FixedCosPiINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3164,7 +3157,6 @@ pub enum Op { o: u32, }, FixedSinCosPiINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3173,7 +3165,6 @@ pub enum Op { o: u32, }, FixedLogINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3182,7 +3173,6 @@ pub enum Op { o: u32, }, FixedExpINTEL { - input_type: Token, input: spirv::Word, s: u32, i: u32, @@ -3205,7 +3195,6 @@ pub enum Op { packet_alignment: spirv::Word, }, FPGARegINTEL { - result: spirv::Word, input: spirv::Word, }, RayQueryGetRayTMinKHR { @@ -3299,6 +3288,23 @@ pub enum Op { ArithmeticFenceEXT { target: spirv::Word, }, + TaskSequenceCreateINTEL { + function: spirv::Word, + pipelined: u32, + use_stall_enable_clusters: u32, + get_capacity: u32, + async_capacity: u32, + }, + TaskSequenceAsyncINTEL { + sequence: spirv::Word, + arguments: Vec, + }, + TaskSequenceGetINTEL { + sequence: spirv::Word, + }, + TaskSequenceReleaseINTEL { + sequence: spirv::Word, + }, SubgroupBlockPrefetchINTEL { ptr: spirv::Word, num_bytes: spirv::Word, @@ -3370,6 +3376,12 @@ pub enum Op { matrix_c: spirv::Word, matrix_multiply_accumulate_operands: Option, }, + BitwiseFunctionINTEL { + a: spirv::Word, + b: spirv::Word, + c: spirv::Word, + lut_index: spirv::Word, + }, GroupIMulKHR { execution: spirv::Word, operation: spirv::GroupOperation, @@ -3410,6 +3422,9 @@ pub enum Op { operation: spirv::GroupOperation, x: spirv::Word, }, + RoundFToTF32INTEL { + float_value: spirv::Word, + }, MaskedGatherINTEL { ptr_vector: spirv::Word, alignment: u32, diff --git a/rspirv/sr/autogen_types.rs b/rspirv/sr/autogen_types.rs index 9f8c5b2..fb78098 100644 --- a/rspirv/sr/autogen_types.rs +++ b/rspirv/sr/autogen_types.rs @@ -112,4 +112,5 @@ pub enum Type { StructContinuedINTEL { member_0_type_member_1_type: Vec, }, + TaskSequenceINTEL, } diff --git a/spirv/Cargo.toml b/spirv/Cargo.toml index d7dd28e..0723db7 100644 --- a/spirv/Cargo.toml +++ b/spirv/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "spirv" -version = "0.3.0+sdk-1.4.309.0" +version = "0.3.0+sdk-1.4.313.0" authors = ["Lei Zhang "] edition = "2018" diff --git a/spirv/autogen_spirv.rs b/spirv/autogen_spirv.rs index c106d5b..08956dd 100644 --- a/spirv/autogen_spirv.rs +++ b/spirv/autogen_spirv.rs @@ -278,6 +278,8 @@ pub enum ExecutionMode { SignedZeroInfNanPreserve = 4461u32, RoundingModeRTE = 4462u32, RoundingModeRTZ = 4463u32, + NonCoherentTileAttachmentReadQCOM = 4489u32, + TileShadingRateQCOM = 4490u32, EarlyAndLateFragmentTestsAMD = 5017u32, StencilRefReplacingEXT = 5027u32, CoalescingAMDX = 5069u32, @@ -335,6 +337,7 @@ impl ExecutionMode { 4421u32 => unsafe { core::mem::transmute::(4421u32) }, 4446u32 => unsafe { core::mem::transmute::(4446u32) }, 4459u32..=4463u32 => unsafe { core::mem::transmute::(n) }, + 4489u32..=4490u32 => unsafe { core::mem::transmute::(n) }, 5017u32 => unsafe { core::mem::transmute::(5017u32) }, 5027u32 => unsafe { core::mem::transmute::(5027u32) }, 5069u32..=5073u32 => unsafe { core::mem::transmute::(n) }, @@ -420,6 +423,8 @@ impl core::str::FromStr for ExecutionMode { "SignedZeroInfNanPreserve" => Self::SignedZeroInfNanPreserve, "RoundingModeRTE" => Self::RoundingModeRTE, "RoundingModeRTZ" => Self::RoundingModeRTZ, + "NonCoherentTileAttachmentReadQCOM" => Self::NonCoherentTileAttachmentReadQCOM, + "TileShadingRateQCOM" => Self::TileShadingRateQCOM, "EarlyAndLateFragmentTestsAMD" => Self::EarlyAndLateFragmentTestsAMD, "StencilRefReplacingEXT" => Self::StencilRefReplacingEXT, "CoalescingAMDX" => Self::CoalescingAMDX, @@ -496,6 +501,7 @@ pub enum StorageClass { Image = 11u32, StorageBuffer = 12u32, TileImageEXT = 4172u32, + TileAttachmentQCOM = 4491u32, NodePayloadAMDX = 5068u32, CallableDataKHR = 5328u32, IncomingCallableDataKHR = 5329u32, @@ -515,6 +521,7 @@ impl StorageClass { Some(match n { 0u32..=12u32 => unsafe { core::mem::transmute::(n) }, 4172u32 => unsafe { core::mem::transmute::(4172u32) }, + 4491u32 => unsafe { core::mem::transmute::(4491u32) }, 5068u32 => unsafe { core::mem::transmute::(5068u32) }, 5328u32..=5329u32 => unsafe { core::mem::transmute::(n) }, 5338u32..=5339u32 => unsafe { core::mem::transmute::(n) }, @@ -556,6 +563,7 @@ impl core::str::FromStr for StorageClass { "Image" => Self::Image, "StorageBuffer" => Self::StorageBuffer, "TileImageEXT" => Self::TileImageEXT, + "TileAttachmentQCOM" => Self::TileAttachmentQCOM, "NodePayloadAMDX" => Self::NodePayloadAMDX, "CallableDataKHR" => Self::CallableDataKHR, "CallableDataNV" => Self::CallableDataKHR, @@ -889,15 +897,21 @@ pub enum ImageChannelDataType { Float = 14u32, UnormInt24 = 15u32, UnormInt101010_2 = 16u32, + UnormInt10X6EXT = 17u32, UnsignedIntRaw10EXT = 19u32, UnsignedIntRaw12EXT = 20u32, UnormInt2_101010EXT = 21u32, + UnsignedInt10X6EXT = 22u32, + UnsignedInt12X4EXT = 23u32, + UnsignedInt14X2EXT = 24u32, + UnormInt12X4EXT = 25u32, + UnormInt14X2EXT = 26u32, } impl ImageChannelDataType { pub fn from_u32(n: u32) -> Option { Some(match n { - 0u32..=16u32 => unsafe { core::mem::transmute::(n) }, - 19u32..=21u32 => unsafe { core::mem::transmute::(n) }, + 0u32..=17u32 => unsafe { core::mem::transmute::(n) }, + 19u32..=26u32 => unsafe { core::mem::transmute::(n) }, _ => return None, }) } @@ -925,9 +939,15 @@ impl core::str::FromStr for ImageChannelDataType { "Float" => Self::Float, "UnormInt24" => Self::UnormInt24, "UnormInt101010_2" => Self::UnormInt101010_2, + "UnormInt10X6EXT" => Self::UnormInt10X6EXT, "UnsignedIntRaw10EXT" => Self::UnsignedIntRaw10EXT, "UnsignedIntRaw12EXT" => Self::UnsignedIntRaw12EXT, "UnormInt2_101010EXT" => Self::UnormInt2_101010EXT, + "UnsignedInt10X6EXT" => Self::UnsignedInt10X6EXT, + "UnsignedInt12X4EXT" => Self::UnsignedInt12X4EXT, + "UnsignedInt14X2EXT" => Self::UnsignedInt14X2EXT, + "UnormInt12X4EXT" => Self::UnormInt12X4EXT, + "UnormInt14X2EXT" => Self::UnormInt14X2EXT, _ => return Err(()), }) } @@ -1682,6 +1702,9 @@ pub enum BuiltIn { DeviceIndex = 4438u32, ViewIndex = 4440u32, ShadingRateKHR = 4444u32, + TileOffsetQCOM = 4492u32, + TileDimensionQCOM = 4493u32, + TileApronSizeQCOM = 4494u32, BaryCoordNoPerspAMD = 4992u32, BaryCoordNoPerspCentroidAMD = 4993u32, BaryCoordNoPerspSampleAMD = 4994u32, @@ -1762,6 +1785,7 @@ impl BuiltIn { 4438u32 => unsafe { core::mem::transmute::(4438u32) }, 4440u32 => unsafe { core::mem::transmute::(4440u32) }, 4444u32 => unsafe { core::mem::transmute::(4444u32) }, + 4492u32..=4494u32 => unsafe { core::mem::transmute::(n) }, 4992u32..=4998u32 => unsafe { core::mem::transmute::(n) }, 5014u32 => unsafe { core::mem::transmute::(5014u32) }, 5021u32 => unsafe { core::mem::transmute::(5021u32) }, @@ -1882,6 +1906,9 @@ impl core::str::FromStr for BuiltIn { "DeviceIndex" => Self::DeviceIndex, "ViewIndex" => Self::ViewIndex, "ShadingRateKHR" => Self::ShadingRateKHR, + "TileOffsetQCOM" => Self::TileOffsetQCOM, + "TileDimensionQCOM" => Self::TileDimensionQCOM, + "TileApronSizeQCOM" => Self::TileApronSizeQCOM, "BaryCoordNoPerspAMD" => Self::BaryCoordNoPerspAMD, "BaryCoordNoPerspCentroidAMD" => Self::BaryCoordNoPerspCentroidAMD, "BaryCoordNoPerspSampleAMD" => Self::BaryCoordNoPerspSampleAMD, @@ -2199,6 +2226,7 @@ pub enum Capability { TextureSampleWeightedQCOM = 4484u32, TextureBoxFilterQCOM = 4485u32, TextureBlockMatchQCOM = 4486u32, + TileShadingQCOM = 4495u32, TextureBlockMatch2QCOM = 4498u32, Float16ImageAMD = 5008u32, ImageGatherBiasLodAMD = 5009u32, @@ -2209,6 +2237,9 @@ pub enum Capability { ShaderClockKHR = 5055u32, ShaderEnqueueAMDX = 5067u32, QuadControlKHR = 5087u32, + BFloat16TypeKHR = 5116u32, + BFloat16DotProductKHR = 5117u32, + BFloat16CooperativeMatrixKHR = 5118u32, SampleMaskOverrideCoverageNV = 5249u32, GeometryShaderPassthroughNV = 5251u32, ShaderViewportIndexLayerEXT = 5254u32, @@ -2331,6 +2362,7 @@ pub enum Capability { ArithmeticFenceEXT = 6144u32, FPGAClusterAttributesV2INTEL = 6150u32, FPGAKernelAttributesv2INTEL = 6161u32, + TaskSequenceINTEL = 6162u32, FPMaxErrorINTEL = 6169u32, FPGALatencyControlINTEL = 6171u32, FPGAArgumentInterfacesINTEL = 6174u32, @@ -2341,7 +2373,9 @@ pub enum Capability { Subgroup2DBlockTransformINTEL = 6229u32, Subgroup2DBlockTransposeINTEL = 6230u32, SubgroupMatrixMultiplyAccumulateINTEL = 6236u32, + TernaryBitwiseFunctionINTEL = 6241u32, GroupUniformArithmeticKHR = 6400u32, + TensorFloat32RoundingINTEL = 6425u32, MaskedGatherScatterINTEL = 6427u32, CacheControlsINTEL = 6441u32, RegisterLimitsINTEL = 6460u32, @@ -2365,6 +2399,7 @@ impl Capability { 4471u32..=4473u32 => unsafe { core::mem::transmute::(n) }, 4478u32..=4479u32 => unsafe { core::mem::transmute::(n) }, 4484u32..=4486u32 => unsafe { core::mem::transmute::(n) }, + 4495u32 => unsafe { core::mem::transmute::(4495u32) }, 4498u32 => unsafe { core::mem::transmute::(4498u32) }, 5008u32..=5010u32 => unsafe { core::mem::transmute::(n) }, 5013u32 => unsafe { core::mem::transmute::(5013u32) }, @@ -2372,6 +2407,7 @@ impl Capability { 5055u32 => unsafe { core::mem::transmute::(5055u32) }, 5067u32 => unsafe { core::mem::transmute::(5067u32) }, 5087u32 => unsafe { core::mem::transmute::(5087u32) }, + 5116u32..=5118u32 => unsafe { core::mem::transmute::(n) }, 5249u32 => unsafe { core::mem::transmute::(5249u32) }, 5251u32 => unsafe { core::mem::transmute::(5251u32) }, 5254u32..=5255u32 => unsafe { core::mem::transmute::(n) }, @@ -2443,7 +2479,7 @@ impl Capability { 6141u32 => unsafe { core::mem::transmute::(6141u32) }, 6144u32 => unsafe { core::mem::transmute::(6144u32) }, 6150u32 => unsafe { core::mem::transmute::(6150u32) }, - 6161u32 => unsafe { core::mem::transmute::(6161u32) }, + 6161u32..=6162u32 => unsafe { core::mem::transmute::(n) }, 6169u32 => unsafe { core::mem::transmute::(6169u32) }, 6171u32 => unsafe { core::mem::transmute::(6171u32) }, 6174u32 => unsafe { core::mem::transmute::(6174u32) }, @@ -2452,7 +2488,9 @@ impl Capability { 6220u32 => unsafe { core::mem::transmute::(6220u32) }, 6228u32..=6230u32 => unsafe { core::mem::transmute::(n) }, 6236u32 => unsafe { core::mem::transmute::(6236u32) }, + 6241u32 => unsafe { core::mem::transmute::(6241u32) }, 6400u32 => unsafe { core::mem::transmute::(6400u32) }, + 6425u32 => unsafe { core::mem::transmute::(6425u32) }, 6427u32 => unsafe { core::mem::transmute::(6427u32) }, 6441u32 => unsafe { core::mem::transmute::(6441u32) }, 6460u32 => unsafe { core::mem::transmute::(6460u32) }, @@ -2619,6 +2657,7 @@ impl core::str::FromStr for Capability { "TextureSampleWeightedQCOM" => Self::TextureSampleWeightedQCOM, "TextureBoxFilterQCOM" => Self::TextureBoxFilterQCOM, "TextureBlockMatchQCOM" => Self::TextureBlockMatchQCOM, + "TileShadingQCOM" => Self::TileShadingQCOM, "TextureBlockMatch2QCOM" => Self::TextureBlockMatch2QCOM, "Float16ImageAMD" => Self::Float16ImageAMD, "ImageGatherBiasLodAMD" => Self::ImageGatherBiasLodAMD, @@ -2629,6 +2668,9 @@ impl core::str::FromStr for Capability { "ShaderClockKHR" => Self::ShaderClockKHR, "ShaderEnqueueAMDX" => Self::ShaderEnqueueAMDX, "QuadControlKHR" => Self::QuadControlKHR, + "BFloat16TypeKHR" => Self::BFloat16TypeKHR, + "BFloat16DotProductKHR" => Self::BFloat16DotProductKHR, + "BFloat16CooperativeMatrixKHR" => Self::BFloat16CooperativeMatrixKHR, "SampleMaskOverrideCoverageNV" => Self::SampleMaskOverrideCoverageNV, "GeometryShaderPassthroughNV" => Self::GeometryShaderPassthroughNV, "ShaderViewportIndexLayerEXT" => Self::ShaderViewportIndexLayerEXT, @@ -2807,6 +2849,7 @@ impl core::str::FromStr for Capability { "ArithmeticFenceEXT" => Self::ArithmeticFenceEXT, "FPGAClusterAttributesV2INTEL" => Self::FPGAClusterAttributesV2INTEL, "FPGAKernelAttributesv2INTEL" => Self::FPGAKernelAttributesv2INTEL, + "TaskSequenceINTEL" => Self::TaskSequenceINTEL, "FPMaxErrorINTEL" => Self::FPMaxErrorINTEL, "FPGALatencyControlINTEL" => Self::FPGALatencyControlINTEL, "FPGAArgumentInterfacesINTEL" => Self::FPGAArgumentInterfacesINTEL, @@ -2817,7 +2860,9 @@ impl core::str::FromStr for Capability { "Subgroup2DBlockTransformINTEL" => Self::Subgroup2DBlockTransformINTEL, "Subgroup2DBlockTransposeINTEL" => Self::Subgroup2DBlockTransposeINTEL, "SubgroupMatrixMultiplyAccumulateINTEL" => Self::SubgroupMatrixMultiplyAccumulateINTEL, + "TernaryBitwiseFunctionINTEL" => Self::TernaryBitwiseFunctionINTEL, "GroupUniformArithmeticKHR" => Self::GroupUniformArithmeticKHR, + "TensorFloat32RoundingINTEL" => Self::TensorFloat32RoundingINTEL, "MaskedGatherScatterINTEL" => Self::MaskedGatherScatterINTEL, "CacheControlsINTEL" => Self::CacheControlsINTEL, "RegisterLimitsINTEL" => Self::RegisterLimitsINTEL, @@ -3200,12 +3245,12 @@ bitflags! { # [doc = "SPIR-V operand kind: [MatrixMultiplyAccumulateOperands](ht #[cfg_attr(feature = "deserialize", derive(serde::Deserialize))] #[allow(clippy::upper_case_acronyms)] pub enum FPEncoding { - Max = 0x7fffffff, + BFloat16KHR = 0u32, } impl FPEncoding { pub fn from_u32(n: u32) -> Option { Some(match n { - 0x7fffffff => Self::Max, + 0u32 => unsafe { core::mem::transmute::(0u32) }, _ => return None, }) } @@ -3216,7 +3261,7 @@ impl core::str::FromStr for FPEncoding { type Err = (); fn from_str(s: &str) -> Result { Ok(match s { - "Max" => Self::Max, + "BFloat16KHR" => Self::BFloat16KHR, _ => return Err(()), }) } @@ -4091,6 +4136,11 @@ pub enum Op { ControlBarrierArriveINTEL = 6142u32, ControlBarrierWaitINTEL = 6143u32, ArithmeticFenceEXT = 6145u32, + TaskSequenceCreateINTEL = 6163u32, + TaskSequenceAsyncINTEL = 6164u32, + TaskSequenceGetINTEL = 6165u32, + TaskSequenceReleaseINTEL = 6166u32, + TypeTaskSequenceINTEL = 6199u32, SubgroupBlockPrefetchINTEL = 6221u32, Subgroup2DBlockLoadINTEL = 6231u32, Subgroup2DBlockLoadTransformINTEL = 6232u32, @@ -4098,6 +4148,7 @@ pub enum Op { Subgroup2DBlockPrefetchINTEL = 6234u32, Subgroup2DBlockStoreINTEL = 6235u32, SubgroupMatrixMultiplyAccumulateINTEL = 6237u32, + BitwiseFunctionINTEL = 6242u32, GroupIMulKHR = 6401u32, GroupFMulKHR = 6402u32, GroupBitwiseAndKHR = 6403u32, @@ -4106,6 +4157,7 @@ pub enum Op { GroupLogicalAndKHR = 6406u32, GroupLogicalOrKHR = 6407u32, GroupLogicalXorKHR = 6408u32, + RoundFToTF32INTEL = 6426u32, MaskedGatherINTEL = 6428u32, MaskedScatterINTEL = 6429u32, } @@ -4187,10 +4239,14 @@ impl Op { 6116u32..=6117u32 => unsafe { core::mem::transmute::(n) }, 6142u32..=6143u32 => unsafe { core::mem::transmute::(n) }, 6145u32 => unsafe { core::mem::transmute::(6145u32) }, + 6163u32..=6166u32 => unsafe { core::mem::transmute::(n) }, + 6199u32 => unsafe { core::mem::transmute::(6199u32) }, 6221u32 => unsafe { core::mem::transmute::(6221u32) }, 6231u32..=6235u32 => unsafe { core::mem::transmute::(n) }, 6237u32 => unsafe { core::mem::transmute::(6237u32) }, + 6242u32 => unsafe { core::mem::transmute::(6242u32) }, 6401u32..=6408u32 => unsafe { core::mem::transmute::(n) }, + 6426u32 => unsafe { core::mem::transmute::(6426u32) }, 6428u32..=6429u32 => unsafe { core::mem::transmute::(n) }, _ => return None, }) @@ -4251,6 +4307,7 @@ impl Op { | Self::TypeTensorViewNV | Self::TypeBufferSurfaceINTEL | Self::TypeStructContinuedINTEL + | Self::TypeTaskSequenceINTEL ) } #[doc = r" Returns [`true`] if the given opcode is a constant-defining instruction."] From b364681a90eaf346f0c3457729be83083227d722 Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Sun, 21 Sep 2025 13:05:13 +0200 Subject: [PATCH 2/3] Regenerate on `sdk-1.4.321.0` --- autogen/external/SPIRV-Headers | 2 +- autogen/src/structs.rs | 2 + rspirv/Cargo.toml | 2 +- rspirv/binary/assemble.rs | 1 + rspirv/binary/autogen_decode_operand.rs | 11 + rspirv/binary/autogen_disas_operand.rs | 24 ++ rspirv/binary/autogen_error.rs | 6 + rspirv/binary/autogen_parse_operand.rs | 22 ++ rspirv/dr/autogen_operand.rs | 127 +++++-- rspirv/dr/build/autogen_norm_insts.rs | 461 ++++++++++++++++++++++++ rspirv/dr/build/autogen_type.rs | 76 ++++ rspirv/grammar/autogen_table.rs | 106 ++++++ rspirv/lift/autogen_context.rs | 202 ++++++++++- rspirv/sr/autogen_decoration.rs | 1 + rspirv/sr/autogen_ops.rs | 47 ++- rspirv/sr/autogen_types.rs | 9 + spirv/Cargo.toml | 2 +- spirv/autogen_spirv.rs | 58 ++- 18 files changed, 1129 insertions(+), 30 deletions(-) diff --git a/autogen/external/SPIRV-Headers b/autogen/external/SPIRV-Headers index aa6cef1..2a611a9 160000 --- a/autogen/external/SPIRV-Headers +++ b/autogen/external/SPIRV-Headers @@ -1 +1 @@ -Subproject commit aa6cef192b8e693916eb713e7a9ccadf06062ceb +Subproject commit 2a611a970fdbc41ac2e3e328802aed9985352dca diff --git a/autogen/src/structs.rs b/autogen/src/structs.rs index 5f3c573..8e0caf9 100644 --- a/autogen/src/structs.rs +++ b/autogen/src/structs.rs @@ -153,6 +153,8 @@ pub enum Class { DeviceSideEnqueue, #[serde(rename = "Non-Uniform")] NonUniform, + Tensor, + Graph, Reserved, #[serde(rename = "@exclude")] Exclude, diff --git a/rspirv/Cargo.toml b/rspirv/Cargo.toml index 8cb4011..8da696a 100644 --- a/rspirv/Cargo.toml +++ b/rspirv/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "rspirv" -version = "0.12.0+sdk-1.4.313.0" +version = "0.12.0+sdk-1.4.321.0" authors = ["Lei Zhang "] edition = "2018" diff --git a/rspirv/binary/assemble.rs b/rspirv/binary/assemble.rs index 916dd2d..643a904 100644 --- a/rspirv/binary/assemble.rs +++ b/rspirv/binary/assemble.rs @@ -94,6 +94,7 @@ impl Assemble for dr::Operand { Self::CooperativeMatrixReduce(v) => result.push(v.bits()), Self::TensorClampMode(v) => result.push(v as u32), Self::TensorAddressingOperands(v) => result.push(v.bits()), + Self::TensorOperands(v) => result.push(v.bits()), Self::InitializationModeQualifier(v) => result.push(v as u32), Self::LoadCacheControl(v) => result.push(v as u32), Self::StoreCacheControl(v) => result.push(v as u32), diff --git a/rspirv/binary/autogen_decode_operand.rs b/rspirv/binary/autogen_decode_operand.rs index 43e9b96..2996aec 100644 --- a/rspirv/binary/autogen_decode_operand.rs +++ b/rspirv/binary/autogen_decode_operand.rs @@ -602,4 +602,15 @@ impl Decoder<'_> { Err(Error::StreamExpected(self.offset)) } } + #[doc = "Decodes and returns the next SPIR-V word as\na SPIR-V TensorOperands value."] + pub fn tensor_operands(&mut self) -> Result { + if let Ok(word) = self.word() { + spirv::TensorOperands::from_bits(word).ok_or(Error::TensorOperandsUnknown( + self.offset - WORD_NUM_BYTES, + word, + )) + } else { + Err(Error::StreamExpected(self.offset)) + } + } } diff --git a/rspirv/binary/autogen_disas_operand.rs b/rspirv/binary/autogen_disas_operand.rs index 2deda2f..edf5eac 100644 --- a/rspirv/binary/autogen_disas_operand.rs +++ b/rspirv/binary/autogen_disas_operand.rs @@ -481,3 +481,27 @@ impl Disassemble for spirv::MatrixMultiplyAccumulateOperands { bits.join("|") } } +impl Disassemble for spirv::TensorOperands { + fn disassemble(&self) -> String { + if self.is_empty() { + return "None".to_string(); + } + let mut bits = vec![]; + if self.contains(spirv::TensorOperands::NONTEMPORAL_ARM) { + bits.push("NontemporalARM") + } + if self.contains(spirv::TensorOperands::OUT_OF_BOUNDS_VALUE_ARM) { + bits.push("OutOfBoundsValueARM") + } + if self.contains(spirv::TensorOperands::MAKE_ELEMENT_AVAILABLE_ARM) { + bits.push("MakeElementAvailableARM") + } + if self.contains(spirv::TensorOperands::MAKE_ELEMENT_VISIBLE_ARM) { + bits.push("MakeElementVisibleARM") + } + if self.contains(spirv::TensorOperands::NON_PRIVATE_ELEMENT_ARM) { + bits.push("NonPrivateElementARM") + } + bits.join("|") + } +} diff --git a/rspirv/binary/autogen_error.rs b/rspirv/binary/autogen_error.rs index 9dca54b..704a169 100644 --- a/rspirv/binary/autogen_error.rs +++ b/rspirv/binary/autogen_error.rs @@ -65,6 +65,7 @@ pub enum Error { FPEncodingUnknown(usize, spirv::Word), CooperativeVectorMatrixLayoutUnknown(usize, spirv::Word), ComponentTypeUnknown(usize, spirv::Word), + TensorOperandsUnknown(usize, spirv::Word), #[doc = r"Failed to decode a string."] #[doc = r""] #[doc = r"For structured error handling, the second element could be"] @@ -359,6 +360,11 @@ impl fmt::Display for Error { "unknown value {} for operand kind ComponentType at index {}", word, index ), + Error::TensorOperandsUnknown(index, word) => write!( + f, + "unknown value {} for operand kind TensorOperands at index {}", + word, index + ), Error::DecodeStringFailed(index, ref e) => { write!(f, "cannot decode string at index {}: {}", index, e) } diff --git a/rspirv/binary/autogen_parse_operand.rs b/rspirv/binary/autogen_parse_operand.rs index d36a32f..10611e7 100644 --- a/rspirv/binary/autogen_parse_operand.rs +++ b/rspirv/binary/autogen_parse_operand.rs @@ -198,6 +198,12 @@ impl Parser<'_, '_> { ops.append(&mut self.parse_tensor_addressing_operands_arguments(val)?); ops } + GOpKind::TensorOperands => { + let val = self.decoder.tensor_operands()?; + let mut ops = vec![dr::Operand::TensorOperands(val)]; + ops.append(&mut self.parse_tensor_operands_arguments(val)?); + ops + } GOpKind::IdResultType => panic!(), GOpKind::IdResult => panic!(), GOpKind::LiteralContextDependentNumber => panic!(), @@ -678,4 +684,20 @@ impl Parser<'_, '_> { } Ok(params) } + fn parse_tensor_operands_arguments( + &mut self, + tensor_operands: spirv::TensorOperands, + ) -> Result> { + let mut params = vec![]; + if tensor_operands.contains(spirv::TensorOperands::OUT_OF_BOUNDS_VALUE_ARM) { + params.append(&mut vec![dr::Operand::IdRef(self.decoder.id()?)]); + } + if tensor_operands.contains(spirv::TensorOperands::MAKE_ELEMENT_AVAILABLE_ARM) { + params.append(&mut vec![dr::Operand::IdRef(self.decoder.id()?)]); + } + if tensor_operands.contains(spirv::TensorOperands::MAKE_ELEMENT_VISIBLE_ARM) { + params.append(&mut vec![dr::Operand::IdRef(self.decoder.id()?)]); + } + Ok(params) + } } diff --git a/rspirv/dr/autogen_operand.rs b/rspirv/dr/autogen_operand.rs index 5f9c32d..51b3ca1 100644 --- a/rspirv/dr/autogen_operand.rs +++ b/rspirv/dr/autogen_operand.rs @@ -62,6 +62,7 @@ pub enum Operand { FPEncoding(spirv::FPEncoding), CooperativeVectorMatrixLayout(spirv::CooperativeVectorMatrixLayout), ComponentType(spirv::ComponentType), + TensorOperands(spirv::TensorOperands), IdMemorySemantics(spirv::Word), IdScope(spirv::Word), IdRef(spirv::Word), @@ -351,6 +352,11 @@ impl From for Operand { Self::ComponentType(o) } } +impl From for Operand { + fn from(o: spirv::TensorOperands) -> Self { + Self::TensorOperands(o) + } +} impl From for Operand { fn from(o: u32) -> Self { Self::LiteralBit32(o) @@ -436,6 +442,7 @@ impl fmt::Display for Operand { Operand::LiteralString(ref v) => write!(f, "{:?}", v), Operand::LiteralExtInstInteger(ref v) => write!(f, "{:?}", v), Operand::LiteralSpecConstantOpInteger(ref v) => write!(f, "{:?}", v), + Operand::TensorOperands(ref v) => write!(f, "{:?}", v), Operand::LiteralBit32(ref v) => write!(f, "{:?}", v), Operand::LiteralBit64(ref v) => write!(f, "{:?}", v), } @@ -847,6 +854,12 @@ impl Operand { ref other => panic!("Expected Operand::ComponentType, got {} instead", other), } } + pub fn unwrap_tensor_operands(&self) -> spirv::TensorOperands { + match *self { + Self::TensorOperands(v) => v, + ref other => panic!("Expected Operand::TensorOperands, got {} instead", other), + } + } pub fn unwrap_id_memory_semantics(&self) -> spirv::Word { match *self { Self::IdMemorySemantics(v) => v, @@ -1583,6 +1596,9 @@ impl Operand { s::Decoration::FPMaxErrorDecorationINTEL => { vec![spirv::Capability::FPMaxErrorINTEL] } + s::Decoration::SaturatedToLargestFloat8NormalConversionEXT => { + vec![spirv::Capability::Float8EXT] + } s::Decoration::PerVertexKHR => vec![spirv::Capability::FragmentBarycentricKHR], s::Decoration::FunctionRoundingModeINTEL | s::Decoration::FunctionDenormModeINTEL @@ -1621,8 +1637,10 @@ impl Operand { s::Decoration::AliasScopeINTEL | s::Decoration::NoAliasINTEL => { vec![spirv::Capability::MemoryAccessAliasingINTEL] } - s::Decoration::PerViewNV => vec![spirv::Capability::MeshShadingNV], - s::Decoration::PerPrimitiveEXT | s::Decoration::PerTaskNV => vec![ + s::Decoration::PerViewNV | s::Decoration::PerTaskNV => { + vec![spirv::Capability::MeshShadingNV] + } + s::Decoration::PerPrimitiveEXT => vec![ spirv::Capability::MeshShadingNV, spirv::Capability::MeshShadingEXT, ], @@ -1925,7 +1943,12 @@ impl Operand { | s::Capability::TileImageColorReadAccessEXT | s::Capability::TileImageDepthReadAccessEXT | s::Capability::TileImageStencilReadAccessEXT + | s::Capability::TensorsARM + | s::Capability::StorageTensorArrayDynamicIndexingARM + | s::Capability::StorageTensorArrayNonUniformIndexingARM + | s::Capability::GraphARM | s::Capability::CooperativeMatrixLayoutsARM + | s::Capability::Float8EXT | s::Capability::SubgroupBallotKHR | s::Capability::SubgroupVoteKHR | s::Capability::StorageBuffer16BitAccess @@ -1947,6 +1970,7 @@ impl Operand { | s::Capability::TextureBlockMatch2QCOM | s::Capability::ShaderClockKHR | s::Capability::QuadControlKHR + | s::Capability::Int4TypeINTEL | s::Capability::BFloat16TypeKHR | s::Capability::ImageFootprintNV | s::Capability::FragmentBarycentricKHR @@ -2037,7 +2061,8 @@ impl Operand { | s::Capability::TensorFloat32RoundingINTEL | s::Capability::MaskedGatherScatterINTEL | s::Capability::CacheControlsINTEL - | s::Capability::RegisterLimitsINTEL => vec![], + | s::Capability::RegisterLimitsINTEL + | s::Capability::BindlessImagesINTEL => vec![], s::Capability::GenericPointer => vec![spirv::Capability::Addresses], s::Capability::AtomicStorageOps => vec![spirv::Capability::AtomicStorage], s::Capability::BFloat16DotProductKHR => vec![spirv::Capability::BFloat16TypeKHR], @@ -2052,6 +2077,10 @@ impl Operand { s::Capability::FPGAKernelAttributesv2INTEL => { vec![spirv::Capability::FPGAKernelAttributesINTEL] } + s::Capability::Float8CooperativeMatrixEXT => vec![ + spirv::Capability::Float8EXT, + spirv::Capability::CooperativeMatrixKHR, + ], s::Capability::GeometryPointSize | s::Capability::GeometryStreams | s::Capability::MultiViewport @@ -2083,6 +2112,10 @@ impl Operand { spirv::Capability::InputAttachment, spirv::Capability::ShaderNonUniform, ], + s::Capability::Int4CooperativeMatrixINTEL => vec![ + spirv::Capability::Int4TypeINTEL, + spirv::Capability::CooperativeMatrixKHR, + ], s::Capability::Int64Atomics => vec![spirv::Capability::Int64], s::Capability::DotProductInput4x8Bit => vec![spirv::Capability::Int8], s::Capability::Vector16 @@ -2297,6 +2330,9 @@ impl Operand { }, Self::FPEncoding(v) => match v { s::FPEncoding::BFloat16KHR => vec![spirv::Capability::BFloat16TypeKHR], + s::FPEncoding::Float8E4M3EXT | s::FPEncoding::Float8E5M2EXT => { + vec![spirv::Capability::Float8EXT] + } }, Self::CooperativeVectorMatrixLayout(v) => match v { s::CooperativeVectorMatrixLayout::RowMajorNV @@ -2321,6 +2357,20 @@ impl Operand { | s::ComponentType::FloatE4M3NV | s::ComponentType::FloatE5M2NV => vec![], }, + Self::TensorOperands(v) => { + let mut result = vec![]; + if v.intersects( + s::TensorOperands::NONE_ARM + | s::TensorOperands::NONTEMPORAL_ARM + | s::TensorOperands::OUT_OF_BOUNDS_VALUE_ARM + | s::TensorOperands::MAKE_ELEMENT_AVAILABLE_ARM + | s::TensorOperands::MAKE_ELEMENT_VISIBLE_ARM + | s::TensorOperands::NON_PRIVATE_ELEMENT_ARM, + ) { + result.extend_from_slice(&[spirv::Capability::TensorsARM]) + }; + result + } _ => vec![], } } @@ -2782,6 +2832,7 @@ impl Operand { | s::Decoration::MaxByteOffset | s::Decoration::AlignmentId | s::Decoration::MaxByteOffsetId + | s::Decoration::SaturatedToLargestFloat8NormalConversionEXT | s::Decoration::NodeSharesPayloadLimitsWithAMDX | s::Decoration::NodeMaxPayloadsAMDX | s::Decoration::TrackFinishWritingAMDX @@ -2878,10 +2929,8 @@ impl Operand { "SPV_KHR_fragment_shader_barycentric", ], s::Decoration::PassthroughNV => vec!["SPV_NV_geometry_shader_passthrough"], - s::Decoration::PerViewNV => vec!["SPV_NV_mesh_shader"], - s::Decoration::PerPrimitiveEXT | s::Decoration::PerTaskNV => { - vec!["SPV_NV_mesh_shader", "SPV_EXT_mesh_shader"] - } + s::Decoration::PerViewNV | s::Decoration::PerTaskNV => vec!["SPV_NV_mesh_shader"], + s::Decoration::PerPrimitiveEXT => vec!["SPV_NV_mesh_shader", "SPV_EXT_mesh_shader"], s::Decoration::OverrideCoverageNV => vec!["SPV_NV_sample_mask_override_coverage"], s::Decoration::SecondaryViewportRelativeNV => vec!["SPV_NV_stereo_view_rendering"], s::Decoration::WeightTextureQCOM | s::Decoration::BlockMatchTextureQCOM => { @@ -3138,6 +3187,10 @@ impl Operand { vec!["SPV_ARM_cooperative_matrix_layouts"] } s::Capability::CoreBuiltinsARM => vec!["SPV_ARM_core_builtins"], + s::Capability::GraphARM => vec!["SPV_ARM_graph"], + s::Capability::TensorsARM + | s::Capability::StorageTensorArrayDynamicIndexingARM + | s::Capability::StorageTensorArrayNonUniformIndexingARM => vec!["SPV_ARM_tensors"], s::Capability::ArithmeticFenceEXT => vec!["SPV_EXT_arithmetic_fence"], s::Capability::DemoteToHelperInvocation => { vec!["SPV_EXT_demote_to_helper_invocation"] @@ -3156,6 +3209,9 @@ impl Operand { | s::Capability::StorageTexelBufferArrayNonUniformIndexing => { vec!["SPV_EXT_descriptor_indexing"] } + s::Capability::Float8EXT | s::Capability::Float8CooperativeMatrixEXT => { + vec!["SPV_EXT_float8"] + } s::Capability::FragmentFullyCoveredEXT => vec!["SPV_EXT_fragment_fully_covered"], s::Capability::FragmentDensityEXT => { vec!["SPV_EXT_fragment_invocation_density", "SPV_NV_shading_rate"] @@ -3204,6 +3260,7 @@ impl Operand { vec!["SPV_INTEL_arbitrary_precision_integers"] } s::Capability::BFloat16ConversionINTEL => vec!["SPV_INTEL_bfloat16_conversion"], + s::Capability::BindlessImagesINTEL => vec!["SPV_INTEL_bindless_images"], s::Capability::BlockingPipesINTEL => vec!["SPV_INTEL_blocking_pipes"], s::Capability::CacheControlsINTEL => vec!["SPV_INTEL_cache_controls"], s::Capability::DebugInfoModuleINTEL => vec!["SPV_INTEL_debug_module"], @@ -3246,6 +3303,9 @@ impl Operand { vec!["SPV_INTEL_global_variable_host_access"] } s::Capability::AsmINTEL => vec!["SPV_INTEL_inline_assembly"], + s::Capability::Int4TypeINTEL | s::Capability::Int4CooperativeMatrixINTEL => { + vec!["SPV_INTEL_int4"] + } s::Capability::IOPipesINTEL => vec!["SPV_INTEL_io_pipes"], s::Capability::KernelAttributesINTEL | s::Capability::FPGAKernelAttributesINTEL @@ -3472,7 +3532,9 @@ impl Operand { s::NamedMaximumNumberOfRegisters::AutoINTEL => vec![], }, Self::FPEncoding(v) => match v { - s::FPEncoding::BFloat16KHR => vec![], + s::FPEncoding::BFloat16KHR + | s::FPEncoding::Float8E4M3EXT + | s::FPEncoding::Float8E5M2EXT => vec![], }, Self::CooperativeVectorMatrixLayout(v) => match v { s::CooperativeVectorMatrixLayout::RowMajorNV @@ -3687,7 +3749,9 @@ impl Operand { quantifier: crate::grammar::OperandQuantifier::One, }, ], - s::ExecutionMode::LocalSizeHintId => vec![ + s::ExecutionMode::LocalSizeId + | s::ExecutionMode::StaticNumWorkgroupsAMDX + | s::ExecutionMode::MaxNumWorkgroupsAMDX => vec![ crate::grammar::LogicalOperand { kind: crate::grammar::OperandKind::IdRef, quantifier: crate::grammar::OperandQuantifier::One, @@ -3701,9 +3765,7 @@ impl Operand { quantifier: crate::grammar::OperandQuantifier::One, }, ], - s::ExecutionMode::LocalSizeId - | s::ExecutionMode::StaticNumWorkgroupsAMDX - | s::ExecutionMode::MaxNumWorkgroupsAMDX => vec![ + s::ExecutionMode::LocalSizeHintId => vec![ crate::grammar::LogicalOperand { kind: crate::grammar::OperandKind::IdRef, quantifier: crate::grammar::OperandQuantifier::One, @@ -4036,16 +4098,16 @@ impl Operand { kind: crate::grammar::OperandKind::LiteralInteger, quantifier: crate::grammar::OperandQuantifier::One, }], - s::Decoration::LatencyControlLabelINTEL => vec![crate::grammar::LogicalOperand { - kind: crate::grammar::OperandKind::LiteralInteger, - quantifier: crate::grammar::OperandQuantifier::One, - }], s::Decoration::MMHostInterfaceLatencyINTEL => { vec![crate::grammar::LogicalOperand { kind: crate::grammar::OperandKind::LiteralInteger, quantifier: crate::grammar::OperandQuantifier::One, }] } + s::Decoration::LatencyControlLabelINTEL => vec![crate::grammar::LogicalOperand { + kind: crate::grammar::OperandKind::LiteralInteger, + quantifier: crate::grammar::OperandQuantifier::One, + }], s::Decoration::Location => vec![crate::grammar::LogicalOperand { kind: crate::grammar::OperandKind::LiteralInteger, quantifier: crate::grammar::OperandQuantifier::One, @@ -4153,6 +4215,12 @@ impl Operand { quantifier: crate::grammar::OperandQuantifier::One, }, ], + s::Decoration::ImplementInRegisterMapINTEL => { + vec![crate::grammar::LogicalOperand { + kind: crate::grammar::OperandKind::LiteralInteger, + quantifier: crate::grammar::OperandQuantifier::One, + }] + } s::Decoration::MMHostInterfaceWaitRequestINTEL => { vec![crate::grammar::LogicalOperand { kind: crate::grammar::OperandKind::LiteralInteger, @@ -4171,12 +4239,6 @@ impl Operand { kind: crate::grammar::OperandKind::LiteralInteger, quantifier: crate::grammar::OperandQuantifier::One, }], - s::Decoration::ImplementInRegisterMapINTEL => { - vec![crate::grammar::LogicalOperand { - kind: crate::grammar::OperandKind::LiteralInteger, - quantifier: crate::grammar::OperandQuantifier::One, - }] - } s::Decoration::MemoryINTEL => vec![crate::grammar::LogicalOperand { kind: crate::grammar::OperandKind::LiteralString, quantifier: crate::grammar::OperandQuantifier::One, @@ -4235,6 +4297,27 @@ impl Operand { ); result } + Self::TensorOperands(v) => { + let mut result = vec![]; + result.extend( + [ + s::TensorOperands::OUT_OF_BOUNDS_VALUE_ARM, + s::TensorOperands::MAKE_ELEMENT_AVAILABLE_ARM, + s::TensorOperands::MAKE_ELEMENT_VISIBLE_ARM, + ] + .iter() + .filter(|arg| v.contains(**arg)) + .flat_map(|_| { + [crate::grammar::LogicalOperand { + kind: crate::grammar::OperandKind::IdRef, + quantifier: crate::grammar::OperandQuantifier::One, + }] + .iter() + .cloned() + }), + ); + result + } _ => vec![], } } diff --git a/rspirv/dr/build/autogen_norm_insts.rs b/rspirv/dr/build/autogen_norm_insts.rs index 032cc23..b9b4aa8 100644 --- a/rspirv/dr/build/autogen_norm_insts.rs +++ b/rspirv/dr/build/autogen_norm_insts.rs @@ -12278,6 +12278,356 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpTensorReadARM instruction to the current block."] + pub fn tensor_read_arm( + &mut self, + result_type: spirv::Word, + result_id: Option, + tensor: spirv::Word, + coordinates: spirv::Word, + tensor_operands: Option, + additional_params: impl IntoIterator, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TensorReadARM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(tensor), dr::Operand::IdRef(coordinates)], + ); + if let Some(v) = tensor_operands { + inst.operands.push(dr::Operand::TensorOperands(v)); + } + inst.operands.extend(additional_params); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpTensorReadARM instruction to the current block."] + pub fn insert_tensor_read_arm( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + tensor: spirv::Word, + coordinates: spirv::Word, + tensor_operands: Option, + additional_params: impl IntoIterator, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TensorReadARM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(tensor), dr::Operand::IdRef(coordinates)], + ); + if let Some(v) = tensor_operands { + inst.operands.push(dr::Operand::TensorOperands(v)); + } + inst.operands.extend(additional_params); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpTensorWriteARM instruction to the current block."] + pub fn tensor_write_arm( + &mut self, + tensor: spirv::Word, + coordinates: spirv::Word, + object: spirv::Word, + tensor_operands: Option, + additional_params: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TensorWriteARM, + None, + None, + vec![ + dr::Operand::IdRef(tensor), + dr::Operand::IdRef(coordinates), + dr::Operand::IdRef(object), + ], + ); + if let Some(v) = tensor_operands { + inst.operands.push(dr::Operand::TensorOperands(v)); + } + inst.operands.extend(additional_params); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpTensorWriteARM instruction to the current block."] + pub fn insert_tensor_write_arm( + &mut self, + insert_point: InsertPoint, + tensor: spirv::Word, + coordinates: spirv::Word, + object: spirv::Word, + tensor_operands: Option, + additional_params: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TensorWriteARM, + None, + None, + vec![ + dr::Operand::IdRef(tensor), + dr::Operand::IdRef(coordinates), + dr::Operand::IdRef(object), + ], + ); + if let Some(v) = tensor_operands { + inst.operands.push(dr::Operand::TensorOperands(v)); + } + inst.operands.extend(additional_params); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } + #[doc = "Appends an OpTensorQuerySizeARM instruction to the current block."] + pub fn tensor_query_size_arm( + &mut self, + result_type: spirv::Word, + result_id: Option, + tensor: spirv::Word, + dimension: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TensorQuerySizeARM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(tensor), dr::Operand::IdRef(dimension)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpTensorQuerySizeARM instruction to the current block."] + pub fn insert_tensor_query_size_arm( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + tensor: spirv::Word, + dimension: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::TensorQuerySizeARM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(tensor), dr::Operand::IdRef(dimension)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpGraphConstantARM instruction to the current block."] + pub fn graph_constant_arm( + &mut self, + result_type: spirv::Word, + result_id: Option, + graph_constant_id: u32, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::GraphConstantARM, + Some(result_type), + Some(_id), + vec![dr::Operand::LiteralBit32(graph_constant_id)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpGraphConstantARM instruction to the current block."] + pub fn insert_graph_constant_arm( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + graph_constant_id: u32, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::GraphConstantARM, + Some(result_type), + Some(_id), + vec![dr::Operand::LiteralBit32(graph_constant_id)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpGraphEntryPointARM instruction to the current block."] + pub fn graph_entry_point_arm( + &mut self, + graph: spirv::Word, + name: impl Into, + interface: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::GraphEntryPointARM, + None, + None, + vec![ + dr::Operand::IdRef(graph), + dr::Operand::LiteralString(name.into()), + ], + ); + inst.operands + .extend(interface.into_iter().map(dr::Operand::IdRef)); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpGraphEntryPointARM instruction to the current block."] + pub fn insert_graph_entry_point_arm( + &mut self, + insert_point: InsertPoint, + graph: spirv::Word, + name: impl Into, + interface: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::GraphEntryPointARM, + None, + None, + vec![ + dr::Operand::IdRef(graph), + dr::Operand::LiteralString(name.into()), + ], + ); + inst.operands + .extend(interface.into_iter().map(dr::Operand::IdRef)); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } + #[doc = "Appends an OpGraphARM instruction to the current block."] + pub fn graph_arm( + &mut self, + result_type: spirv::Word, + result_id: Option, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = + dr::Instruction::new(spirv::Op::GraphARM, Some(result_type), Some(_id), vec![]); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpGraphARM instruction to the current block."] + pub fn insert_graph_arm( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = + dr::Instruction::new(spirv::Op::GraphARM, Some(result_type), Some(_id), vec![]); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpGraphInputARM instruction to the current block."] + pub fn graph_input_arm( + &mut self, + result_type: spirv::Word, + result_id: Option, + input_index: spirv::Word, + element_index: impl IntoIterator, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::GraphInputARM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(input_index)], + ); + inst.operands + .extend(element_index.into_iter().map(dr::Operand::IdRef)); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpGraphInputARM instruction to the current block."] + pub fn insert_graph_input_arm( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + input_index: spirv::Word, + element_index: impl IntoIterator, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::GraphInputARM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(input_index)], + ); + inst.operands + .extend(element_index.into_iter().map(dr::Operand::IdRef)); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpGraphSetOutputARM instruction to the current block."] + pub fn graph_set_output_arm( + &mut self, + value: spirv::Word, + output_index: spirv::Word, + element_index: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::GraphSetOutputARM, + None, + None, + vec![dr::Operand::IdRef(value), dr::Operand::IdRef(output_index)], + ); + inst.operands + .extend(element_index.into_iter().map(dr::Operand::IdRef)); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpGraphSetOutputARM instruction to the current block."] + pub fn insert_graph_set_output_arm( + &mut self, + insert_point: InsertPoint, + value: spirv::Word, + output_index: spirv::Word, + element_index: impl IntoIterator, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::GraphSetOutputARM, + None, + None, + vec![dr::Operand::IdRef(value), dr::Operand::IdRef(output_index)], + ); + inst.operands + .extend(element_index.into_iter().map(dr::Operand::IdRef)); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } + #[doc = "Appends an OpGraphEndARM instruction to the current block."] + pub fn graph_end_arm(&mut self) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::GraphEndARM, None, None, vec![]); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpGraphEndARM instruction to the current block."] + pub fn insert_graph_end_arm(&mut self, insert_point: InsertPoint) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new(spirv::Op::GraphEndARM, None, None, vec![]); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } #[doc = "Appends an OpUntypedVariableKHR instruction to the current block."] pub fn untyped_variable_khr( &mut self, @@ -23128,4 +23478,115 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(()) } + #[doc = "Appends an OpConvertHandleToImageINTEL instruction to the current block."] + pub fn convert_handle_to_image_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + operand: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConvertHandleToImageINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(operand)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpConvertHandleToImageINTEL instruction to the current block."] + pub fn insert_convert_handle_to_image_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + operand: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConvertHandleToImageINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(operand)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpConvertHandleToSamplerINTEL instruction to the current block."] + pub fn convert_handle_to_sampler_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + operand: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConvertHandleToSamplerINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(operand)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpConvertHandleToSamplerINTEL instruction to the current block."] + pub fn insert_convert_handle_to_sampler_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + operand: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConvertHandleToSamplerINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(operand)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpConvertHandleToSampledImageINTEL instruction to the current block."] + pub fn convert_handle_to_sampled_image_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + operand: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConvertHandleToSampledImageINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(operand)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpConvertHandleToSampledImageINTEL instruction to the current block."] + pub fn insert_convert_handle_to_sampled_image_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + operand: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConvertHandleToSampledImageINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(operand)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } } diff --git a/rspirv/dr/build/autogen_type.rs b/rspirv/dr/build/autogen_type.rs index 98634be..ed1806b 100644 --- a/rspirv/dr/build/autogen_type.rs +++ b/rspirv/dr/build/autogen_type.rs @@ -558,6 +558,82 @@ impl Builder { new_id } } + #[doc = "Appends an OpTypeTensorARM instruction and returns the result id, or return the existing id if the instruction was already present."] + pub fn type_tensor_arm( + &mut self, + element_type: spirv::Word, + rank: Option, + shape: Option, + ) -> spirv::Word { + self.type_tensor_arm_id(None, element_type, rank, shape) + } + #[doc = "Appends an OpTypeTensorARM instruction and returns the result id, or return the existing id if the instruction was already present."] + pub fn type_tensor_arm_id( + &mut self, + result_id: Option, + element_type: spirv::Word, + rank: Option, + shape: Option, + ) -> spirv::Word { + let mut inst = dr::Instruction::new( + spirv::Op::TypeTensorARM, + None, + result_id, + vec![dr::Operand::IdRef(element_type)], + ); + if let Some(v) = rank { + inst.operands.push(dr::Operand::IdRef(v)); + } + if let Some(v) = shape { + inst.operands.push(dr::Operand::IdRef(v)); + } + if let Some(result_id) = result_id { + self.module.types_global_values.push(inst); + result_id + } else if let Some(id) = self.dedup_insert_type(&inst) { + id + } else { + let new_id = self.id(); + inst.result_id = Some(new_id); + self.module.types_global_values.push(inst); + new_id + } + } + #[doc = "Appends an OpTypeGraphARM instruction and returns the result id, or return the existing id if the instruction was already present."] + pub fn type_graph_arm( + &mut self, + num_inputs: u32, + in_out_types: impl IntoIterator, + ) -> spirv::Word { + self.type_graph_arm_id(None, num_inputs, in_out_types) + } + #[doc = "Appends an OpTypeGraphARM instruction and returns the result id, or return the existing id if the instruction was already present."] + pub fn type_graph_arm_id( + &mut self, + result_id: Option, + num_inputs: u32, + in_out_types: impl IntoIterator, + ) -> spirv::Word { + let mut inst = dr::Instruction::new( + spirv::Op::TypeGraphARM, + None, + result_id, + vec![dr::Operand::LiteralBit32(num_inputs)], + ); + inst.operands + .extend(in_out_types.into_iter().map(dr::Operand::IdRef)); + if let Some(result_id) = result_id { + self.module.types_global_values.push(inst); + result_id + } else if let Some(id) = self.dedup_insert_type(&inst) { + id + } else { + let new_id = self.id(); + inst.result_id = Some(new_id); + self.module.types_global_values.push(inst); + new_id + } + } #[doc = "Appends an OpTypeUntypedPointerKHR instruction and returns the result id, or return the existing id if the instruction was already present."] pub fn type_untyped_pointer_khr(&mut self, storage_class: spirv::StorageClass) -> spirv::Word { self.type_untyped_pointer_khr_id(None, storage_class) diff --git a/rspirv/grammar/autogen_table.rs b/rspirv/grammar/autogen_table.rs index 91925d5..b13a60b 100644 --- a/rspirv/grammar/autogen_table.rs +++ b/rspirv/grammar/autogen_table.rs @@ -76,6 +76,7 @@ pub enum OperandKind { PairLiteralIntegerIdRef, PairIdRefLiteralInteger, PairIdRefIdRef, + TensorOperands, } static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ inst!(Nop, [], [], []), @@ -3272,6 +3273,93 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ [], [(IdResultType, One), (IdResult, One), (IdRef, ZeroOrOne)] ), + inst!( + TypeTensorARM, + [TensorsARM], + [], + [ + (IdResult, One), + (IdRef, One), + (IdRef, ZeroOrOne), + (IdRef, ZeroOrOne) + ] + ), + inst!( + TensorReadARM, + [TensorsARM], + [], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One), + (TensorOperands, ZeroOrOne) + ] + ), + inst!( + TensorWriteARM, + [TensorsARM], + [], + [ + (IdRef, One), + (IdRef, One), + (IdRef, One), + (TensorOperands, ZeroOrOne) + ] + ), + inst!( + TensorQuerySizeARM, + [TensorsARM], + [], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One) + ] + ), + inst!( + GraphConstantARM, + [GraphARM], + [], + [(IdResultType, One), (IdResult, One), (LiteralInteger, One)] + ), + inst!( + GraphEntryPointARM, + [GraphARM], + [], + [(IdRef, One), (LiteralString, One), (IdRef, ZeroOrMore)] + ), + inst!( + GraphARM, + [GraphARM], + [], + [(IdResultType, One), (IdResult, One)] + ), + inst!( + GraphInputARM, + [GraphARM], + [], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, ZeroOrMore) + ] + ), + inst!( + GraphSetOutputARM, + [GraphARM], + [], + [(IdRef, One), (IdRef, One), (IdRef, ZeroOrMore)] + ), + inst!(GraphEndARM, [GraphARM], [], []), + inst!( + TypeGraphARM, + [GraphARM], + [], + [(IdResult, One), (LiteralInteger, One), (IdRef, ZeroOrMore)] + ), inst!( TerminateInvocation, [Shader], @@ -7863,4 +7951,22 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), + inst!( + ConvertHandleToImageINTEL, + [BindlessImagesINTEL], + [], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), + inst!( + ConvertHandleToSamplerINTEL, + [BindlessImagesINTEL], + [], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), + inst!( + ConvertHandleToSampledImageINTEL, + [BindlessImagesINTEL], + [], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), ]; diff --git a/rspirv/lift/autogen_context.rs b/rspirv/lift/autogen_context.rs index 98aa714..37beb8d 100644 --- a/rspirv/lift/autogen_context.rs +++ b/rspirv/lift/autogen_context.rs @@ -5247,6 +5247,143 @@ impl LiftContext { None => None, }, }), + 4164u32 => Ok(ops::Op::TensorReadARM { + tensor: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + coordinates: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + tensor_operands: match operands.next() { + Some(dr::Operand::TensorOperands(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }, + }), + 4165u32 => Ok(ops::Op::TensorWriteARM { + tensor: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + coordinates: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + object: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + tensor_operands: match operands.next() { + Some(dr::Operand::TensorOperands(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }, + }), + 4166u32 => Ok(ops::Op::TensorQuerySizeARM { + tensor: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + dimension: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 4181u32 => Ok(ops::Op::GraphConstantARM { + graph_constant_id: (match operands.next() { + Some(dr::Operand::LiteralBit32(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 4182u32 => Ok(ops::Op::GraphEntryPointARM { + graph: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + name: (match operands.next() { + Some(dr::Operand::LiteralString(value)) => Some(value.clone()), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + interface: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + } { + vec.push(item); + } + vec + }, + }), + 4183u32 => Ok(ops::Op::GraphARM), + 4184u32 => Ok(ops::Op::GraphInputARM { + input_index: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + element_index: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + } { + vec.push(item); + } + vec + }, + }), + 4185u32 => Ok(ops::Op::GraphSetOutputARM { + value: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + output_index: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + element_index: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + } { + vec.push(item); + } + vec + }, + }), + 4186u32 => Ok(ops::Op::GraphEndARM), 4418u32 => Ok(ops::Op::UntypedVariableKHR { storage_class: (match operands.next() { Some(dr::Operand::StorageClass(value)) => Some(*value), @@ -8912,7 +9049,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - argument_0: { + argument: { let mut vec = Vec::new(); while let Some(item) = match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), @@ -12354,7 +12491,7 @@ impl LiftContext { }, }), 5913u32 => Ok(ops::Op::AliasScopeListDeclINTEL { - alias_scope1_alias_scope2: { + alias_scope_1_alias_scope_2: { let mut vec = Vec::new(); while let Some(item) = match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), @@ -13816,6 +13953,30 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 6529u32 => Ok(ops::Op::ConvertHandleToImageINTEL { + operand: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 6530u32 => Ok(ops::Op::ConvertHandleToSamplerINTEL { + operand: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 6531u32 => Ok(ops::Op::ConvertHandleToSampledImageINTEL { + operand: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), _ => Err(InstructionError::WrongOpcode), } } @@ -14043,6 +14204,43 @@ impl LiftContext { }), 322u32 => Ok(Type::PipeStorage), 327u32 => Ok(Type::NamedBarrier), + 4163u32 => Ok(Type::TensorARM { + element_type: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + rank: match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }, + shape: match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }, + }), + 4190u32 => Ok(Type::GraphARM { + num_inputs: (match operands.next() { + Some(dr::Operand::LiteralBit32(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + in_out_types: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + } { + vec.push(item); + } + vec + }, + }), 4417u32 => Ok(Type::UntypedPointerKHR { storage_class: (match operands.next() { Some(dr::Operand::StorageClass(value)) => Some(*value), diff --git a/rspirv/sr/autogen_decoration.rs b/rspirv/sr/autogen_decoration.rs index 0895ed1..8dc4fab 100644 --- a/rspirv/sr/autogen_decoration.rs +++ b/rspirv/sr/autogen_decoration.rs @@ -53,6 +53,7 @@ pub enum Decoration { MaxByteOffset(u32), AlignmentId(spirv::Word), MaxByteOffsetId(spirv::Word), + SaturatedToLargestFloat8NormalConversionEXT, NoSignedWrap, NoUnsignedWrap, WeightTextureQCOM, diff --git a/rspirv/sr/autogen_ops.rs b/rspirv/sr/autogen_ops.rs index 8e4668d..b20e735 100644 --- a/rspirv/sr/autogen_ops.rs +++ b/rspirv/sr/autogen_ops.rs @@ -1343,6 +1343,40 @@ pub enum Op { StencilAttachmentReadEXT { sample: Option, }, + TensorReadARM { + tensor: spirv::Word, + coordinates: spirv::Word, + tensor_operands: Option, + }, + TensorWriteARM { + tensor: spirv::Word, + coordinates: spirv::Word, + object: spirv::Word, + tensor_operands: Option, + }, + TensorQuerySizeARM { + tensor: spirv::Word, + dimension: spirv::Word, + }, + GraphConstantARM { + graph_constant_id: u32, + }, + GraphEntryPointARM { + graph: spirv::Word, + name: String, + interface: Vec, + }, + GraphARM, + GraphInputARM { + input_index: spirv::Word, + element_index: Vec, + }, + GraphSetOutputARM { + value: spirv::Word, + output_index: spirv::Word, + element_index: Vec, + }, + GraphEndARM, UntypedVariableKHR { storage_class: spirv::StorageClass, data_type: Option>, @@ -2255,7 +2289,7 @@ pub enum Op { }, AsmCallINTEL { asm: spirv::Word, - argument_0: Vec, + argument: Vec, }, AtomicFMinEXT { pointer: spirv::Word, @@ -3090,7 +3124,7 @@ pub enum Op { name: Option, }, AliasScopeListDeclINTEL { - alias_scope1_alias_scope2: Vec, + alias_scope_1_alias_scope_2: Vec, }, FixedSqrtINTEL { input: spirv::Word, @@ -3437,4 +3471,13 @@ pub enum Op { alignment: u32, mask: spirv::Word, }, + ConvertHandleToImageINTEL { + operand: spirv::Word, + }, + ConvertHandleToSamplerINTEL { + operand: spirv::Word, + }, + ConvertHandleToSampledImageINTEL { + operand: spirv::Word, + }, } diff --git a/rspirv/sr/autogen_types.rs b/rspirv/sr/autogen_types.rs index fb78098..11a97c0 100644 --- a/rspirv/sr/autogen_types.rs +++ b/rspirv/sr/autogen_types.rs @@ -71,6 +71,15 @@ pub enum Type { }, PipeStorage, NamedBarrier, + TensorARM { + element_type: Token, + rank: Option, + shape: Option, + }, + GraphARM { + num_inputs: u32, + in_out_types: Vec, + }, UntypedPointerKHR { storage_class: spirv::StorageClass, }, diff --git a/spirv/Cargo.toml b/spirv/Cargo.toml index 0723db7..aee23d1 100644 --- a/spirv/Cargo.toml +++ b/spirv/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "spirv" -version = "0.3.0+sdk-1.4.313.0" +version = "0.3.0+sdk-1.4.321.0" authors = ["Lei Zhang "] edition = "2018" diff --git a/spirv/autogen_spirv.rs b/spirv/autogen_spirv.rs index 08956dd..8e44c6b 100644 --- a/spirv/autogen_spirv.rs +++ b/spirv/autogen_spirv.rs @@ -1319,6 +1319,7 @@ pub enum Decoration { MaxByteOffset = 45u32, AlignmentId = 46u32, MaxByteOffsetId = 47u32, + SaturatedToLargestFloat8NormalConversionEXT = 4216u32, NoSignedWrap = 4469u32, NoUnsignedWrap = 4470u32, WeightTextureQCOM = 4487u32, @@ -1420,6 +1421,7 @@ impl Decoration { Some(match n { 0u32..=11u32 => unsafe { core::mem::transmute::(n) }, 13u32..=47u32 => unsafe { core::mem::transmute::(n) }, + 4216u32 => unsafe { core::mem::transmute::(4216u32) }, 4469u32..=4470u32 => unsafe { core::mem::transmute::(n) }, 4487u32..=4488u32 => unsafe { core::mem::transmute::(n) }, 4499u32 => unsafe { core::mem::transmute::(4499u32) }, @@ -1531,6 +1533,9 @@ impl core::str::FromStr for Decoration { "MaxByteOffset" => Self::MaxByteOffset, "AlignmentId" => Self::AlignmentId, "MaxByteOffsetId" => Self::MaxByteOffsetId, + "SaturatedToLargestFloat8NormalConversionEXT" => { + Self::SaturatedToLargestFloat8NormalConversionEXT + } "NoSignedWrap" => Self::NoSignedWrap, "NoUnsignedWrap" => Self::NoUnsignedWrap, "WeightTextureQCOM" => Self::WeightTextureQCOM, @@ -2192,7 +2197,13 @@ pub enum Capability { TileImageColorReadAccessEXT = 4166u32, TileImageDepthReadAccessEXT = 4167u32, TileImageStencilReadAccessEXT = 4168u32, + TensorsARM = 4174u32, + StorageTensorArrayDynamicIndexingARM = 4175u32, + StorageTensorArrayNonUniformIndexingARM = 4176u32, + GraphARM = 4191u32, CooperativeMatrixLayoutsARM = 4201u32, + Float8EXT = 4212u32, + Float8CooperativeMatrixEXT = 4213u32, FragmentShadingRateKHR = 4422u32, SubgroupBallotKHR = 4423u32, DrawParameters = 4427u32, @@ -2237,6 +2248,8 @@ pub enum Capability { ShaderClockKHR = 5055u32, ShaderEnqueueAMDX = 5067u32, QuadControlKHR = 5087u32, + Int4TypeINTEL = 5112u32, + Int4CooperativeMatrixINTEL = 5114u32, BFloat16TypeKHR = 5116u32, BFloat16DotProductKHR = 5117u32, BFloat16CooperativeMatrixKHR = 5118u32, @@ -2379,6 +2392,7 @@ pub enum Capability { MaskedGatherScatterINTEL = 6427u32, CacheControlsINTEL = 6441u32, RegisterLimitsINTEL = 6460u32, + BindlessImagesINTEL = 6528u32, } impl Capability { pub fn from_u32(n: u32) -> Option { @@ -2387,7 +2401,10 @@ impl Capability { 17u32..=25u32 => unsafe { core::mem::transmute::(n) }, 27u32..=71u32 => unsafe { core::mem::transmute::(n) }, 4165u32..=4168u32 => unsafe { core::mem::transmute::(n) }, + 4174u32..=4176u32 => unsafe { core::mem::transmute::(n) }, + 4191u32 => unsafe { core::mem::transmute::(4191u32) }, 4201u32 => unsafe { core::mem::transmute::(4201u32) }, + 4212u32..=4213u32 => unsafe { core::mem::transmute::(n) }, 4422u32..=4423u32 => unsafe { core::mem::transmute::(n) }, 4427u32..=4431u32 => unsafe { core::mem::transmute::(n) }, 4433u32..=4437u32 => unsafe { core::mem::transmute::(n) }, @@ -2407,6 +2424,8 @@ impl Capability { 5055u32 => unsafe { core::mem::transmute::(5055u32) }, 5067u32 => unsafe { core::mem::transmute::(5067u32) }, 5087u32 => unsafe { core::mem::transmute::(5087u32) }, + 5112u32 => unsafe { core::mem::transmute::(5112u32) }, + 5114u32 => unsafe { core::mem::transmute::(5114u32) }, 5116u32..=5118u32 => unsafe { core::mem::transmute::(n) }, 5249u32 => unsafe { core::mem::transmute::(5249u32) }, 5251u32 => unsafe { core::mem::transmute::(5251u32) }, @@ -2494,6 +2513,7 @@ impl Capability { 6427u32 => unsafe { core::mem::transmute::(6427u32) }, 6441u32 => unsafe { core::mem::transmute::(6441u32) }, 6460u32 => unsafe { core::mem::transmute::(6460u32) }, + 6528u32 => unsafe { core::mem::transmute::(6528u32) }, _ => return None, }) } @@ -2617,7 +2637,15 @@ impl core::str::FromStr for Capability { "TileImageColorReadAccessEXT" => Self::TileImageColorReadAccessEXT, "TileImageDepthReadAccessEXT" => Self::TileImageDepthReadAccessEXT, "TileImageStencilReadAccessEXT" => Self::TileImageStencilReadAccessEXT, + "TensorsARM" => Self::TensorsARM, + "StorageTensorArrayDynamicIndexingARM" => Self::StorageTensorArrayDynamicIndexingARM, + "StorageTensorArrayNonUniformIndexingARM" => { + Self::StorageTensorArrayNonUniformIndexingARM + } + "GraphARM" => Self::GraphARM, "CooperativeMatrixLayoutsARM" => Self::CooperativeMatrixLayoutsARM, + "Float8EXT" => Self::Float8EXT, + "Float8CooperativeMatrixEXT" => Self::Float8CooperativeMatrixEXT, "FragmentShadingRateKHR" => Self::FragmentShadingRateKHR, "SubgroupBallotKHR" => Self::SubgroupBallotKHR, "DrawParameters" => Self::DrawParameters, @@ -2668,6 +2696,8 @@ impl core::str::FromStr for Capability { "ShaderClockKHR" => Self::ShaderClockKHR, "ShaderEnqueueAMDX" => Self::ShaderEnqueueAMDX, "QuadControlKHR" => Self::QuadControlKHR, + "Int4TypeINTEL" => Self::Int4TypeINTEL, + "Int4CooperativeMatrixINTEL" => Self::Int4CooperativeMatrixINTEL, "BFloat16TypeKHR" => Self::BFloat16TypeKHR, "BFloat16DotProductKHR" => Self::BFloat16DotProductKHR, "BFloat16CooperativeMatrixKHR" => Self::BFloat16CooperativeMatrixKHR, @@ -2866,6 +2896,7 @@ impl core::str::FromStr for Capability { "MaskedGatherScatterINTEL" => Self::MaskedGatherScatterINTEL, "CacheControlsINTEL" => Self::CacheControlsINTEL, "RegisterLimitsINTEL" => Self::RegisterLimitsINTEL, + "BindlessImagesINTEL" => Self::BindlessImagesINTEL, _ => return Err(()), }) } @@ -3246,11 +3277,14 @@ bitflags! { # [doc = "SPIR-V operand kind: [MatrixMultiplyAccumulateOperands](ht #[allow(clippy::upper_case_acronyms)] pub enum FPEncoding { BFloat16KHR = 0u32, + Float8E4M3EXT = 4214u32, + Float8E5M2EXT = 4215u32, } impl FPEncoding { pub fn from_u32(n: u32) -> Option { Some(match n { 0u32 => unsafe { core::mem::transmute::(0u32) }, + 4214u32..=4215u32 => unsafe { core::mem::transmute::(n) }, _ => return None, }) } @@ -3262,6 +3296,8 @@ impl core::str::FromStr for FPEncoding { fn from_str(s: &str) -> Result { Ok(match s { "BFloat16KHR" => Self::BFloat16KHR, + "Float8E4M3EXT" => Self::Float8E4M3EXT, + "Float8E5M2EXT" => Self::Float8E5M2EXT, _ => return Err(()), }) } @@ -3359,6 +3395,7 @@ impl core::str::FromStr for ComponentType { }) } } +bitflags! { # [doc = "SPIR-V operand kind: [TensorOperands](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_tensor_operands_a_tensor_operands)"] # [derive (Clone , Copy , Debug , PartialEq , Eq , Hash)] # [cfg_attr (feature = "serialize" , derive (serde :: Serialize))] # [cfg_attr (feature = "deserialize" , derive (serde :: Deserialize))] pub struct TensorOperands : u32 { const NONE_ARM = 0u32 ; const NONTEMPORAL_ARM = 1u32 ; const OUT_OF_BOUNDS_VALUE_ARM = 2u32 ; const MAKE_ELEMENT_AVAILABLE_ARM = 4u32 ; const MAKE_ELEMENT_VISIBLE_ARM = 8u32 ; const NON_PRIVATE_ELEMENT_ARM = 16u32 ; } } #[doc = "SPIR-V [instructions](https://www.khronos.org/registry/spir-v/specs/unified1/SPIRV.html#_a_id_instructions_a_instructions) opcodes"] #[repr(u32)] #[derive(Clone, Copy, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)] @@ -3713,6 +3750,17 @@ pub enum Op { ColorAttachmentReadEXT = 4160u32, DepthAttachmentReadEXT = 4161u32, StencilAttachmentReadEXT = 4162u32, + TypeTensorARM = 4163u32, + TensorReadARM = 4164u32, + TensorWriteARM = 4165u32, + TensorQuerySizeARM = 4166u32, + GraphConstantARM = 4181u32, + GraphEntryPointARM = 4182u32, + GraphARM = 4183u32, + GraphInputARM = 4184u32, + GraphSetOutputARM = 4185u32, + GraphEndARM = 4186u32, + TypeGraphARM = 4190u32, TerminateInvocation = 4416u32, TypeUntypedPointerKHR = 4417u32, UntypedVariableKHR = 4418u32, @@ -4160,6 +4208,9 @@ pub enum Op { RoundFToTF32INTEL = 6426u32, MaskedGatherINTEL = 6428u32, MaskedScatterINTEL = 6429u32, + ConvertHandleToImageINTEL = 6529u32, + ConvertHandleToSamplerINTEL = 6530u32, + ConvertHandleToSampledImageINTEL = 6531u32, } impl Op { pub fn from_u32(n: u32) -> Option { @@ -4187,7 +4238,9 @@ impl Op { 274u32..=288u32 => unsafe { core::mem::transmute::(n) }, 291u32..=366u32 => unsafe { core::mem::transmute::(n) }, 400u32..=403u32 => unsafe { core::mem::transmute::(n) }, - 4160u32..=4162u32 => unsafe { core::mem::transmute::(n) }, + 4160u32..=4166u32 => unsafe { core::mem::transmute::(n) }, + 4181u32..=4186u32 => unsafe { core::mem::transmute::(n) }, + 4190u32 => unsafe { core::mem::transmute::(4190u32) }, 4416u32..=4426u32 => unsafe { core::mem::transmute::(n) }, 4428u32..=4433u32 => unsafe { core::mem::transmute::(n) }, 4445u32..=4463u32 => unsafe { core::mem::transmute::(n) }, @@ -4248,6 +4301,7 @@ impl Op { 6401u32..=6408u32 => unsafe { core::mem::transmute::(n) }, 6426u32 => unsafe { core::mem::transmute::(6426u32) }, 6428u32..=6429u32 => unsafe { core::mem::transmute::(n) }, + 6529u32..=6531u32 => unsafe { core::mem::transmute::(n) }, _ => return None, }) } @@ -4295,6 +4349,8 @@ impl Op { | Self::TypeForwardPointer | Self::TypePipeStorage | Self::TypeNamedBarrier + | Self::TypeTensorARM + | Self::TypeGraphARM | Self::TypeUntypedPointerKHR | Self::TypeCooperativeMatrixKHR | Self::TypeRayQueryKHR From 47da63d1b15325f0efd25daddd6571cd1e1eadd7 Mon Sep 17 00:00:00 2001 From: Marijn Suijten Date: Fri, 17 Oct 2025 18:04:00 +0200 Subject: [PATCH 3/3] Regenerate on `sdk-1.4.328.1` --- autogen/external/SPIRV-Headers | 2 +- autogen/src/sr.rs | 2 +- rspirv/binary/autogen_parse_operand.rs | 1 + rspirv/dr/autogen_operand.rs | 42 ++- rspirv/dr/build/autogen_constant.rs | 64 ++++ rspirv/dr/build/autogen_norm_insts.rs | 449 ++++++++++++++++++++++- rspirv/grammar/autogen_opencl_std_100.rs | 116 +++--- rspirv/grammar/autogen_table.rs | 126 ++++++- rspirv/lift/autogen_context.rs | 226 +++++++++++- rspirv/sr/autogen_decoration.rs | 1 + rspirv/sr/autogen_instructions.rs | 18 + rspirv/sr/autogen_ops.rs | 43 ++- spirv/Cargo.toml | 2 +- spirv/autogen_spirv.rs | 40 +- 14 files changed, 1031 insertions(+), 101 deletions(-) diff --git a/autogen/external/SPIRV-Headers b/autogen/external/SPIRV-Headers index 2a611a9..01e0577 160000 --- a/autogen/external/SPIRV-Headers +++ b/autogen/external/SPIRV-Headers @@ -1 +1 @@ -Subproject commit 2a611a970fdbc41ac2e3e328802aed9985352dca +Subproject commit 01e0577914a75a2569c846778c2f93aa8e6feddd diff --git a/autogen/src/sr.rs b/autogen/src/sr.rs index 1a378d0..3910a91 100644 --- a/autogen/src/sr.rs +++ b/autogen/src/sr.rs @@ -491,7 +491,7 @@ pub fn gen_sr_code_from_instruction_grammar( }; let ops = quote! { - use crate::sr::{module::Jump, storage::Token, Type}; + use crate::sr::{module::Jump, storage::Token, Constant, Type}; #[derive(Clone, Debug, Eq, PartialEq)] pub enum Branch { diff --git a/rspirv/binary/autogen_parse_operand.rs b/rspirv/binary/autogen_parse_operand.rs index 10611e7..6359bfc 100644 --- a/rspirv/binary/autogen_parse_operand.rs +++ b/rspirv/binary/autogen_parse_operand.rs @@ -660,6 +660,7 @@ impl Parser<'_, '_> { spirv::Decoration::ImplementInRegisterMapINTEL => { vec![dr::Operand::LiteralBit32(self.decoder.bit32()?)] } + spirv::Decoration::ConditionalINTEL => vec![dr::Operand::IdRef(self.decoder.id()?)], spirv::Decoration::CacheControlLoadINTEL => vec![ dr::Operand::LiteralBit32(self.decoder.bit32()?), dr::Operand::LoadCacheControl(self.decoder.load_cache_control()?), diff --git a/rspirv/dr/autogen_operand.rs b/rspirv/dr/autogen_operand.rs index 51b3ca1..9ccf963 100644 --- a/rspirv/dr/autogen_operand.rs +++ b/rspirv/dr/autogen_operand.rs @@ -1137,14 +1137,12 @@ impl Operand { }, Self::ExecutionMode(v) => match v { s::ExecutionMode::LocalSize | s::ExecutionMode::LocalSizeId => vec![], - s::ExecutionMode::DerivativeGroupLinearKHR => vec![ - spirv::Capability::ComputeDerivativeGroupLinearNV, - spirv::Capability::ComputeDerivativeGroupLinearKHR, - ], - s::ExecutionMode::DerivativeGroupQuadsKHR => vec![ - spirv::Capability::ComputeDerivativeGroupQuadsNV, - spirv::Capability::ComputeDerivativeGroupQuadsKHR, - ], + s::ExecutionMode::DerivativeGroupLinearKHR => { + vec![spirv::Capability::ComputeDerivativeGroupLinearKHR] + } + s::ExecutionMode::DerivativeGroupQuadsKHR => { + vec![spirv::Capability::ComputeDerivativeGroupQuadsKHR] + } s::ExecutionMode::DenormFlushToZero => vec![spirv::Capability::DenormFlushToZero], s::ExecutionMode::DenormPreserve => vec![spirv::Capability::DenormPreserve], s::ExecutionMode::NumSIMDWorkitemsINTEL @@ -1691,6 +1689,7 @@ impl Operand { vec![spirv::Capability::ShaderStereoViewNV] } s::Decoration::ViewportRelativeNV => vec![spirv::Capability::ShaderViewportMaskNV], + s::Decoration::ConditionalINTEL => vec![spirv::Capability::SpecConditionalINTEL], s::Decoration::Patch => vec![spirv::Capability::Tessellation], s::Decoration::XfbBuffer | s::Decoration::XfbStride => { vec![spirv::Capability::TransformFeedback] @@ -2057,6 +2056,7 @@ impl Operand { | s::Capability::Subgroup2DBlockIOINTEL | s::Capability::SubgroupMatrixMultiplyAccumulateINTEL | s::Capability::TernaryBitwiseFunctionINTEL + | s::Capability::SpecConditionalINTEL | s::Capability::GroupUniformArithmeticKHR | s::Capability::TensorFloat32RoundingINTEL | s::Capability::MaskedGatherScatterINTEL @@ -2070,6 +2070,9 @@ impl Operand { spirv::Capability::BFloat16TypeKHR, spirv::Capability::CooperativeMatrixKHR, ], + s::Capability::CooperativeMatrixConversionQCOM => { + vec![spirv::Capability::CooperativeMatrixKHR] + } s::Capability::SubgroupDispatch => vec![spirv::Capability::DeviceEnqueue], s::Capability::FPGAClusterAttributesV2INTEL => { vec![spirv::Capability::FPGAClusterAttributesINTEL] @@ -2228,6 +2231,9 @@ impl Operand { vec![spirv::Capability::ShaderViewportIndexLayerEXT] } s::Capability::ShaderStereoViewNV => vec![spirv::Capability::ShaderViewportMaskNV], + s::Capability::FunctionVariantsINTEL => { + vec![spirv::Capability::SpecConditionalINTEL] + } s::Capability::UniformAndStorageBuffer16BitAccess => { vec![spirv::Capability::StorageBuffer16BitAccess] } @@ -2239,6 +2245,10 @@ impl Operand { vec![spirv::Capability::Subgroup2DBlockIOINTEL] } s::Capability::TessellationPointSize => vec![spirv::Capability::Tessellation], + s::Capability::UntypedVariableLengthArrayINTEL => vec![ + spirv::Capability::VariableLengthArrayINTEL, + spirv::Capability::UntypedPointersKHR, + ], s::Capability::VariablePointers => { vec![spirv::Capability::VariablePointersStorageBuffer] } @@ -2894,6 +2904,7 @@ impl Operand { | s::Decoration::HostAccessINTEL | s::Decoration::InitModeINTEL | s::Decoration::ImplementInRegisterMapINTEL + | s::Decoration::ConditionalINTEL | s::Decoration::CacheControlLoadINTEL | s::Decoration::CacheControlStoreINTEL => vec![], s::Decoration::ExplicitInterpAMD => { @@ -3296,6 +3307,9 @@ impl Operand { s::Capability::FunctionPointersINTEL | s::Capability::IndirectReferencesINTEL => { vec!["SPV_INTEL_function_pointers"] } + s::Capability::SpecConditionalINTEL | s::Capability::FunctionVariantsINTEL => { + vec!["SPV_INTEL_function_variants"] + } s::Capability::GlobalVariableFPGADecorationsINTEL => { vec!["SPV_INTEL_global_variable_fpga_decorations"] } @@ -3343,7 +3357,10 @@ impl Operand { vec!["SPV_INTEL_unstructured_loop_controls"] } s::Capability::USMStorageClassesINTEL => vec!["SPV_INTEL_usm_storage_classes"], - s::Capability::VariableLengthArrayINTEL => vec!["SPV_INTEL_variable_length_array"], + s::Capability::VariableLengthArrayINTEL + | s::Capability::UntypedVariableLengthArrayINTEL => { + vec!["SPV_INTEL_variable_length_array"] + } s::Capability::VectorComputeINTEL | s::Capability::VectorAnyINTEL => { vec!["SPV_INTEL_vector_compute"] } @@ -3465,6 +3482,9 @@ impl Operand { s::Capability::ShaderStereoViewNV => vec!["SPV_NV_stereo_view_rendering"], s::Capability::TensorAddressingNV => vec!["SPV_NV_tensor_addressing"], s::Capability::ShaderViewportMaskNV => vec!["SPV_NV_viewport_array2"], + s::Capability::CooperativeMatrixConversionQCOM => { + vec!["SPV_QCOM_cooperative_matrix_conversion"] + } s::Capability::TextureSampleWeightedQCOM | s::Capability::TextureBoxFilterQCOM | s::Capability::TextureBlockMatchQCOM => vec!["SPV_QCOM_image_processing"], @@ -3956,6 +3976,10 @@ impl Operand { kind: crate::grammar::OperandKind::IdRef, quantifier: crate::grammar::OperandQuantifier::One, }], + s::Decoration::ConditionalINTEL => vec![crate::grammar::LogicalOperand { + kind: crate::grammar::OperandKind::IdRef, + quantifier: crate::grammar::OperandQuantifier::One, + }], s::Decoration::CounterBuffer => vec![crate::grammar::LogicalOperand { kind: crate::grammar::OperandKind::IdRef, quantifier: crate::grammar::OperandQuantifier::One, diff --git a/rspirv/dr/build/autogen_constant.rs b/rspirv/dr/build/autogen_constant.rs index ba18a77..3495dbf 100644 --- a/rspirv/dr/build/autogen_constant.rs +++ b/rspirv/dr/build/autogen_constant.rs @@ -168,4 +168,68 @@ impl Builder { self.module.types_global_values.push(inst); id } + #[doc = "Appends an OpSpecConstantTargetINTEL instruction."] + pub fn spec_constant_target_intel( + &mut self, + result_type: spirv::Word, + target: u32, + features: impl IntoIterator, + ) -> spirv::Word { + let id = self.id(); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::SpecConstantTargetINTEL, + Some(result_type), + Some(id), + vec![dr::Operand::LiteralBit32(target)], + ); + inst.operands + .extend(features.into_iter().map(dr::Operand::LiteralBit32)); + self.module.types_global_values.push(inst); + id + } + #[doc = "Appends an OpSpecConstantArchitectureINTEL instruction."] + pub fn spec_constant_architecture_intel( + &mut self, + result_type: spirv::Word, + category: u32, + family: u32, + opcode: u32, + architecture: u32, + ) -> spirv::Word { + let id = self.id(); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::SpecConstantArchitectureINTEL, + Some(result_type), + Some(id), + vec![ + dr::Operand::LiteralBit32(category), + dr::Operand::LiteralBit32(family), + dr::Operand::LiteralBit32(opcode), + dr::Operand::LiteralBit32(architecture), + ], + ); + self.module.types_global_values.push(inst); + id + } + #[doc = "Appends an OpSpecConstantCapabilitiesINTEL instruction."] + pub fn spec_constant_capabilities_intel( + &mut self, + result_type: spirv::Word, + capabilities: impl IntoIterator, + ) -> spirv::Word { + let id = self.id(); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::SpecConstantCapabilitiesINTEL, + Some(result_type), + Some(id), + vec![], + ); + inst.operands + .extend(capabilities.into_iter().map(dr::Operand::Capability)); + self.module.types_global_values.push(inst); + id + } } diff --git a/rspirv/dr/build/autogen_norm_insts.rs b/rspirv/dr/build/autogen_norm_insts.rs index b9b4aa8..c5a2fc2 100644 --- a/rspirv/dr/build/autogen_norm_insts.rs +++ b/rspirv/dr/build/autogen_norm_insts.rs @@ -10446,7 +10446,7 @@ impl Builder { result_id: Option, execution: spirv::Word, value: spirv::Word, - id: spirv::Word, + invocation_id: spirv::Word, ) -> BuildResult { let _id = result_id.unwrap_or_else(|| self.id()); #[allow(unused_mut)] @@ -10457,7 +10457,7 @@ impl Builder { vec![ dr::Operand::IdScope(execution), dr::Operand::IdRef(value), - dr::Operand::IdRef(id), + dr::Operand::IdRef(invocation_id), ], ); self.insert_into_block(InsertPoint::End, inst)?; @@ -10471,7 +10471,7 @@ impl Builder { result_id: Option, execution: spirv::Word, value: spirv::Word, - id: spirv::Word, + invocation_id: spirv::Word, ) -> BuildResult { let _id = result_id.unwrap_or_else(|| self.id()); #[allow(unused_mut)] @@ -10482,7 +10482,7 @@ impl Builder { vec![ dr::Operand::IdScope(execution), dr::Operand::IdRef(value), - dr::Operand::IdRef(id), + dr::Operand::IdRef(invocation_id), ], ); self.insert_into_block(insert_point, inst)?; @@ -10794,7 +10794,7 @@ impl Builder { result_id: Option, execution: spirv::Word, value: spirv::Word, - id: spirv::Word, + invocation_id: spirv::Word, ) -> BuildResult { let _id = result_id.unwrap_or_else(|| self.id()); #[allow(unused_mut)] @@ -10805,7 +10805,7 @@ impl Builder { vec![ dr::Operand::IdScope(execution), dr::Operand::IdRef(value), - dr::Operand::IdRef(id), + dr::Operand::IdRef(invocation_id), ], ); self.insert_into_block(InsertPoint::End, inst)?; @@ -10819,7 +10819,7 @@ impl Builder { result_id: Option, execution: spirv::Word, value: spirv::Word, - id: spirv::Word, + invocation_id: spirv::Word, ) -> BuildResult { let _id = result_id.unwrap_or_else(|| self.id()); #[allow(unused_mut)] @@ -10830,7 +10830,7 @@ impl Builder { vec![ dr::Operand::IdScope(execution), dr::Operand::IdRef(value), - dr::Operand::IdRef(id), + dr::Operand::IdRef(invocation_id), ], ); self.insert_into_block(insert_point, inst)?; @@ -13274,6 +13274,91 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpUntypedGroupAsyncCopyKHR instruction to the current block."] + pub fn untyped_group_async_copy_khr( + &mut self, + result_type: spirv::Word, + result_id: Option, + execution: spirv::Word, + destination: spirv::Word, + source: spirv::Word, + element_num_bytes: spirv::Word, + num_elements: spirv::Word, + stride: spirv::Word, + event: spirv::Word, + destination_memory_operands: Option, + source_memory_operands: Option, + additional_params: impl IntoIterator, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::UntypedGroupAsyncCopyKHR, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(execution), + dr::Operand::IdRef(destination), + dr::Operand::IdRef(source), + dr::Operand::IdRef(element_num_bytes), + dr::Operand::IdRef(num_elements), + dr::Operand::IdRef(stride), + dr::Operand::IdRef(event), + ], + ); + if let Some(v) = destination_memory_operands { + inst.operands.push(dr::Operand::MemoryAccess(v)); + } + if let Some(v) = source_memory_operands { + inst.operands.push(dr::Operand::MemoryAccess(v)); + } + inst.operands.extend(additional_params); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpUntypedGroupAsyncCopyKHR instruction to the current block."] + pub fn insert_untyped_group_async_copy_khr( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + execution: spirv::Word, + destination: spirv::Word, + source: spirv::Word, + element_num_bytes: spirv::Word, + num_elements: spirv::Word, + stride: spirv::Word, + event: spirv::Word, + destination_memory_operands: Option, + source_memory_operands: Option, + additional_params: impl IntoIterator, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::UntypedGroupAsyncCopyKHR, + Some(result_type), + Some(_id), + vec![ + dr::Operand::IdRef(execution), + dr::Operand::IdRef(destination), + dr::Operand::IdRef(source), + dr::Operand::IdRef(element_num_bytes), + dr::Operand::IdRef(num_elements), + dr::Operand::IdRef(stride), + dr::Operand::IdRef(event), + ], + ); + if let Some(v) = destination_memory_operands { + inst.operands.push(dr::Operand::MemoryAccess(v)); + } + if let Some(v) = source_memory_operands { + inst.operands.push(dr::Operand::MemoryAccess(v)); + } + inst.operands.extend(additional_params); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } #[doc = "Appends an OpTraceRayKHR instruction to the current block."] pub fn trace_ray_khr( &mut self, @@ -14447,6 +14532,43 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpBitCastArrayQCOM instruction to the current block."] + pub fn bit_cast_array_qcom( + &mut self, + result_type: spirv::Word, + result_id: Option, + source_array: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::BitCastArrayQCOM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(source_array)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpBitCastArrayQCOM instruction to the current block."] + pub fn insert_bit_cast_array_qcom( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + source_array: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::BitCastArrayQCOM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(source_array)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } #[doc = "Appends an OpImageBlockMatchWindowSSDQCOM instruction to the current block."] pub fn image_block_match_window_ssdqcom( &mut self, @@ -14675,6 +14797,119 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpCompositeConstructCoopMatQCOM instruction to the current block."] + pub fn composite_construct_coop_mat_qcom( + &mut self, + result_type: spirv::Word, + result_id: Option, + source_array: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::CompositeConstructCoopMatQCOM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(source_array)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpCompositeConstructCoopMatQCOM instruction to the current block."] + pub fn insert_composite_construct_coop_mat_qcom( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + source_array: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::CompositeConstructCoopMatQCOM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(source_array)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpCompositeExtractCoopMatQCOM instruction to the current block."] + pub fn composite_extract_coop_mat_qcom( + &mut self, + result_type: spirv::Word, + result_id: Option, + source_cooperative_matrix: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::CompositeExtractCoopMatQCOM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(source_cooperative_matrix)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpCompositeExtractCoopMatQCOM instruction to the current block."] + pub fn insert_composite_extract_coop_mat_qcom( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + source_cooperative_matrix: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::CompositeExtractCoopMatQCOM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(source_cooperative_matrix)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpExtractSubArrayQCOM instruction to the current block."] + pub fn extract_sub_array_qcom( + &mut self, + result_type: spirv::Word, + result_id: Option, + source_array: spirv::Word, + index: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ExtractSubArrayQCOM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(source_array), dr::Operand::IdRef(index)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpExtractSubArrayQCOM instruction to the current block."] + pub fn insert_extract_sub_array_qcom( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + source_array: spirv::Word, + index: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ExtractSubArrayQCOM, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(source_array), dr::Operand::IdRef(index)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } #[doc = "Appends an OpGroupIAddNonUniformAMD instruction to the current block."] pub fn group_i_add_non_uniform_amd( &mut self, @@ -18144,8 +18379,8 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(()) } - #[doc = "Appends an OpRayQueryGetClusterIdNV instruction to the current block."] - pub fn ray_query_get_cluster_id_nv( + #[doc = "Appends an OpRayQueryGetIntersectionClusterIdNV instruction to the current block."] + pub fn ray_query_get_intersection_cluster_id_nv( &mut self, result_type: spirv::Word, result_id: Option, @@ -18155,7 +18390,7 @@ impl Builder { let _id = result_id.unwrap_or_else(|| self.id()); #[allow(unused_mut)] let mut inst = dr::Instruction::new( - spirv::Op::RayQueryGetClusterIdNV, + spirv::Op::RayQueryGetIntersectionClusterIdNV, Some(result_type), Some(_id), vec![ @@ -18166,8 +18401,8 @@ impl Builder { self.insert_into_block(InsertPoint::End, inst)?; Ok(_id) } - #[doc = "Appends an OpRayQueryGetClusterIdNV instruction to the current block."] - pub fn insert_ray_query_get_cluster_id_nv( + #[doc = "Appends an OpRayQueryGetIntersectionClusterIdNV instruction to the current block."] + pub fn insert_ray_query_get_intersection_cluster_id_nv( &mut self, insert_point: InsertPoint, result_type: spirv::Word, @@ -18178,7 +18413,7 @@ impl Builder { let _id = result_id.unwrap_or_else(|| self.id()); #[allow(unused_mut)] let mut inst = dr::Instruction::new( - spirv::Op::RayQueryGetClusterIdNV, + spirv::Op::RayQueryGetIntersectionClusterIdNV, Some(result_type), Some(_id), vec![ @@ -21104,6 +21339,106 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpVariableLengthArrayINTEL instruction to the current block."] + pub fn variable_length_array_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + length: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::VariableLengthArrayINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(length)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpVariableLengthArrayINTEL instruction to the current block."] + pub fn insert_variable_length_array_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + length: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::VariableLengthArrayINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(length)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpSaveMemoryINTEL instruction to the current block."] + pub fn save_memory_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::SaveMemoryINTEL, + Some(result_type), + Some(_id), + vec![], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpSaveMemoryINTEL instruction to the current block."] + pub fn insert_save_memory_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::SaveMemoryINTEL, + Some(result_type), + Some(_id), + vec![], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpRestoreMemoryINTEL instruction to the current block."] + pub fn restore_memory_intel(&mut self, ptr: spirv::Word) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::RestoreMemoryINTEL, + None, + None, + vec![dr::Operand::IdRef(ptr)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(()) + } + #[doc = "Appends an OpRestoreMemoryINTEL instruction to the current block."] + pub fn insert_restore_memory_intel( + &mut self, + insert_point: InsertPoint, + ptr: spirv::Word, + ) -> BuildResult<()> { + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::RestoreMemoryINTEL, + None, + None, + vec![dr::Operand::IdRef(ptr)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(()) + } #[doc = "Appends an OpLoopControlINTEL instruction to the current block."] pub fn loop_control_intel( &mut self, @@ -22949,6 +23284,92 @@ impl Builder { self.insert_into_block(insert_point, inst)?; Ok(_id) } + #[doc = "Appends an OpUntypedVariableLengthArrayINTEL instruction to the current block."] + pub fn untyped_variable_length_array_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + element_type: spirv::Word, + length: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::UntypedVariableLengthArrayINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(element_type), dr::Operand::IdRef(length)], + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpUntypedVariableLengthArrayINTEL instruction to the current block."] + pub fn insert_untyped_variable_length_array_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + element_type: spirv::Word, + length: spirv::Word, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::UntypedVariableLengthArrayINTEL, + Some(result_type), + Some(_id), + vec![dr::Operand::IdRef(element_type), dr::Operand::IdRef(length)], + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } + #[doc = "Appends an OpConditionalCopyObjectINTEL instruction to the current block."] + pub fn conditional_copy_object_intel( + &mut self, + result_type: spirv::Word, + result_id: Option, + condition_0_operand_0_condition_1_operand_1: impl IntoIterator, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConditionalCopyObjectINTEL, + Some(result_type), + Some(_id), + vec![], + ); + inst.operands.extend( + condition_0_operand_0_condition_1_operand_1 + .into_iter() + .map(dr::Operand::IdRef), + ); + self.insert_into_block(InsertPoint::End, inst)?; + Ok(_id) + } + #[doc = "Appends an OpConditionalCopyObjectINTEL instruction to the current block."] + pub fn insert_conditional_copy_object_intel( + &mut self, + insert_point: InsertPoint, + result_type: spirv::Word, + result_id: Option, + condition_0_operand_0_condition_1_operand_1: impl IntoIterator, + ) -> BuildResult { + let _id = result_id.unwrap_or_else(|| self.id()); + #[allow(unused_mut)] + let mut inst = dr::Instruction::new( + spirv::Op::ConditionalCopyObjectINTEL, + Some(result_type), + Some(_id), + vec![], + ); + inst.operands.extend( + condition_0_operand_0_condition_1_operand_1 + .into_iter() + .map(dr::Operand::IdRef), + ); + self.insert_into_block(insert_point, inst)?; + Ok(_id) + } #[doc = "Appends an OpGroupIMulKHR instruction to the current block."] pub fn group_i_mul_khr( &mut self, diff --git a/rspirv/grammar/autogen_opencl_std_100.rs b/rspirv/grammar/autogen_opencl_std_100.rs index 983d29c..38715b3 100644 --- a/rspirv/grammar/autogen_opencl_std_100.rs +++ b/rspirv/grammar/autogen_opencl_std_100.rs @@ -116,6 +116,40 @@ static OPENCL_STD_100_INSTRUCTION_TABLE: &[ExtendedInstruction<'static>] = &[ ext_inst!(native_sin, 92u32, [], [], [(IdRef, One)]), ext_inst!(native_sqrt, 93u32, [], [], [(IdRef, One)]), ext_inst!(native_tan, 94u32, [], [], [(IdRef, One)]), + ext_inst!( + fclamp, + 95u32, + [], + [], + [(IdRef, One), (IdRef, One), (IdRef, One)] + ), + ext_inst!(degrees, 96u32, [], [], [(IdRef, One)]), + ext_inst!(fmax_common, 97u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!(fmin_common, 98u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!( + mix, + 99u32, + [], + [], + [(IdRef, One), (IdRef, One), (IdRef, One)] + ), + ext_inst!(radians, 100u32, [], [], [(IdRef, One)]), + ext_inst!(step, 101u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!( + smoothstep, + 102u32, + [], + [], + [(IdRef, One), (IdRef, One), (IdRef, One)] + ), + ext_inst!(sign, 103u32, [], [], [(IdRef, One)]), + ext_inst!(cross, 104u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!(distance, 105u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!(length, 106u32, [], [], [(IdRef, One)]), + ext_inst!(normalize, 107u32, [], [], [(IdRef, One)]), + ext_inst!(fast_distance, 108u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!(fast_length, 109u32, [], [], [(IdRef, One)]), + ext_inst!(fast_normalize, 110u32, [], [], [(IdRef, One)]), ext_inst!(s_abs, 141u32, [], [], [(IdRef, One)]), ext_inst!(s_abs_diff, 142u32, [], [], [(IdRef, One), (IdRef, One)]), ext_inst!(s_add_sat, 143u32, [], [], [(IdRef, One), (IdRef, One)]), @@ -188,64 +222,6 @@ static OPENCL_STD_100_INSTRUCTION_TABLE: &[ExtendedInstruction<'static>] = &[ ), ext_inst!(s_mul24, 169u32, [], [], [(IdRef, One), (IdRef, One)]), ext_inst!(u_mul24, 170u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!(u_abs, 201u32, [], [], [(IdRef, One)]), - ext_inst!(u_abs_diff, 202u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!(u_mul_hi, 203u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!( - u_mad_hi, - 204u32, - [], - [], - [(IdRef, One), (IdRef, One), (IdRef, One)] - ), - ext_inst!( - fclamp, - 95u32, - [], - [], - [(IdRef, One), (IdRef, One), (IdRef, One)] - ), - ext_inst!(degrees, 96u32, [], [], [(IdRef, One)]), - ext_inst!(fmax_common, 97u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!(fmin_common, 98u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!( - mix, - 99u32, - [], - [], - [(IdRef, One), (IdRef, One), (IdRef, One)] - ), - ext_inst!(radians, 100u32, [], [], [(IdRef, One)]), - ext_inst!(step, 101u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!( - smoothstep, - 102u32, - [], - [], - [(IdRef, One), (IdRef, One), (IdRef, One)] - ), - ext_inst!(sign, 103u32, [], [], [(IdRef, One)]), - ext_inst!(cross, 104u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!(distance, 105u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!(length, 106u32, [], [], [(IdRef, One)]), - ext_inst!(normalize, 107u32, [], [], [(IdRef, One)]), - ext_inst!(fast_distance, 108u32, [], [], [(IdRef, One), (IdRef, One)]), - ext_inst!(fast_length, 109u32, [], [], [(IdRef, One)]), - ext_inst!(fast_normalize, 110u32, [], [], [(IdRef, One)]), - ext_inst!( - bitselect, - 186u32, - [], - [], - [(IdRef, One), (IdRef, One), (IdRef, One)] - ), - ext_inst!( - select, - 187u32, - [], - [], - [(IdRef, One), (IdRef, One), (IdRef, One)] - ), ext_inst!( vloadn, 171u32, @@ -342,4 +318,28 @@ static OPENCL_STD_100_INSTRUCTION_TABLE: &[ExtendedInstruction<'static>] = &[ ), ext_inst!(printf, 184u32, [], [], [(IdRef, One), (IdRef, ZeroOrMore)]), ext_inst!(prefetch, 185u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!( + bitselect, + 186u32, + [], + [], + [(IdRef, One), (IdRef, One), (IdRef, One)] + ), + ext_inst!( + select, + 187u32, + [], + [], + [(IdRef, One), (IdRef, One), (IdRef, One)] + ), + ext_inst!(u_abs, 201u32, [], [], [(IdRef, One)]), + ext_inst!(u_abs_diff, 202u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!(u_mul_hi, 203u32, [], [], [(IdRef, One), (IdRef, One)]), + ext_inst!( + u_mad_hi, + 204u32, + [], + [], + [(IdRef, One), (IdRef, One), (IdRef, One)] + ), ]; diff --git a/rspirv/grammar/autogen_table.rs b/rspirv/grammar/autogen_table.rs index b13a60b..f33b6db 100644 --- a/rspirv/grammar/autogen_table.rs +++ b/rspirv/grammar/autogen_table.rs @@ -844,7 +844,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ ), inst!( QuantizeToF16, - [], + [Shader], [], [(IdResultType, One), (IdResult, One), (IdRef, One)] ), @@ -3524,6 +3524,24 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, ZeroOrMore) ] ), + inst!( + UntypedGroupAsyncCopyKHR, + [UntypedPointersKHR], + [], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (IdRef, One), + (MemoryAccess, ZeroOrOne), + (MemoryAccess, ZeroOrOne) + ] + ), inst!( TraceRayKHR, [RayTracingKHR], @@ -3824,6 +3842,12 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), + inst!( + BitCastArrayQCOM, + [CooperativeMatrixConversionQCOM], + [], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), inst!( ImageBlockMatchWindowSSDQCOM, [TextureBlockMatch2QCOM], @@ -3880,6 +3904,29 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), + inst!( + CompositeConstructCoopMatQCOM, + [CooperativeMatrixConversionQCOM], + [], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), + inst!( + CompositeExtractCoopMatQCOM, + [CooperativeMatrixConversionQCOM], + [], + [(IdResultType, One), (IdResult, One), (IdRef, One)] + ), + inst!( + ExtractSubArrayQCOM, + [CooperativeMatrixConversionQCOM], + [], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One) + ] + ), inst!( GroupIAddNonUniformAMD, [Groups], @@ -4644,7 +4691,7 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ [(IdRef, One), (IdRef, One)] ), inst!( - RayQueryGetClusterIdNV, + RayQueryGetIntersectionClusterIdNV, [RayTracingClusterAccelerationStructureNV], [], [ @@ -7825,6 +7872,81 @@ static INSTRUCTION_TABLE: &[Instruction<'static>] = &[ (IdRef, One) ] ), + inst!( + UntypedVariableLengthArrayINTEL, + [UntypedVariableLengthArrayINTEL], + [], + [ + (IdResultType, One), + (IdResult, One), + (IdRef, One), + (IdRef, One) + ] + ), + inst!( + ConditionalExtensionINTEL, + [SpecConditionalINTEL], + [], + [(IdRef, One), (LiteralString, One)] + ), + inst!( + ConditionalEntryPointINTEL, + [SpecConditionalINTEL], + [], + [ + (IdRef, One), + (ExecutionModel, One), + (IdRef, One), + (LiteralString, One), + (IdRef, ZeroOrMore) + ] + ), + inst!( + ConditionalCapabilityINTEL, + [SpecConditionalINTEL], + [], + [(IdRef, One), (Capability, One)] + ), + inst!( + SpecConstantTargetINTEL, + [FunctionVariantsINTEL], + [], + [ + (IdResultType, One), + (IdResult, One), + (LiteralInteger, One), + (LiteralInteger, ZeroOrMore) + ] + ), + inst!( + SpecConstantArchitectureINTEL, + [FunctionVariantsINTEL], + [], + [ + (IdResultType, One), + (IdResult, One), + (LiteralInteger, One), + (LiteralInteger, One), + (LiteralInteger, One), + (LiteralInteger, One) + ] + ), + inst!( + SpecConstantCapabilitiesINTEL, + [FunctionVariantsINTEL], + [], + [ + (IdResultType, One), + (IdResult, One), + (Capability, ZeroOrMore) + ] + ), + inst!( + ConditionalCopyObjectINTEL, + [SpecConditionalINTEL], + [], + [(IdResultType, One), (IdResult, One), (IdRef, ZeroOrMore)] + ), inst!( GroupIMulKHR, [GroupUniformArithmeticKHR], diff --git a/rspirv/lift/autogen_context.rs b/rspirv/lift/autogen_context.rs index 37beb8d..7da76fe 100644 --- a/rspirv/lift/autogen_context.rs +++ b/rspirv/lift/autogen_context.rs @@ -4533,7 +4533,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - id: (match operands.next() { + invocation_id: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -4663,7 +4663,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - id: (match operands.next() { + invocation_id: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -5642,6 +5642,60 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 4434u32 => Ok(ops::Op::UntypedGroupAsyncCopyKHR { + execution: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + destination: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + source: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + element_num_bytes: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + num_elements: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + stride: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + event: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + destination_memory_operands: match operands.next() { + Some(dr::Operand::MemoryAccess(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }, + source_memory_operands: match operands.next() { + Some(dr::Operand::MemoryAccess(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }, + }), 4445u32 => Ok(ops::Op::TraceRayKHR { accel: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), @@ -6165,6 +6219,14 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 4497u32 => Ok(ops::Op::BitCastArrayQCOM { + source_array: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), 4500u32 => Ok(ops::Op::ImageBlockMatchWindowSSDQCOM { target_sampled_image: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), @@ -6293,6 +6355,36 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 4540u32 => Ok(ops::Op::CompositeConstructCoopMatQCOM { + source_array: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 4541u32 => Ok(ops::Op::CompositeExtractCoopMatQCOM { + source_cooperative_matrix: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 4542u32 => Ok(ops::Op::ExtractSubArrayQCOM { + source_array: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + index: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), 5000u32 => Ok(ops::Op::GroupIAddNonUniformAMD { execution: (match operands.next() { Some(dr::Operand::IdScope(value)) => Some(*value), @@ -8025,7 +8117,7 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), - 5345u32 => Ok(ops::Op::RayQueryGetClusterIdNV { + 5345u32 => Ok(ops::Op::RayQueryGetIntersectionClusterIdNV { ray_query: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), @@ -9619,7 +9711,7 @@ impl LiftContext { None => None, }) .ok_or(OperandError::Missing)?, - id_search_window_config: (match operands.next() { + search_window_config: (match operands.next() { Some(dr::Operand::IdRef(value)) => Some(*value), Some(_) => return Err(OperandError::WrongType.into()), None => None, @@ -10835,8 +10927,8 @@ impl LiftContext { .ok_or(OperandError::Missing)?, }), 5818u32 => Ok(ops::Op::VariableLengthArrayINTEL { - lenght: (match operands.next() { - Some(dr::Operand::IdRef(value)) => Some(*value), + length: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(self.constants.lookup_token(*value)), Some(_) => return Err(OperandError::WrongType.into()), None => None, }) @@ -13733,6 +13825,33 @@ impl LiftContext { }) .ok_or(OperandError::Missing)?, }), + 6244u32 => Ok(ops::Op::UntypedVariableLengthArrayINTEL { + element_type: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(self.types.lookup_token(*value)), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + length: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(self.constants.lookup_token(*value)), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }), + 6254u32 => Ok(ops::Op::ConditionalCopyObjectINTEL { + condition_0_operand_0_condition_1_operand_1: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + } { + vec.push(item); + } + vec + }, + }), 6401u32 => Ok(ops::Op::GroupIMulKHR { execution: (match operands.next() { Some(dr::Operand::IdScope(value)) => Some(*value), @@ -14741,4 +14860,99 @@ impl LiftContext { }, }) } + #[allow(unused)] + pub fn lift_conditional_extension_intel( + &mut self, + raw: &dr::Instruction, + ) -> Result { + if raw.class.opcode as u32 != 6248u32 { + return Err(InstructionError::WrongOpcode); + } + let mut operands = raw.operands.iter(); + Ok(instructions::ConditionalExtensionINTEL { + condition: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + name: (match operands.next() { + Some(dr::Operand::LiteralString(value)) => Some(value.clone()), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }) + } + #[allow(unused)] + pub fn lift_conditional_entry_point_intel( + &mut self, + raw: &dr::Instruction, + ) -> Result { + if raw.class.opcode as u32 != 6249u32 { + return Err(InstructionError::WrongOpcode); + } + let mut operands = raw.operands.iter(); + Ok(instructions::ConditionalEntryPointINTEL { + condition: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + execution_model: (match operands.next() { + Some(dr::Operand::ExecutionModel(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + entry_point: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + name: (match operands.next() { + Some(dr::Operand::LiteralString(value)) => Some(value.clone()), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + interface: { + let mut vec = Vec::new(); + while let Some(item) = match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + } { + vec.push(item); + } + vec + }, + }) + } + #[allow(unused)] + pub fn lift_conditional_capability_intel( + &mut self, + raw: &dr::Instruction, + ) -> Result { + if raw.class.opcode as u32 != 6250u32 { + return Err(InstructionError::WrongOpcode); + } + let mut operands = raw.operands.iter(); + Ok(instructions::ConditionalCapabilityINTEL { + condition: (match operands.next() { + Some(dr::Operand::IdRef(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + capability: (match operands.next() { + Some(dr::Operand::Capability(value)) => Some(*value), + Some(_) => return Err(OperandError::WrongType.into()), + None => None, + }) + .ok_or(OperandError::Missing)?, + }) + } } diff --git a/rspirv/sr/autogen_decoration.rs b/rspirv/sr/autogen_decoration.rs index 8dc4fab..d73c1e9 100644 --- a/rspirv/sr/autogen_decoration.rs +++ b/rspirv/sr/autogen_decoration.rs @@ -147,6 +147,7 @@ pub enum Decoration { HostAccessINTEL(spirv::HostAccessQualifier, String), InitModeINTEL(spirv::InitializationModeQualifier), ImplementInRegisterMapINTEL(u32), + ConditionalINTEL(spirv::Word), CacheControlLoadINTEL(u32, spirv::LoadCacheControl), CacheControlStoreINTEL(u32, spirv::StoreCacheControl), } diff --git a/rspirv/sr/autogen_instructions.rs b/rspirv/sr/autogen_instructions.rs index 55d7f72..745d33f 100644 --- a/rspirv/sr/autogen_instructions.rs +++ b/rspirv/sr/autogen_instructions.rs @@ -68,3 +68,21 @@ pub struct CooperativeMatrixPerElementOpNV { pub func: spirv::Word, pub operands: Vec, } +#[derive(Clone, Debug, Eq, PartialEq)] +pub struct ConditionalExtensionINTEL { + pub condition: spirv::Word, + pub name: String, +} +#[derive(Clone, Debug, Eq, PartialEq)] +pub struct ConditionalEntryPointINTEL { + pub condition: spirv::Word, + pub execution_model: spirv::ExecutionModel, + pub entry_point: spirv::Word, + pub name: String, + pub interface: Vec, +} +#[derive(Clone, Debug, Eq, PartialEq)] +pub struct ConditionalCapabilityINTEL { + pub condition: spirv::Word, + pub capability: spirv::Capability, +} diff --git a/rspirv/sr/autogen_ops.rs b/rspirv/sr/autogen_ops.rs index b20e735..20e0e26 100644 --- a/rspirv/sr/autogen_ops.rs +++ b/rspirv/sr/autogen_ops.rs @@ -2,7 +2,7 @@ // external/spirv.core.grammar.json. // DO NOT MODIFY! -use crate::sr::{module::Jump, storage::Token, Type}; +use crate::sr::{module::Jump, storage::Token, Constant, Type}; #[derive(Clone, Debug, Eq, PartialEq)] pub enum Branch { Phi { @@ -1160,7 +1160,7 @@ pub enum Op { GroupNonUniformBroadcast { execution: spirv::Word, value: spirv::Word, - id: spirv::Word, + invocation_id: spirv::Word, }, GroupNonUniformBroadcastFirst { execution: spirv::Word, @@ -1195,7 +1195,7 @@ pub enum Op { GroupNonUniformShuffle { execution: spirv::Word, value: spirv::Word, - id: spirv::Word, + invocation_id: spirv::Word, }, GroupNonUniformShuffleXor { execution: spirv::Word, @@ -1441,6 +1441,17 @@ pub enum Op { value: spirv::Word, index: spirv::Word, }, + UntypedGroupAsyncCopyKHR { + execution: spirv::Word, + destination: spirv::Word, + source: spirv::Word, + element_num_bytes: spirv::Word, + num_elements: spirv::Word, + stride: spirv::Word, + event: spirv::Word, + destination_memory_operands: Option, + source_memory_operands: Option, + }, TraceRayKHR { accel: spirv::Word, ray_flags: spirv::Word, @@ -1570,6 +1581,9 @@ pub enum Op { reference_coordinates: spirv::Word, block_size: spirv::Word, }, + BitCastArrayQCOM { + source_array: spirv::Word, + }, ImageBlockMatchWindowSSDQCOM { target_sampled_image: spirv::Word, target_coordinates: spirv::Word, @@ -1598,6 +1612,16 @@ pub enum Op { reference_coordinates: spirv::Word, block_size: spirv::Word, }, + CompositeConstructCoopMatQCOM { + source_array: spirv::Word, + }, + CompositeExtractCoopMatQCOM { + source_cooperative_matrix: spirv::Word, + }, + ExtractSubArrayQCOM { + source_array: spirv::Word, + index: spirv::Word, + }, GroupIAddNonUniformAMD { execution: spirv::Word, operation: spirv::GroupOperation, @@ -2007,7 +2031,7 @@ pub enum Op { sbt_index: spirv::Word, callable_data_id: spirv::Word, }, - RayQueryGetClusterIdNV { + RayQueryGetIntersectionClusterIdNV { ray_query: spirv::Word, intersection: spirv::Word, }, @@ -2461,7 +2485,7 @@ pub enum Op { SubgroupAvcImeSetDualReferenceINTEL { fwd_ref_offset: spirv::Word, bwd_ref_offset: spirv::Word, - id_search_window_config: spirv::Word, + search_window_config: spirv::Word, payload: spirv::Word, }, SubgroupAvcImeRefWindowSizeINTEL { @@ -2771,7 +2795,7 @@ pub enum Op { payload: spirv::Word, }, VariableLengthArrayINTEL { - lenght: spirv::Word, + length: Token, }, SaveMemoryINTEL, RestoreMemoryINTEL { @@ -3416,6 +3440,13 @@ pub enum Op { c: spirv::Word, lut_index: spirv::Word, }, + UntypedVariableLengthArrayINTEL { + element_type: Token, + length: Token, + }, + ConditionalCopyObjectINTEL { + condition_0_operand_0_condition_1_operand_1: Vec, + }, GroupIMulKHR { execution: spirv::Word, operation: spirv::GroupOperation, diff --git a/spirv/Cargo.toml b/spirv/Cargo.toml index aee23d1..bb2e219 100644 --- a/spirv/Cargo.toml +++ b/spirv/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "spirv" -version = "0.3.0+sdk-1.4.321.0" +version = "0.3.0+sdk-1.4.328.1" authors = ["Lei Zhang "] edition = "2018" diff --git a/spirv/autogen_spirv.rs b/spirv/autogen_spirv.rs index 8e44c6b..3a2dd16 100644 --- a/spirv/autogen_spirv.rs +++ b/spirv/autogen_spirv.rs @@ -1413,6 +1413,7 @@ pub enum Decoration { HostAccessINTEL = 6188u32, InitModeINTEL = 6190u32, ImplementInRegisterMapINTEL = 6191u32, + ConditionalINTEL = 6247u32, CacheControlLoadINTEL = 6442u32, CacheControlStoreINTEL = 6443u32, } @@ -1467,6 +1468,7 @@ impl Decoration { 6175u32..=6183u32 => unsafe { core::mem::transmute::(n) }, 6188u32 => unsafe { core::mem::transmute::(6188u32) }, 6190u32..=6191u32 => unsafe { core::mem::transmute::(n) }, + 6247u32 => unsafe { core::mem::transmute::(6247u32) }, 6442u32..=6443u32 => unsafe { core::mem::transmute::(n) }, _ => return None, }) @@ -1636,6 +1638,7 @@ impl core::str::FromStr for Decoration { "HostAccessINTEL" => Self::HostAccessINTEL, "InitModeINTEL" => Self::InitModeINTEL, "ImplementInRegisterMapINTEL" => Self::ImplementInRegisterMapINTEL, + "ConditionalINTEL" => Self::ConditionalINTEL, "CacheControlLoadINTEL" => Self::CacheControlLoadINTEL, "CacheControlStoreINTEL" => Self::CacheControlStoreINTEL, _ => return Err(()), @@ -2238,6 +2241,7 @@ pub enum Capability { TextureBoxFilterQCOM = 4485u32, TextureBlockMatchQCOM = 4486u32, TileShadingQCOM = 4495u32, + CooperativeMatrixConversionQCOM = 4496u32, TextureBlockMatch2QCOM = 4498u32, Float16ImageAMD = 5008u32, ImageGatherBiasLodAMD = 5009u32, @@ -2387,6 +2391,9 @@ pub enum Capability { Subgroup2DBlockTransposeINTEL = 6230u32, SubgroupMatrixMultiplyAccumulateINTEL = 6236u32, TernaryBitwiseFunctionINTEL = 6241u32, + UntypedVariableLengthArrayINTEL = 6243u32, + SpecConditionalINTEL = 6245u32, + FunctionVariantsINTEL = 6246u32, GroupUniformArithmeticKHR = 6400u32, TensorFloat32RoundingINTEL = 6425u32, MaskedGatherScatterINTEL = 6427u32, @@ -2416,7 +2423,7 @@ impl Capability { 4471u32..=4473u32 => unsafe { core::mem::transmute::(n) }, 4478u32..=4479u32 => unsafe { core::mem::transmute::(n) }, 4484u32..=4486u32 => unsafe { core::mem::transmute::(n) }, - 4495u32 => unsafe { core::mem::transmute::(4495u32) }, + 4495u32..=4496u32 => unsafe { core::mem::transmute::(n) }, 4498u32 => unsafe { core::mem::transmute::(4498u32) }, 5008u32..=5010u32 => unsafe { core::mem::transmute::(n) }, 5013u32 => unsafe { core::mem::transmute::(5013u32) }, @@ -2508,6 +2515,8 @@ impl Capability { 6228u32..=6230u32 => unsafe { core::mem::transmute::(n) }, 6236u32 => unsafe { core::mem::transmute::(6236u32) }, 6241u32 => unsafe { core::mem::transmute::(6241u32) }, + 6243u32 => unsafe { core::mem::transmute::(6243u32) }, + 6245u32..=6246u32 => unsafe { core::mem::transmute::(n) }, 6400u32 => unsafe { core::mem::transmute::(6400u32) }, 6425u32 => unsafe { core::mem::transmute::(6425u32) }, 6427u32 => unsafe { core::mem::transmute::(6427u32) }, @@ -2686,6 +2695,7 @@ impl core::str::FromStr for Capability { "TextureBoxFilterQCOM" => Self::TextureBoxFilterQCOM, "TextureBlockMatchQCOM" => Self::TextureBlockMatchQCOM, "TileShadingQCOM" => Self::TileShadingQCOM, + "CooperativeMatrixConversionQCOM" => Self::CooperativeMatrixConversionQCOM, "TextureBlockMatch2QCOM" => Self::TextureBlockMatch2QCOM, "Float16ImageAMD" => Self::Float16ImageAMD, "ImageGatherBiasLodAMD" => Self::ImageGatherBiasLodAMD, @@ -2891,6 +2901,9 @@ impl core::str::FromStr for Capability { "Subgroup2DBlockTransposeINTEL" => Self::Subgroup2DBlockTransposeINTEL, "SubgroupMatrixMultiplyAccumulateINTEL" => Self::SubgroupMatrixMultiplyAccumulateINTEL, "TernaryBitwiseFunctionINTEL" => Self::TernaryBitwiseFunctionINTEL, + "UntypedVariableLengthArrayINTEL" => Self::UntypedVariableLengthArrayINTEL, + "SpecConditionalINTEL" => Self::SpecConditionalINTEL, + "FunctionVariantsINTEL" => Self::FunctionVariantsINTEL, "GroupUniformArithmeticKHR" => Self::GroupUniformArithmeticKHR, "TensorFloat32RoundingINTEL" => Self::TensorFloat32RoundingINTEL, "MaskedGatherScatterINTEL" => Self::MaskedGatherScatterINTEL, @@ -3778,6 +3791,7 @@ pub enum Op { GroupNonUniformRotateKHR = 4431u32, SubgroupReadInvocationKHR = 4432u32, ExtInstWithForwardRefsKHR = 4433u32, + UntypedGroupAsyncCopyKHR = 4434u32, TraceRayKHR = 4445u32, ExecuteCallableKHR = 4446u32, ConvertUToAccelerationStructureKHR = 4447u32, @@ -3808,10 +3822,14 @@ pub enum Op { ImageBoxFilterQCOM = 4481u32, ImageBlockMatchSSDQCOM = 4482u32, ImageBlockMatchSADQCOM = 4483u32, + BitCastArrayQCOM = 4497u32, ImageBlockMatchWindowSSDQCOM = 4500u32, ImageBlockMatchWindowSADQCOM = 4501u32, ImageBlockMatchGatherSSDQCOM = 4502u32, ImageBlockMatchGatherSADQCOM = 4503u32, + CompositeConstructCoopMatQCOM = 4540u32, + CompositeExtractCoopMatQCOM = 4541u32, + ExtractSubArrayQCOM = 4542u32, GroupIAddNonUniformAMD = 5000u32, GroupFAddNonUniformAMD = 5001u32, GroupFMinNonUniformAMD = 5002u32, @@ -3890,7 +3908,7 @@ pub enum Op { RayQueryGetIntersectionTriangleVertexPositionsKHR = 5340u32, TypeAccelerationStructureKHR = 5341u32, ExecuteCallableNV = 5344u32, - RayQueryGetClusterIdNV = 5345u32, + RayQueryGetIntersectionClusterIdNV = 5345u32, HitObjectGetClusterIdNV = 5346u32, TypeCooperativeMatrixNV = 5358u32, CooperativeMatrixLoadNV = 5359u32, @@ -4197,6 +4215,14 @@ pub enum Op { Subgroup2DBlockStoreINTEL = 6235u32, SubgroupMatrixMultiplyAccumulateINTEL = 6237u32, BitwiseFunctionINTEL = 6242u32, + UntypedVariableLengthArrayINTEL = 6244u32, + ConditionalExtensionINTEL = 6248u32, + ConditionalEntryPointINTEL = 6249u32, + ConditionalCapabilityINTEL = 6250u32, + SpecConstantTargetINTEL = 6251u32, + SpecConstantArchitectureINTEL = 6252u32, + SpecConstantCapabilitiesINTEL = 6253u32, + ConditionalCopyObjectINTEL = 6254u32, GroupIMulKHR = 6401u32, GroupFMulKHR = 6402u32, GroupBitwiseAndKHR = 6403u32, @@ -4242,11 +4268,13 @@ impl Op { 4181u32..=4186u32 => unsafe { core::mem::transmute::(n) }, 4190u32 => unsafe { core::mem::transmute::(4190u32) }, 4416u32..=4426u32 => unsafe { core::mem::transmute::(n) }, - 4428u32..=4433u32 => unsafe { core::mem::transmute::(n) }, + 4428u32..=4434u32 => unsafe { core::mem::transmute::(n) }, 4445u32..=4463u32 => unsafe { core::mem::transmute::(n) }, 4472u32..=4477u32 => unsafe { core::mem::transmute::(n) }, 4479u32..=4483u32 => unsafe { core::mem::transmute::(n) }, + 4497u32 => unsafe { core::mem::transmute::(4497u32) }, 4500u32..=4503u32 => unsafe { core::mem::transmute::(n) }, + 4540u32..=4542u32 => unsafe { core::mem::transmute::(n) }, 5000u32..=5007u32 => unsafe { core::mem::transmute::(n) }, 5011u32..=5012u32 => unsafe { core::mem::transmute::(n) }, 5056u32 => unsafe { core::mem::transmute::(5056u32) }, @@ -4298,6 +4326,8 @@ impl Op { 6231u32..=6235u32 => unsafe { core::mem::transmute::(n) }, 6237u32 => unsafe { core::mem::transmute::(6237u32) }, 6242u32 => unsafe { core::mem::transmute::(6242u32) }, + 6244u32 => unsafe { core::mem::transmute::(6244u32) }, + 6248u32..=6254u32 => unsafe { core::mem::transmute::(n) }, 6401u32..=6408u32 => unsafe { core::mem::transmute::(n) }, 6426u32 => unsafe { core::mem::transmute::(6426u32) }, 6428u32..=6429u32 => unsafe { core::mem::transmute::(n) }, @@ -4317,6 +4347,7 @@ impl Op { pub const SUDotAccSatKHR: Self = Self::SUDotAccSat; pub const ReportIntersectionNV: Self = Self::ReportIntersectionKHR; pub const TypeAccelerationStructureNV: Self = Self::TypeAccelerationStructureKHR; + pub const RayQueryGetClusterIdNV: Self = Self::RayQueryGetIntersectionClusterIdNV; pub const DemoteToHelperInvocationEXT: Self = Self::DemoteToHelperInvocation; pub const DecorateStringGOOGLE: Self = Self::DecorateString; pub const MemberDecorateStringGOOGLE: Self = Self::MemberDecorateString; @@ -4387,6 +4418,9 @@ impl Op { | Self::SpecConstantCompositeReplicateEXT | Self::ConstantCompositeContinuedINTEL | Self::SpecConstantCompositeContinuedINTEL + | Self::SpecConstantTargetINTEL + | Self::SpecConstantArchitectureINTEL + | Self::SpecConstantCapabilitiesINTEL ) } #[doc = r" Returns [`true`] if the given opcode is an annotation instruction."]