Deploying to master from @ gfx-rs/wgpu@3443224 🚀

Author: andyleiserson

doc/src/wgpu_types/lib.rs.html

@@ -5721,10 +5721,10 @@
 <a href=#5721 id=5721 data-nosnippet>5721</a>        </span><span class="kw">const </span>TRANSIENT = <span class="number">1 </span>&lt;&lt; <span class="number">12</span>;
 <a href=#5722 id=5722 data-nosnippet>5722</a>        <span class="doccomment">/// The combination of states that a texture may be in _at the same time_.
 <a href=#5723 id=5723 data-nosnippet>5723</a>        /// cbindgen:ignore
-<a href=#5724 id=5724 data-nosnippet>5724</a>        </span><span class="kw">const </span>INCLUSIVE = <span class="self">Self</span>::COPY_SRC.bits() | <span class="self">Self</span>::RESOURCE.bits() | <span class="self">Self</span>::DEPTH_STENCIL_READ.bits();
+<a href=#5724 id=5724 data-nosnippet>5724</a>        </span><span class="kw">const </span>INCLUSIVE = <span class="self">Self</span>::COPY_SRC.bits() | <span class="self">Self</span>::RESOURCE.bits() | <span class="self">Self</span>::DEPTH_STENCIL_READ.bits() | <span class="self">Self</span>::STORAGE_READ_ONLY.bits();
 <a href=#5725 id=5725 data-nosnippet>5725</a>        <span class="doccomment">/// The combination of states that a texture must exclusively be in.
 <a href=#5726 id=5726 data-nosnippet>5726</a>        /// cbindgen:ignore
-<a href=#5727 id=5727 data-nosnippet>5727</a>        </span><span class="kw">const </span>EXCLUSIVE = <span class="self">Self</span>::COPY_DST.bits() | <span class="self">Self</span>::COLOR_TARGET.bits() | <span class="self">Self</span>::DEPTH_STENCIL_WRITE.bits() | <span class="self">Self</span>::STORAGE_READ_ONLY.bits() | <span class="self">Self</span>::STORAGE_WRITE_ONLY.bits() | <span class="self">Self</span>::STORAGE_READ_WRITE.bits() | <span class="self">Self</span>::STORAGE_ATOMIC.bits() | <span class="self">Self</span>::PRESENT.bits();
+<a href=#5727 id=5727 data-nosnippet>5727</a>        </span><span class="kw">const </span>EXCLUSIVE = <span class="self">Self</span>::COPY_DST.bits() | <span class="self">Self</span>::COLOR_TARGET.bits() | <span class="self">Self</span>::DEPTH_STENCIL_WRITE.bits() | <span class="self">Self</span>::STORAGE_WRITE_ONLY.bits() | <span class="self">Self</span>::STORAGE_READ_WRITE.bits() | <span class="self">Self</span>::STORAGE_ATOMIC.bits() | <span class="self">Self</span>::PRESENT.bits();
 <a href=#5728 id=5728 data-nosnippet>5728</a>        <span class="doccomment">/// The combination of all usages that the are guaranteed to be be ordered by the hardware.
 <a href=#5729 id=5729 data-nosnippet>5729</a>        /// If a usage is ordered, then if the texture state doesn't change between draw calls, there
 <a href=#5730 id=5730 data-nosnippet>5730</a>        /// are no barriers needed for synchronization.