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Commit 8b7c6f2

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zhouwg
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ggml-hexagon: remove so-called dma memory pool to avoid confusion and ambiguity
1 parent b5c41d8 commit 8b7c6f2

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2 files changed

+2
-25
lines changed

2 files changed

+2
-25
lines changed

ggml/src/ggml-hexagon/ggml-hexagon.cpp

Lines changed: 2 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -322,7 +322,6 @@ struct hexagon_appcfg_t {
322322
int hwaccel_approach; // 0: HWACCEL_QNN 1: HWACCEL_QNN_SINGLEGRAPH 2: HWACCEL_CDSP
323323
int hexagon_backend; // 0: HEXAGON_BACKEND_QNNCPU 1: HEXAGON_BACKEND_QNNGPU 2: HEXAGON_BACKEND_QNNNPU / HEXAGON_BACKEND_CDSP
324324
int enable_rpc_ion_mempool; // enable/disable rpc ion memory pool
325-
int enable_rpc_dma_mempool; // enable/disable rpc dma memory pool
326325
int enable_all_q_mulmat; // enable/disable offload all quantized type mulmat to cDSP
327326
int profiler_duration; // threshold of duration in profiler, per seconds
328327
int profiler_counts; // threshold of counts in profiler
@@ -346,7 +345,6 @@ static struct hexagon_appcfg_t g_hexagon_appcfg = {
346345
.hwaccel_approach = HWACCEL_CDSP,
347346
.hexagon_backend = HEXAGON_BACKEND_CDSP,
348347
.enable_rpc_ion_mempool = 0,
349-
.enable_rpc_dma_mempool = 0,
350348
.enable_all_q_mulmat = 0,
351349
.profiler_duration = 5,
352350
.profiler_counts = 100,
@@ -1783,7 +1781,6 @@ static void ggmlhexagon_load_cfg() {
17831781
hexagoncfg_instance.get_intvalue("qnn", "print_qnn_internal_log", g_hexagon_appcfg.print_qnn_internal_log, 0);
17841782

17851783
hexagoncfg_instance.get_intvalue("cdsp", "enable_rpc_ion_mempool", g_hexagon_appcfg.enable_rpc_ion_mempool, 0);
1786-
hexagoncfg_instance.get_intvalue("cdsp", "enable_rpc_dma_mempool", g_hexagon_appcfg.enable_rpc_dma_mempool, 0);
17871784
hexagoncfg_instance.get_intvalue("cdsp", "enable_all_q_mulmat", g_hexagon_appcfg.enable_all_q_mulmat, 0);
17881785

17891786
GGMLHEXAGON_LOG_INFO("internal ggml_hexagon_version=%s", g_hexagon_appcfg.ggml_hexagon_version);
@@ -1835,16 +1832,6 @@ static bool ggmlhexagon_check_valid_appcfg() {
18351832
is_valid_appcfg = false;
18361833
}
18371834

1838-
if ((1 == g_hexagon_appcfg.enable_rpc_ion_mempool) && (1 == g_hexagon_appcfg.enable_rpc_dma_mempool)) {
1839-
GGMLHEXAGON_LOG_INFO("rpc ion mempool and rpc dma mempool cannot be enabled at the same time");
1840-
is_valid_appcfg = false;
1841-
}
1842-
1843-
if (1 == g_hexagon_appcfg.enable_rpc_dma_mempool) {
1844-
GGMLHEXAGON_LOG_INFO("rpc dma mempool not supported");
1845-
is_valid_appcfg = false;
1846-
}
1847-
18481835
if (1 == g_hexagon_appcfg.enable_all_q_mulmat) {
18491836
if (0 == g_hexagon_appcfg.enable_q_mulmat) {
18501837
GGMLHEXAGON_LOG_INFO("ensure set enable_q_mulmat to 1 firstly when set enable_all_q_mulmat to 1");
@@ -1874,7 +1861,6 @@ static void ggmlhexagon_print_running_timestamp(ggml_backend_hexagon_context * c
18741861
if (HWACCEL_CDSP == g_hexagon_appcfg.hwaccel_approach) {
18751862
GGMLHEXAGON_LOG_INFO("offload quantize GGML_OP_MUL_MAT: %s", g_hexagon_appcfg.enable_q_mulmat ? "YES" : "NO");
18761863
GGMLHEXAGON_LOG_INFO("using rpc ion memory pool: %s", g_hexagon_appcfg.enable_rpc_ion_mempool ? "YES" : "NO");
1877-
GGMLHEXAGON_LOG_INFO("using rpc dma memory pool: %s", g_hexagon_appcfg.enable_rpc_dma_mempool ? "YES" : "NO");
18781864
ggmlhexagon_probe_dspinfo(ctx);
18791865
} else {
18801866
GGMLHEXAGON_LOG_INFO("offload quantize GGML_OP_MUL_MAT: %s", g_hexagon_appcfg.enable_q_mulmat ? "YES" : "NO");
@@ -5107,7 +5093,7 @@ static void ggmlhexagon_init_rpcmempool(ggml_backend_hexagon_context * ctx) {
51075093
GGMLHEXAGON_LOG_WARN("rpc mempool is too big");
51085094
return;
51095095
}
5110-
//FIXME: it seems there is unknown issue with DMA memory pool
5096+
//FIXME: it seems there is unknown issue with another ION memory pool
51115097
ctx->rpc_mempool = rpcmem_alloc(RPCMEM_HEAP_ID_SYSTEM, RPCMEM_DEFAULT_FLAGS,
51125098
ctx->rpc_mempool_len);
51135099
if (nullptr == ctx->rpc_mempool) {
@@ -5123,10 +5109,6 @@ static void ggmlhexagon_init_rpcmempool(ggml_backend_hexagon_context * ctx) {
51235109
remote_register_buf(ctx->rpc_mempool, ctx->rpc_mempool_len, ctx->rpc_mempool_handle);
51245110
}
51255111

5126-
if ((g_hexagon_appcfg.hwaccel_approach == HWACCEL_CDSP) && (1 == g_hexagon_appcfg.enable_rpc_dma_mempool)) {
5127-
//TODO
5128-
}
5129-
51305112
return;
51315113
}
51325114

@@ -5833,9 +5815,7 @@ static const char * ggml_backend_hexagon_buffer_type_name(ggml_backend_buffer_ty
58335815
if ((g_hexagon_appcfg.hwaccel_approach == HWACCEL_CDSP) && (1 == g_hexagon_appcfg.enable_rpc_ion_mempool)) {
58345816
return "hexagon-ion-buffer";
58355817
}
5836-
if ((g_hexagon_appcfg.hwaccel_approach == HWACCEL_CDSP) && (1 == g_hexagon_appcfg.enable_rpc_dma_mempool)) {
5837-
return "hexagon-dma-buffer";
5838-
}
5818+
58395819
return "hexagon-normal-buffer";
58405820
}
58415821

scripts/ggml-hexagon.cfg

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -96,9 +96,6 @@ precision_mode = "fp16"
9696
#enable/disable rpc ion memory pool
9797
enable_rpc_ion_mempool = 0
9898

99-
#enable/disable rpc dma memory pool
100-
enable_rpc_dma_mempool = 0
101-
10299
#enable/disable offload all quantized type mulmat to cDSP
103100
enable_all_q_mulmat = 0
104101
#attention:

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