Integrate with llvm-project at a807bbea6f48b368388cd796782724e3a53f58a0 (iree-org#19321)

kuhar · giacs-epic · commit cc61a73d6d34 · 2024-12-04T14:52:54.000Z
Still carrying a revert for 1004865f1ca41a9581da8747f34b29862d3ebc3d and a cherry pick for llvm/llvm-project#116650. This time, we have some changes related to tablegen renaming in the vector dialect and op syntax changes in the bufferization dialect. Signed-off-by: Giacomo Serafini <179146510+giacs-epic@users.noreply.github.com>
diff --git a/compiler/src/iree/compiler/Codegen/Common/test/bufferize_copy_only_dispatches.mlir b/compiler/src/iree/compiler/Codegen/Common/test/bufferize_copy_only_dispatches.mlir
@@ -88,7 +88,7 @@ func.func @concatenate_cst() {
 
 // CHECK-LABEL: func.func @concatenate_cst()
 //   CHECK-DAG:   %[[CST:.+]] = arith.constant dense<0> : tensor<2x3xi32>
-//   CHECK-DAG:   %[[ZERO:.+]] = bufferization.to_memref %[[CST]] : memref<2x3xi32
+//   CHECK-DAG:   %[[ZERO:.+]] = bufferization.to_memref %[[CST]] : tensor<2x3xi32> to memref<2x3xi32
 //   CHECK-DAG:   %[[DEST_BINDING:.+]] = hal.interface.binding.subspan
 //   CHECK-DAG:   %[[SUBVIEW:.+]] = memref.subview %[[DEST_BINDING]][0, 2] [2, 3]
 //       CHECK:   linalg.generic
diff --git a/compiler/src/iree/compiler/Codegen/Common/test/fold_tensor_extract_op.mlir b/compiler/src/iree/compiler/Codegen/Common/test/fold_tensor_extract_op.mlir
@@ -4,7 +4,7 @@ func.func @fold_tensor_extract(%arg0 : memref<2x3xi32>) -> i32
 {
   %c1 = arith.constant 1 : index
   %c2 = arith.constant 2 : index
-  %0 = bufferization.to_tensor %arg0 : memref<2x3xi32>
+  %0 = bufferization.to_tensor %arg0 : memref<2x3xi32> to tensor<2x3xi32>
   %1 = tensor.extract %0[%c1, %c2] : tensor<2x3xi32>
   return %1 : i32
 }
diff --git a/compiler/src/iree/compiler/Codegen/Common/test/iree_comprehensive_bufferize.mlir b/compiler/src/iree/compiler/Codegen/Common/test/iree_comprehensive_bufferize.mlir
@@ -272,7 +272,7 @@ func.func @early_bufferized_copy_cst_ops() {
   %c1 = arith.constant 1 : index
   %c2 = arith.constant 2 : index
   %cst = arith.constant dense<0> : tensor<2x3xi32>
-  %0 = bufferization.to_memref %cst : memref<2x3xi32, affine_map<(d0, d1)[s0, s1, s2] -> (d0 * s1 + s0 + d1 * s2)>>
+  %0 = bufferization.to_memref %cst : tensor<2x3xi32> to memref<2x3xi32, affine_map<(d0, d1)[s0, s1, s2] -> (d0 * s1 + s0 + d1 * s2)>>
   %1 = hal.interface.binding.subspan layout(#pipeline_layout) binding(0) alignment(64) offset(%c0) : memref<2x5xi32>
   memref.assume_alignment %1, 64 : memref<2x5xi32>
   %2 = hal.interface.binding.subspan layout(#pipeline_layout) binding(0) alignment(64) offset(%c0) : !flow.dispatch.tensor<readwrite:tensor<2x5xi32>>
@@ -1402,7 +1402,7 @@ func.func @bufferize_cst_output_tensor() {
 
 //       CHECK-DAG: %[[CST1:.+]] = arith.constant -2147483648 : i32
 //       CHECK-DAG: %[[CST5:.+]] = arith.constant dense<[1, 2, 3, 4, 5]> : tensor<5xi32>
-//       CHECK: %[[CAST5:.+]] = bufferization.to_memref %[[CST5]] : memref<5xi32>
+//       CHECK: %[[CAST5:.+]] = bufferization.to_memref %[[CST5]] : tensor<5xi32> to memref<5xi32>
 //       CHECK: %[[INPUT:.+]] = hal.interface.binding.subspan layout({{.+}}) binding(0) : memref<5xf32, #hal.descriptor_type<storage_buffer>>
 //       CHECK: %[[OUTPUT:.+]] = hal.interface.binding.subspan layout({{.+}}) binding(1) : memref<i32, #hal.descriptor_type<storage_buffer>>
 //       CHECK: linalg.fill ins(%[[CST1]] : i32) outs(%[[OUTPUT]] : memref<i32{{.+}}>)
diff --git a/compiler/src/iree/compiler/Codegen/Common/test/tile_and_distribute_to_workgroups.mlir b/compiler/src/iree/compiler/Codegen/Common/test/tile_and_distribute_to_workgroups.mlir
@@ -743,8 +743,8 @@ hal.executable private @static_3d_fft_stage3 {
         %c3 = arith.constant 3 : index
         %cst = arith.constant dense<[1.000000e+00, 0.707106769, 6.12323426E-17, -0.707106769]> : tensor<4xf32>
         %cst_0 = arith.constant dense<[-0.000000e+00, -0.707106769, -1.000000e+00, -0.707106769]> : tensor<4xf32>
-        %0 = bufferization.to_memref %cst_0 : memref<4xf32>
-        %1 = bufferization.to_memref %cst : memref<4xf32>
+        %0 = bufferization.to_memref %cst_0 : tensor<4xf32> to memref<4xf32>
+        %1 = bufferization.to_memref %cst : tensor<4xf32> to memref<4xf32>
         %2 = hal.interface.binding.subspan layout(#pipeline_layout) binding(0) : memref<64x128x32xf32>
         %3 = hal.interface.binding.subspan layout(#pipeline_layout) binding(1) : memref<64x128x32xf32>
         iree_linalg_ext.fft {lowering_config = #config}
diff --git a/compiler/src/iree/compiler/Codegen/Dialect/GPU/IR/IREEGPUDialect.td b/compiler/src/iree/compiler/Codegen/Dialect/GPU/IR/IREEGPUDialect.td
@@ -41,7 +41,7 @@ def IREEGPU_Dialect : Dialect {
 
 class RankedTensorOrVectorOf<list<Type> allowedTypes> :
   ShapedContainerType<allowedTypes,
-      Or<[IsVectorTypePred, And<[IsTensorTypePred, HasRankPred]>]>,
+      Or<[IsVectorOfNonZeroRankTypePred, And<[IsTensorTypePred, HasRankPred]>]>,
   "ranked tensor or vector", "::mlir::ShapedType">;
 
 def AnyRankedTensorOrVector : RankedTensorOrVectorOf<[AnyType]>;
diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/test/select_x86_64_lowering_strategy.mlir b/compiler/src/iree/compiler/Codegen/LLVMCPU/test/select_x86_64_lowering_strategy.mlir
@@ -366,8 +366,8 @@ func.func @static_3d_fft_stage3() attributes {hal.executable.target = #executabl
   %c3 = arith.constant 3 : index
   %cst = arith.constant dense<[1.000000e+00, 0.707106769, 6.12323426E-17, -0.707106769]> : tensor<4xf32>
   %cst_0 = arith.constant dense<[-0.000000e+00, -0.707106769, -1.000000e+00, -0.707106769]> : tensor<4xf32>
-  %0 = bufferization.to_memref %cst_0 : memref<4xf32>
-  %1 = bufferization.to_memref %cst : memref<4xf32>
+  %0 = bufferization.to_memref %cst_0 : tensor<4xf32> to memref<4xf32>
+  %1 = bufferization.to_memref %cst : tensor<4xf32> to memref<4xf32>
   %2 = hal.interface.binding.subspan layout(#pipeline_layout) binding(0) : memref<64x128x32xf32>
   %3 = hal.interface.binding.subspan layout(#pipeline_layout) binding(1) : memref<64x128x32xf32>
   iree_linalg_ext.fft ins(%c3, %1, %0 : index, memref<4xf32>, memref<4xf32>) outs(%2, %3 : memref<64x128x32xf32>, memref<64x128x32xf32>)
diff --git a/compiler/src/iree/compiler/Codegen/LLVMGPU/test/gpu_set_num_workgroups.mlir b/compiler/src/iree/compiler/Codegen/LLVMGPU/test/gpu_set_num_workgroups.mlir
@@ -231,8 +231,8 @@ func.func @static_3d_fft_stage3() {
   %c32 = arith.constant 32 : index
   %cst = arith.constant dense<[1.000000e+00, 0.707106769, 6.12323426E-17, -0.707106769]> : tensor<4xf32>
   %cst_0 = arith.constant dense<[-0.000000e+00, -0.707106769, -1.000000e+00, -0.707106769]> : tensor<4xf32>
-  %0 = bufferization.to_memref %cst_0 : memref<4xf32>
-  %1 = bufferization.to_memref %cst : memref<4xf32>
+  %0 = bufferization.to_memref %cst_0 : tensor<4xf32> to memref<4xf32>
+  %1 = bufferization.to_memref %cst : tensor<4xf32> to memref<4xf32>
   %2 = hal.interface.binding.subspan layout(#pipeline_layout) binding(0) : memref<64x128x32xf32>
   %3 = hal.interface.binding.subspan layout(#pipeline_layout) binding(1) : memref<64x128x32xf32>
   iree_linalg_ext.fft {__internal_linalg_transform__ = "workgroup"} ins(%c3, %1, %0 : index, memref<4xf32>, memref<4xf32>) outs(%2, %3 : memref<64x128x32xf32>, memref<64x128x32xf32>)
diff --git a/compiler/src/iree/compiler/Codegen/SPIRV/test/config_default_linalg_ext_ops.mlir b/compiler/src/iree/compiler/Codegen/SPIRV/test/config_default_linalg_ext_ops.mlir
@@ -99,8 +99,8 @@ func.func @static_3d_fft_stage3() {
   %c32 = arith.constant 32 : index
   %cst = arith.constant dense<[1.000000e+00, 0.707106769, 6.12323426E-17, -0.707106769]> : tensor<4xf32>
   %cst_0 = arith.constant dense<[-0.000000e+00, -0.707106769, -1.000000e+00, -0.707106769]> : tensor<4xf32>
-  %0 = bufferization.to_memref %cst_0 : memref<4xf32>
-  %1 = bufferization.to_memref %cst : memref<4xf32>
+  %0 = bufferization.to_memref %cst_0 : tensor<4xf32> to memref<4xf32>
+  %1 = bufferization.to_memref %cst : tensor<4xf32> to memref<4xf32>
   %2 = hal.interface.binding.subspan layout(#pipeline_layout) binding(0) : memref<64x128x32xf32>
   %3 = hal.interface.binding.subspan layout(#pipeline_layout) binding(1) : memref<64x128x32xf32>
   iree_linalg_ext.fft ins(%c3, %1, %0 : index, memref<4xf32>, memref<4xf32>) outs(%2, %3 : memref<64x128x32xf32>, memref<64x128x32xf32>)
diff --git a/compiler/src/iree/compiler/Codegen/SPIRV/test/tile_and_promote_cooperative_matrix.mlir b/compiler/src/iree/compiler/Codegen/SPIRV/test/tile_and_promote_cooperative_matrix.mlir
@@ -616,7 +616,7 @@ func.func @matmul_f16_128x262144x2304() attributes {translation_info = #translat
   %c134217728 = arith.constant 134217728 : index
   %cst = arith.constant 0.000000e+00 : f16
   %cst_0 = arith.constant dense<"0x69222B2E40A3002A45AC1AAB2E2E202DA21C212680264C2A102314A041A7D029CB28352E5BAAD3B02F299D9A142B8AA1D1285C28412B25AF9A24EE2BA22C242D53AD9E2948A9289FCF301D28012F08AD68A6DD20ECAC912465290B2E9420C5AA50A222A912AB9526B62ADA2039AD4D912C9FDD287B20B224D329BA2A4D2C41A76DAB7E30B027F62ED1A0F1273A2BAE9D0FA48029812992A65AA92A2C9C2EE9A744A4632C5FA8A9A4CF2D70A482A0F5A2DBA7B6304B9D22A52B1B9DA8E424722AB5ACD0248A2B8B29C82D782E402D1A99F0A60CA4DE2DD32815266F2A6B247FA6FE214E2853AA402390AB6925F1A339307F2664A23CACBE28BA2B3D286DB0BA2E"> : tensor<128xf16>
-  %0 = bufferization.to_memref %cst_0 : memref<128xf16>
+  %0 = bufferization.to_memref %cst_0 : tensor<128xf16> to memref<128xf16>
   %1 = hal.interface.binding.subspan layout(#pipeline_layout) binding(0) alignment(64) offset(%c96565312) : memref<128x2304xf16>
   %2 = hal.interface.binding.subspan layout(#pipeline_layout) binding(1) alignment(64) offset(%c806357120) : memref<2304x262144xf16>
   %3 = hal.interface.binding.subspan layout(#pipeline_layout) binding(2) alignment(64) offset(%c134217728) : memref<128x262144xf16>
diff --git a/compiler/src/iree/compiler/Dialect/Flow/IR/FlowOps.td b/compiler/src/iree/compiler/Dialect/Flow/IR/FlowOps.td
@@ -1269,7 +1269,7 @@ def FLOW_TensorLoadOp : FLOW_PureOp<"tensor.load", [
     Variadic<FLOW_Dim>:$indices
   );
   let results = (outs
-    AnyTypeOf<[FLOW_PrimitiveType, AnyVector]>:$result
+    AnyTypeOf<[FLOW_PrimitiveType, AnyVectorOfNonZeroRank]>:$result
   );
 
   let assemblyFormat = [{
@@ -1315,7 +1315,7 @@ def FLOW_TensorStoreOp : FLOW_PureOp<"tensor.store", [
   }];
 
   let arguments = (ins
-    AnyTypeOf<[FLOW_PrimitiveType, AnyVector]>:$value,
+    AnyTypeOf<[FLOW_PrimitiveType, AnyVectorOfNonZeroRank]>:$value,
     FLOW_Tensor:$target,
     FLOW_ShapeDynamicDims:$target_dims,
     Variadic<FLOW_Dim>:$indices
diff --git a/compiler/src/iree/compiler/Dialect/HAL/IR/HALBase.td b/compiler/src/iree/compiler/Dialect/HAL/IR/HALBase.td
@@ -171,7 +171,7 @@ def HAL_PrimitiveType : AnyTypeOf<[Index, AnySignlessInteger, AnyFloat, AnyCompl
 def HAL_FillPatternType : AnyTypeOf<[I8, I16, I32]>;
 
 def HAL_GlobalRefAttr : Util_AliasedSymbolRefAttr;
-def HAL_GlobalType : AnyTypeOf<[HAL_PrimitiveType, AnyVector, HAL_ObjectType]>;
+def HAL_GlobalType : AnyTypeOf<[HAL_PrimitiveType, AnyVectorOfNonZeroRank, HAL_ObjectType]>;
 def HAL_GlobalPtr : Util_PtrOf<HAL_GlobalType>;
 
 def HAL_IndexAttr : Util_IndexAttrBase<"index">;
diff --git a/compiler/src/iree/compiler/Dialect/HAL/IR/HALOps.td b/compiler/src/iree/compiler/Dialect/HAL/IR/HALOps.td
@@ -746,7 +746,7 @@ def HAL_BufferLoadOp : HAL_PureOp<"buffer.load"> {
     HAL_DeviceSize:$source_offset
   );
   let results = (outs
-    AnyTypeOf<[HAL_PrimitiveType, AnyVector]>:$result
+    AnyTypeOf<[HAL_PrimitiveType, AnyVectorOfNonZeroRank]>:$result
   );
 
   let assemblyFormat = [{
@@ -764,7 +764,7 @@ def HAL_BufferStoreOp : HAL_Op<"buffer.store"> {
   }];
 
   let arguments = (ins
-    AnyTypeOf<[HAL_PrimitiveType, AnyVector]>:$value,
+    AnyTypeOf<[HAL_PrimitiveType, AnyVectorOfNonZeroRank]>:$value,
     HAL_BufferType:$target_buffer,
     HAL_DeviceSize:$target_offset
   );
diff --git a/compiler/src/iree/compiler/Dialect/LinalgExt/IR/TilingInterfaceImpl.cpp b/compiler/src/iree/compiler/Dialect/LinalgExt/IR/TilingInterfaceImpl.cpp
@@ -2186,7 +2186,8 @@ SmallVector<Range> CustomOp::getIterationDomainForDimensions(
       convertDimsToSymbols(context, maps, numDims, numSymbols);
 
   // 2b. Concat the affine maps.
-  AffineMap concatMap = inversePermutation(concatAffineMaps(modifiedMaps));
+  AffineMap concatMap =
+      inversePermutation(concatAffineMaps(modifiedMaps, context));
   // TODO: Ideally we should bail if the map is invalid, i.e. we abort from
   // applying the transformation. We could add this to the verifier as well, but
   // it is unclear if this makes the op invalid. Revisit after more experience
diff --git a/compiler/src/iree/compiler/Dialect/Stream/IR/StreamOps.td b/compiler/src/iree/compiler/Dialect/Stream/IR/StreamOps.td
@@ -340,7 +340,7 @@ def Stream_ResourceLoadOp : Stream_Op<"resource.load", [
     Stream_Offset:$source_offset
   );
   let results = (outs
-    AnyTypeOf<[Stream_PrimitiveType, AnyVector]>:$result
+    AnyTypeOf<[Stream_PrimitiveType, AnyVectorOfNonZeroRank]>:$result
   );
 
   let assemblyFormat = [{
@@ -375,7 +375,7 @@ def Stream_ResourceStoreOp : Stream_Op<"resource.store", [
     Stream_StagingResource:$target,
     Stream_Size:$target_size,
     Stream_Offset:$target_offset,
-    AnyTypeOf<[Stream_PrimitiveType, AnyVector]>:$value
+    AnyTypeOf<[Stream_PrimitiveType, AnyVectorOfNonZeroRank]>:$value
   );
 
   let assemblyFormat = [{
@@ -1626,7 +1626,7 @@ def Stream_TensorLoadOp : Stream_PureOp<"tensor.load", [
     Variadic<Stream_Dim>:$indices
   );
   let results = (outs
-    AnyTypeOf<[Stream_PrimitiveType, AnyVector]>:$result
+    AnyTypeOf<[Stream_PrimitiveType, AnyVectorOfNonZeroRank]>:$result
   );
 
   let assemblyFormat = [{
@@ -1674,7 +1674,7 @@ def Stream_TensorStoreOp : Stream_PureOp<"tensor.store", [
     Stream_ShapeDynamicDims:$target_encoding_dims,
     Stream_Size:$target_size,
     Variadic<Stream_Dim>:$indices,
-    AnyTypeOf<[Stream_PrimitiveType, AnyVector]>:$value
+    AnyTypeOf<[Stream_PrimitiveType, AnyVectorOfNonZeroRank]>:$value
   );
   let results = (outs
     Stream_StagingResource:$result
@@ -2289,7 +2289,7 @@ def Stream_AsyncLoadOp : Stream_PureOp<"async.load", [
     Stream_Offset:$source_offset
   );
   let results = (outs
-    AnyTypeOf<[Stream_PrimitiveType, AnyVector]>:$result
+    AnyTypeOf<[Stream_PrimitiveType, AnyVectorOfNonZeroRank]>:$result
   );
 
   let assemblyFormat = [{
@@ -2330,7 +2330,7 @@ def Stream_AsyncStoreOp : Stream_PureOp<"async.store", [
     Stream_StagingResource:$target,
     Stream_Size:$target_size,
     Stream_Offset:$target_offset,
-    AnyTypeOf<[Stream_PrimitiveType, AnyVector]>:$value
+    AnyTypeOf<[Stream_PrimitiveType, AnyVectorOfNonZeroRank]>:$value
   );
   let results = (outs
     Stream_StagingResource:$result
diff --git a/llvm-external-projects/iree-dialects/include/iree-dialects/Dialect/Input/InputOps.td b/llvm-external-projects/iree-dialects/include/iree-dialects/Dialect/Input/InputOps.td
@@ -549,7 +549,7 @@ def IREEInput_TensorLoadOp : IREEInput_PureOp<"tensor.load", [
     Variadic<IREEInput_Dim>:$indices
   );
   let results = (outs
-    AnyTypeOf<[IREEInput_PrimitiveType, AnyVector]>:$result
+    AnyTypeOf<[IREEInput_PrimitiveType, AnyVectorOfNonZeroRank]>:$result
   );
 
   let assemblyFormat = [{
@@ -573,7 +573,7 @@ def IREEInput_TensorStoreOp : IREEInput_PureOp<"tensor.store", [
   }];
 
   let arguments = (ins
-    AnyTypeOf<[IREEInput_PrimitiveType, AnyVector]>:$value,
+    AnyTypeOf<[IREEInput_PrimitiveType, AnyVectorOfNonZeroRank]>:$value,
     IREEInput_Tensor:$target,
     IREEInput_ShapeDynamicDims:$target_dims,
     Variadic<IREEInput_Dim>:$indices
diff --git a/third_party/llvm-project b/third_party/llvm-project
@@ -1 +1 @@
-Subproject commit 04082f21dde6f5722520d253d0d99f55b4834b7c
+Subproject commit 3833fdcdb01b69c2815db08388e0e092a79cbc58

Original file line number	Diff line number	Diff line change
`@@ -4,7 +4,7 @@ func.func @fold_tensor_extract(%arg0 : memref<2x3xi32>) -> i32`
`4`	`4`	`{`
`5`	`5`	`%c1 = arith.constant 1 : index`
`6`	`6`	`%c2 = arith.constant 2 : index`
`7`		`- %0 = bufferization.to_tensor %arg0 : memref<2x3xi32>`
	`7`	`+ %0 = bufferization.to_tensor %arg0 : memref<2x3xi32> to tensor<2x3xi32>`
`8`	`8`	`%1 = tensor.extract %0[%c1, %c2] : tensor<2x3xi32>`
`9`	`9`	`return %1 : i32`
`10`	`10`	`}`