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Dataflow: Switch column order in viableImplCallContextReducedReverse.
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-15
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+13
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shared/dataflow/codeql/dataflow/internal/DataFlowImpl.qll

Lines changed: 13 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1383,7 +1383,7 @@ module MakeImpl<LocationSig Location, InputSig<Location> Lang> {
13831383
bindingset[call, c]
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CcCall getCallContextCall(DataFlowCall call, DataFlowCallable c);
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1386-
DataFlowCallable viableImplCallContextReducedReverse(DataFlowCall call, CcNoCall ctx);
1386+
DataFlowCall viableImplCallContextReducedReverse(DataFlowCallable c, CcNoCall ctx);
13871387

13881388
predicate viableImplNotCallContextReducedReverse(CcNoCall ctx);
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@@ -1801,19 +1801,19 @@ module MakeImpl<LocationSig Location, InputSig<Location> Lang> {
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}
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pragma[nomagic]
1804-
private DataFlowCallable viableImplCallContextReducedReverseRestricted(
1805-
DataFlowCall call, CcNoCall ctx
1804+
private DataFlowCall viableImplCallContextReducedReverseRestricted(
1805+
DataFlowCallable c, CcNoCall ctx
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) {
1807-
result = viableImplCallContextReducedReverse(call, ctx) and
1808-
PrevStage::callEdgeReturn(call, result, _, _, _, _, _)
1807+
result = viableImplCallContextReducedReverse(c, ctx) and
1808+
PrevStage::callEdgeReturn(result, c, _, _, _, _, _)
18091809
}
18101810

1811-
bindingset[ctx, result]
1811+
bindingset[c, ctx]
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pragma[inline_late]
1813-
private DataFlowCallable viableImplCallContextReducedReverseInlineLate(
1814-
DataFlowCall call, CcNoCall ctx
1813+
private DataFlowCall viableImplCallContextReducedReverseInlineLate(
1814+
DataFlowCallable c, CcNoCall ctx
18151815
) {
1816-
result = viableImplCallContextReducedReverseRestricted(call, ctx)
1816+
result = viableImplCallContextReducedReverseRestricted(c, ctx)
18171817
}
18181818

18191819
bindingset[call]
@@ -1852,7 +1852,7 @@ module MakeImpl<LocationSig Location, InputSig<Location> Lang> {
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fwdFlowIntoRet(ret, _, innercc, _, _, _, _, _, apa) and
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inner = ret.getEnclosingCallable() and
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(
1855-
inner = viableImplCallContextReducedReverseInlineLate(call, innercc) and
1855+
call = viableImplCallContextReducedReverseInlineLate(inner, innercc) and
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flowOutOfCallApaInlineLate(call, inner, ret, out, allowsFieldFlow, apa)
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or
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flowOutOfCallApaNotCallContextReduced(call, inner, ret, out, allowsFieldFlow, apa,
@@ -2544,9 +2544,7 @@ module MakeImpl<LocationSig Location, InputSig<Location> Lang> {
25442544
bindingset[call, c]
25452545
CcCall getCallContextCall(DataFlowCall call, DataFlowCallable c) { any() }
25462546

2547-
DataFlowCallable viableImplCallContextReducedReverse(DataFlowCall call, CcNoCall ctx) {
2548-
none()
2549-
}
2547+
DataFlowCall viableImplCallContextReducedReverse(DataFlowCallable c, CcNoCall ctx) { none() }
25502548

25512549
predicate viableImplNotCallContextReducedReverse(CcNoCall ctx) { any() }
25522550

@@ -2628,8 +2626,8 @@ module MakeImpl<LocationSig Location, InputSig<Location> Lang> {
26282626
}
26292627
}
26302628

2631-
DataFlowCallable viableImplCallContextReducedReverse(DataFlowCall call, CcNoCall ctx) {
2632-
call = Input::prunedViableImplInCallContextReverse(result, ctx)
2629+
DataFlowCall viableImplCallContextReducedReverse(DataFlowCallable c, CcNoCall ctx) {
2630+
result = Input::prunedViableImplInCallContextReverse(c, ctx)
26332631
}
26342632

26352633
predicate viableImplNotCallContextReducedReverse(CcNoCall ctx) {

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