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aidenfoxiveyk0kubun
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Add miscellaneous Clippy 'corrections' (Shopify/zjit#92)
* Remove redundant statements * Remove .clone() since A64 implements Copy * Remove .clone() since InsnId implements Copy . * Dereference since *const rb_call_data implements Copy * Remove unnecessary return statement * Remove unnecessary braces * Use .is_empty() over length checks * Remove unnecessary conversion handling Since i32 can always fit into i64 (the inner type in Opnd::Imm), the conversion is infallibile. * Use slice notation in lieu of Vec https://rust-lang.github.io/rust-clippy/master/index.html#ptr_arg * Simplify match statement
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lines changed

zjit/src/asm/x86_64/mod.rs

Lines changed: 5 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -297,13 +297,11 @@ pub fn mem_opnd(num_bits: u8, base_reg: X86Opnd, disp: i32) -> X86Opnd
297297
/// Memory operand with SIB (Scale Index Base) indexing
298298
pub fn mem_opnd_sib(num_bits: u8, base_opnd: X86Opnd, index_opnd: X86Opnd, scale: i32, disp: i32) -> X86Opnd {
299299
if let (X86Opnd::Reg(base_reg), X86Opnd::Reg(index_reg)) = (base_opnd, index_opnd) {
300-
let scale_exp: u8;
301-
302-
match scale {
303-
8 => { scale_exp = 3; },
304-
4 => { scale_exp = 2; },
305-
2 => { scale_exp = 1; },
306-
1 => { scale_exp = 0; },
300+
let scale_exp: u8 = match scale {
301+
8 => 3,
302+
4 => 2,
303+
2 => 1,
304+
1 => 0,
307305
_ => unreachable!()
308306
};
309307

zjit/src/backend/arm64/mod.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1276,7 +1276,7 @@ impl Assembler
12761276

12771277
// Error if we couldn't write out everything
12781278
if cb.has_dropped_bytes() {
1279-
return Err(EmitError::OutOfMemory)
1279+
Err(EmitError::OutOfMemory)
12801280
} else {
12811281
// No bytes dropped, so the pos markers point to valid code
12821282
for (insn_idx, pos) in pos_markers {
@@ -1287,7 +1287,7 @@ impl Assembler
12871287
}
12881288
}
12891289

1290-
return Ok(gc_offsets)
1290+
Ok(gc_offsets)
12911291
}
12921292
}
12931293

zjit/src/backend/lir.rs

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -160,7 +160,7 @@ impl Opnd
160160

161161
/// Maps the indices from a previous list of instructions to a new list of
162162
/// instructions.
163-
pub fn map_index(self, indices: &Vec<usize>) -> Opnd {
163+
pub fn map_index(self, indices: &[usize]) -> Opnd {
164164
match self {
165165
Opnd::VReg { idx, num_bits } => {
166166
Opnd::VReg { idx: indices[idx], num_bits }
@@ -249,7 +249,7 @@ impl From<i64> for Opnd {
249249

250250
impl From<i32> for Opnd {
251251
fn from(value: i32) -> Self {
252-
Opnd::Imm(value.try_into().unwrap())
252+
Opnd::Imm(value.into())
253253
}
254254
}
255255

@@ -1027,7 +1027,7 @@ impl RegisterPool {
10271027
assert_eq!(self.pool[reg_idx], None, "register already allocated");
10281028
self.pool[reg_idx] = Some(vreg_idx);
10291029
self.live_regs += 1;
1030-
return *reg;
1030+
*reg
10311031
}
10321032

10331033
// Mutate the pool to indicate that the given register is being returned
@@ -1395,15 +1395,15 @@ impl Assembler
13951395
.filter(|&(reg, opnd)| Opnd::Reg(reg) != opnd).collect();
13961396

13971397
let mut new_moves = vec![];
1398-
while old_moves.len() > 0 {
1398+
while !old_moves.is_empty() {
13991399
// Keep taking safe moves
14001400
while let Some(index) = find_safe_move(&old_moves) {
14011401
new_moves.push(old_moves.remove(index));
14021402
}
14031403

14041404
// No safe move. Load the source of one move into SCRATCH_REG, and
14051405
// then load SCRATCH_REG into the destination when it's safe.
1406-
if old_moves.len() > 0 {
1406+
if !old_moves.is_empty() {
14071407
// Make sure it's safe to use SCRATCH_REG
14081408
assert!(old_moves.iter().all(|&(_, opnd)| opnd != Opnd::Reg(Assembler::SCRATCH_REG)));
14091409

@@ -1499,7 +1499,7 @@ impl Assembler
14991499
}
15001500
// On x86_64, maintain 16-byte stack alignment
15011501
if cfg!(target_arch = "x86_64") && saved_regs.len() % 2 == 1 {
1502-
asm.cpush(Opnd::Reg(saved_regs.last().unwrap().0.clone()));
1502+
asm.cpush(Opnd::Reg(saved_regs.last().unwrap().0));
15031503
}
15041504
}
15051505
_ => {},

zjit/src/cruby.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -394,7 +394,7 @@ impl VALUE {
394394

395395
/// Return true for a dynamic Ruby symbol (RB_DYNAMIC_SYM_P)
396396
fn dynamic_sym_p(self) -> bool {
397-
return if self.special_const_p() {
397+
if self.special_const_p() {
398398
false
399399
} else {
400400
self.builtin_type() == RUBY_T_SYMBOL
@@ -426,7 +426,7 @@ impl VALUE {
426426
let VALUE(cval) = self;
427427
let rbasic_ptr = cval as *const RBasic;
428428
let flags_bits: usize = unsafe { (*rbasic_ptr).flags }.as_usize();
429-
return flags_bits;
429+
flags_bits
430430
}
431431

432432
pub fn class_of(self) -> VALUE {

zjit/src/hir.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -736,22 +736,22 @@ impl Function {
736736
SendWithoutBlock { self_val, call_info, cd, args, state } => SendWithoutBlock {
737737
self_val: find!(*self_val),
738738
call_info: call_info.clone(),
739-
cd: cd.clone(),
739+
cd: *cd,
740740
args: args.iter().map(|arg| find!(*arg)).collect(),
741741
state: *state,
742742
},
743743
SendWithoutBlockDirect { self_val, call_info, cd, iseq, args, state } => SendWithoutBlockDirect {
744744
self_val: find!(*self_val),
745745
call_info: call_info.clone(),
746-
cd: cd.clone(),
746+
cd: *cd,
747747
iseq: *iseq,
748748
args: args.iter().map(|arg| find!(*arg)).collect(),
749749
state: *state,
750750
},
751751
Send { self_val, call_info, cd, blockiseq, args, state } => Send {
752752
self_val: find!(*self_val),
753753
call_info: call_info.clone(),
754-
cd: cd.clone(),
754+
cd: *cd,
755755
blockiseq: *blockiseq,
756756
args: args.iter().map(|arg| find!(*arg)).collect(),
757757
state: *state,
@@ -1303,7 +1303,7 @@ impl FrameState {
13031303
}
13041304

13051305
fn as_args(&self) -> Vec<InsnId> {
1306-
self.locals.iter().chain(self.stack.iter()).map(|op| op.clone()).collect()
1306+
self.locals.iter().chain(self.stack.iter()).map(|op| *op).collect()
13071307
}
13081308
}
13091309

zjit/src/options.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,7 @@ fn parse_option(options: &mut Options, str_ptr: *const std::os::raw::c_char) ->
111111
}
112112

113113
// Option successfully parsed
114-
return Some(());
114+
Some(())
115115
}
116116

117117
/// Macro to print a message only when --zjit-debug is given

zjit/src/virtualmem.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55

66
use std::ptr::NonNull;
77

8-
use crate::{stats::zjit_alloc_size};
8+
use crate::stats::zjit_alloc_size;
99

1010
#[cfg(not(test))]
1111
pub type VirtualMem = VirtualMemory<sys::SystemAllocator>;
@@ -78,7 +78,7 @@ impl CodePtr {
7878
/// been any writes to it through the [VirtualMemory] yet.
7979
pub fn raw_ptr(self, base: &impl CodePtrBase) -> *const u8 {
8080
let CodePtr(offset) = self;
81-
return base.base_ptr().as_ptr().wrapping_add(offset as usize)
81+
base.base_ptr().as_ptr().wrapping_add(offset as usize)
8282
}
8383

8484
/// Get the address of the code pointer.

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