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Merge branch 'master' into assert-ptr
2 parents 8a037d6 + 746d436 commit 3694620

25 files changed

+154
-89
lines changed

conf/svcomp-ghost.json

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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

conf/svcomp-validate.json

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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

conf/svcomp.json

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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

conf/svcomp23.json

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@@ -63,7 +63,7 @@
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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

conf/svcomp24-validate.json

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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

conf/svcomp24.json

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@@ -78,7 +78,7 @@
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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

conf/svcomp25-validate.json

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@@ -59,7 +59,7 @@
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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

conf/svcomp25.json

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@@ -58,7 +58,7 @@
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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

conf/svcomp2var.json

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@@ -78,7 +78,7 @@
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"autotune": {
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"enabled": true,
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"activated": [
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"singleThreaded",
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"reduceAnalyses",
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"mallocWrappers",
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"noRecursiveIntervals",
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"enums",

src/analyses/baseInvariant.ml

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@@ -395,13 +395,13 @@ struct
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| Le, Some false -> meet_bin (ID.starting ikind (Z.succ l2)) (ID.ending ikind (Z.pred u1))
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| _, _ -> a, b)
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| _ -> a, b)
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| BOr ->
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(* Be careful: inv_exp performs a meet on both arguments of the BOr / BXor. *)
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| BOr ->
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(* Be careful: inv_exp performs a meet on both arguments of the BOr / BXor. *)
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if PrecisionUtil.get_bitfield () then
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(* refinement based on the following idea: bit set to one in c and set to zero in b must be one in a and bit set to zero in c must be zero in a too (analogously for b) *)
402-
let ((az, ao), (bz, bo)) = BitfieldDomain.Bitfield.refine_bor (ID.to_bitfield ikind a) (ID.to_bitfield ikind b) (ID.to_bitfield ikind c) in
402+
let ((az, ao), (bz, bo)) = BitfieldDomain.Bitfield.refine_bor (ID.to_bitfield ikind a) (ID.to_bitfield ikind b) (ID.to_bitfield ikind c) in
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ID.meet a (ID.of_bitfield ikind (az, ao)), ID.meet b (ID.of_bitfield ikind (bz, bo))
404-
else
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else
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(if M.tracing then M.tracel "inv" "Unhandled operator %a" d_binop op;
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(* Be careful: inv_exp performs a meet on both arguments of the BOr / BXor. *)
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(a, b)
@@ -416,7 +416,7 @@ struct
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a, b
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| BAnd ->
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(* we only attempt to refine a here *)
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let b_int = ID.to_int b in
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let b_int = ID.to_int b in
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let a =
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match b_int with
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| Some x when Z.equal x Z.one ->
@@ -426,11 +426,11 @@ struct
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| None -> a)
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| _ -> a
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in
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if PrecisionUtil.get_bitfield () then
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if PrecisionUtil.get_bitfield () then
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(* refinement based on the following idea: bit set to zero in c and set to one in b must be zero in a and bit set to one in c must be one in a too (analogously for b) *)
431-
let ((az, ao), (bz, bo)) = BitfieldDomain.Bitfield.refine_band (ID.to_bitfield ikind a) (ID.to_bitfield ikind b) (ID.to_bitfield ikind c) in
431+
let ((az, ao), (bz, bo)) = BitfieldDomain.Bitfield.refine_band (ID.to_bitfield ikind a) (ID.to_bitfield ikind b) (ID.to_bitfield ikind c) in
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ID.meet a (ID.of_bitfield ikind (az, ao)), ID.meet b (ID.of_bitfield ikind (bz, bo))
433-
else if b_int = None then
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else if b_int = None then
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(if M.tracing then M.tracel "inv" "Unhandled operator %a" d_binop op;
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(a, b)
436436
)

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