@@ -268,7 +268,7 @@ uint32_t RenderingShaderContainerD3D12::_to_bytes_footer_extra_data(uint8_t *p_b
268268}
269269
270270#if NIR_ENABLED
271- bool RenderingShaderContainerD3D12::_convert_spirv_to_nir (const Vector<RenderingDeviceCommons::ShaderStageSPIRVData> & p_spirv, const nir_shader_compiler_options *p_compiler_options, HashMap<int , nir_shader *> &r_stages_nir_shaders, Vector<RenderingDeviceCommons::ShaderStage> &r_stages, BitField<RenderingDeviceCommons::ShaderStage> &r_stages_processed) {
271+ bool RenderingShaderContainerD3D12::_convert_spirv_to_nir (Span<ReflectedShaderStage> p_spirv, const nir_shader_compiler_options *p_compiler_options, HashMap<int , nir_shader *> &r_stages_nir_shaders, Vector<RenderingDeviceCommons::ShaderStage> &r_stages, BitField<RenderingDeviceCommons::ShaderStage> &r_stages_processed) {
272272 r_stages_processed.clear ();
273273
274274 dxil_spirv_runtime_conf dxil_runtime_conf = {};
@@ -287,7 +287,7 @@ bool RenderingShaderContainerD3D12::_convert_spirv_to_nir(const Vector<Rendering
287287 dxil_runtime_conf.inferred_read_only_images_as_srvs = false ;
288288
289289 // Translate SPIR-V to NIR.
290- for (int64_t i = 0 ; i < p_spirv.size (); i++) {
290+ for (uint64_t i = 0 ; i < p_spirv.size (); i++) {
291291 RenderingDeviceCommons::ShaderStage stage = p_spirv[i].shader_stage ;
292292 RenderingDeviceCommons::ShaderStage stage_flag = (RenderingDeviceCommons::ShaderStage)(1 << stage);
293293 r_stages.push_back (stage);
@@ -302,9 +302,10 @@ bool RenderingShaderContainerD3D12::_convert_spirv_to_nir(const Vector<Rendering
302302 MESA_SHADER_COMPUTE, // SHADER_STAGE_COMPUTE
303303 };
304304
305+ Span<uint32_t > code = p_spirv[i].spirv ();
305306 nir_shader *shader = spirv_to_nir (
306- ( const uint32_t *)(p_spirv[i]. spirv . ptr () ),
307- p_spirv[i]. spirv . size () / sizeof ( uint32_t ),
307+ code. ptr (),
308+ code. size (),
308309 nullptr ,
309310 0 ,
310311 SPIRV_TO_MESA_STAGES[stage],
@@ -429,7 +430,7 @@ bool RenderingShaderContainerD3D12::_convert_nir_to_dxil(const HashMap<int, nir_
429430 return true ;
430431}
431432
432- bool RenderingShaderContainerD3D12::_convert_spirv_to_dxil (const Vector<RenderingDeviceCommons::ShaderStageSPIRVData> & p_spirv, HashMap<RenderingDeviceCommons::ShaderStage, Vector<uint8_t >> &r_dxil_blobs, Vector<RenderingDeviceCommons::ShaderStage> &r_stages, BitField<RenderingDeviceCommons::ShaderStage> &r_stages_processed) {
433+ bool RenderingShaderContainerD3D12::_convert_spirv_to_dxil (Span<ReflectedShaderStage> p_spirv, HashMap<RenderingDeviceCommons::ShaderStage, Vector<uint8_t >> &r_dxil_blobs, Vector<RenderingDeviceCommons::ShaderStage> &r_stages, BitField<RenderingDeviceCommons::ShaderStage> &r_stages_processed) {
433434 r_dxil_blobs.clear ();
434435
435436 HashMap<int , nir_shader *> stages_nir_shaders;
@@ -764,7 +765,7 @@ void RenderingShaderContainerD3D12::_nir_report_bitcode_bit_offset(uint64_t p_bi
764765}
765766#endif
766767
767- void RenderingShaderContainerD3D12::_set_from_shader_reflection_post (const String &p_shader_name, const RenderingDeviceCommons::ShaderReflection &p_reflection) {
768+ void RenderingShaderContainerD3D12::_set_from_shader_reflection_post (const RenderingDeviceCommons::ShaderReflection &p_reflection) {
768769 reflection_binding_set_uniforms_data_d3d12.resize (reflection_binding_set_uniforms_data.size ());
769770 reflection_specialization_data_d3d12.resize (reflection_specialization_data.size ());
770771
@@ -780,7 +781,7 @@ void RenderingShaderContainerD3D12::_set_from_shader_reflection_post(const Strin
780781 }
781782}
782783
783- bool RenderingShaderContainerD3D12::_set_code_from_spirv (const Vector<RenderingDeviceCommons::ShaderStageSPIRVData> & p_spirv) {
784+ bool RenderingShaderContainerD3D12::_set_code_from_spirv (Span<ReflectedShaderStage> p_spirv) {
784785#if NIR_ENABLED
785786 reflection_data_d3d12.nir_runtime_data_root_param_idx = UINT32_MAX;
786787
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