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cmd/compile: simplify zerorange on arm64
Get rid of large zeroing cases. We only use this code for small things now. Change-Id: Iba0a98785c5b4b72cf031763edb69ff741ca41af Reviewed-on: https://go-review.googlesource.com/c/go/+/678936 Reviewed-by: Keith Randall <[email protected]> Auto-Submit: Keith Randall <[email protected]> Reviewed-by: Jorropo <[email protected]> LUCI-TryBot-Result: Go LUCI <[email protected]> Reviewed-by: Mark Freeman <[email protected]>
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  • src/cmd/compile/internal/arm64

1 file changed

+12
-41
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src/cmd/compile/internal/arm64/ggen.go

Lines changed: 12 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -5,9 +5,7 @@
55
package arm64
66

77
import (
8-
"cmd/compile/internal/ir"
98
"cmd/compile/internal/objw"
10-
"cmd/compile/internal/types"
119
"cmd/internal/obj"
1210
"cmd/internal/obj/arm64"
1311
)
@@ -22,47 +20,20 @@ func padframe(frame int64) int64 {
2220
}
2321

2422
func zerorange(pp *objw.Progs, p *obj.Prog, off, cnt int64, _ *uint32) *obj.Prog {
25-
if cnt == 0 {
26-
return p
23+
if cnt%8 != 0 {
24+
panic("zeroed region not aligned")
2725
}
28-
if cnt < int64(4*types.PtrSize) {
29-
for i := int64(0); i < cnt; i += int64(types.PtrSize) {
30-
p = pp.Append(p, arm64.AMOVD, obj.TYPE_REG, arm64.REGZERO, 0, obj.TYPE_MEM, arm64.REGSP, 8+off+i)
31-
}
32-
} else if cnt <= int64(128*types.PtrSize) {
33-
if cnt%(2*int64(types.PtrSize)) != 0 {
34-
p = pp.Append(p, arm64.AMOVD, obj.TYPE_REG, arm64.REGZERO, 0, obj.TYPE_MEM, arm64.REGSP, 8+off)
35-
off += int64(types.PtrSize)
36-
cnt -= int64(types.PtrSize)
37-
}
38-
p = pp.Append(p, arm64.AMOVD, obj.TYPE_REG, arm64.REGSP, 0, obj.TYPE_REG, arm64.REG_R20, 0)
39-
p = pp.Append(p, arm64.AADD, obj.TYPE_CONST, 0, 8+off, obj.TYPE_REG, arm64.REG_R20, 0)
40-
p.Reg = arm64.REG_R20
41-
p = pp.Append(p, obj.ADUFFZERO, obj.TYPE_NONE, 0, 0, obj.TYPE_MEM, 0, 0)
42-
p.To.Name = obj.NAME_EXTERN
43-
p.To.Sym = ir.Syms.Duffzero
44-
p.To.Offset = 4 * (64 - cnt/(2*int64(types.PtrSize)))
45-
} else {
46-
// Not using REGTMP, so this is async preemptible (async preemption clobbers REGTMP).
47-
// We are at the function entry, where no register is live, so it is okay to clobber
48-
// other registers
49-
const rtmp = arm64.REG_R20
50-
p = pp.Append(p, arm64.AMOVD, obj.TYPE_CONST, 0, 8+off-8, obj.TYPE_REG, rtmp, 0)
51-
p = pp.Append(p, arm64.AMOVD, obj.TYPE_REG, arm64.REGSP, 0, obj.TYPE_REG, arm64.REGRT1, 0)
52-
p = pp.Append(p, arm64.AADD, obj.TYPE_REG, rtmp, 0, obj.TYPE_REG, arm64.REGRT1, 0)
53-
p.Reg = arm64.REGRT1
54-
p = pp.Append(p, arm64.AMOVD, obj.TYPE_CONST, 0, cnt, obj.TYPE_REG, rtmp, 0)
55-
p = pp.Append(p, arm64.AADD, obj.TYPE_REG, rtmp, 0, obj.TYPE_REG, arm64.REGRT2, 0)
56-
p.Reg = arm64.REGRT1
57-
p = pp.Append(p, arm64.AMOVD, obj.TYPE_REG, arm64.REGZERO, 0, obj.TYPE_MEM, arm64.REGRT1, int64(types.PtrSize))
58-
p.Scond = arm64.C_XPRE
59-
p1 := p
60-
p = pp.Append(p, arm64.ACMP, obj.TYPE_REG, arm64.REGRT1, 0, obj.TYPE_NONE, 0, 0)
61-
p.Reg = arm64.REGRT2
62-
p = pp.Append(p, arm64.ABNE, obj.TYPE_NONE, 0, 0, obj.TYPE_BRANCH, 0, 0)
63-
p.To.SetTarget(p1)
26+
off += 8 // return address was ignored in offset calculation
27+
for cnt >= 16 && off < 512 {
28+
p = pp.Append(p, arm64.ASTP, obj.TYPE_REGREG, arm64.REGZERO, arm64.REGZERO, obj.TYPE_MEM, arm64.REGSP, off)
29+
off += 16
30+
cnt -= 16
31+
}
32+
for cnt != 0 {
33+
p = pp.Append(p, arm64.AMOVD, obj.TYPE_REG, arm64.REGZERO, 0, obj.TYPE_MEM, arm64.REGSP, off)
34+
off += 8
35+
cnt -= 8
6436
}
65-
6637
return p
6738
}
6839

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