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cmd/compile: move mips64 over to new bounds check strategy
Change-Id: I936f6fdcc24d628f38482d32803ad2ae994ec1ad Reviewed-on: https://go-review.googlesource.com/c/go/+/682400 LUCI-TryBot-Result: Go LUCI <[email protected]> Reviewed-by: Julian Zhu <[email protected]> Reviewed-by: Mark Freeman <[email protected]> Reviewed-by: Keith Randall <[email protected]>
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6 files changed

+238
-161
lines changed

src/cmd/compile/internal/mips64/ssa.go

Lines changed: 86 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@ import (
1515
"cmd/compile/internal/types"
1616
"cmd/internal/obj"
1717
"cmd/internal/obj/mips"
18+
"internal/abi"
1819
)
1920

2021
// isFPreg reports whether r is an FP register.
@@ -507,12 +508,93 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
507508
p.To.Name = obj.NAME_EXTERN
508509
// AuxInt encodes how many buffer entries we need.
509510
p.To.Sym = ir.Syms.GCWriteBarrier[v.AuxInt-1]
510-
case ssa.OpMIPS64LoweredPanicBoundsA, ssa.OpMIPS64LoweredPanicBoundsB, ssa.OpMIPS64LoweredPanicBoundsC:
511-
p := s.Prog(obj.ACALL)
511+
512+
case ssa.OpMIPS64LoweredPanicBoundsRR, ssa.OpMIPS64LoweredPanicBoundsRC, ssa.OpMIPS64LoweredPanicBoundsCR, ssa.OpMIPS64LoweredPanicBoundsCC:
513+
// Compute the constant we put in the PCData entry for this call.
514+
code, signed := ssa.BoundsKind(v.AuxInt).Code()
515+
xIsReg := false
516+
yIsReg := false
517+
xVal := 0
518+
yVal := 0
519+
switch v.Op {
520+
case ssa.OpMIPS64LoweredPanicBoundsRR:
521+
xIsReg = true
522+
xVal = int(v.Args[0].Reg() - mips.REG_R1)
523+
yIsReg = true
524+
yVal = int(v.Args[1].Reg() - mips.REG_R1)
525+
case ssa.OpMIPS64LoweredPanicBoundsRC:
526+
xIsReg = true
527+
xVal = int(v.Args[0].Reg() - mips.REG_R1)
528+
c := v.Aux.(ssa.PanicBoundsC).C
529+
if c >= 0 && c <= abi.BoundsMaxConst {
530+
yVal = int(c)
531+
} else {
532+
// Move constant to a register
533+
yIsReg = true
534+
if yVal == xVal {
535+
yVal = 1
536+
}
537+
p := s.Prog(mips.AMOVV)
538+
p.From.Type = obj.TYPE_CONST
539+
p.From.Offset = c
540+
p.To.Type = obj.TYPE_REG
541+
p.To.Reg = mips.REG_R1 + int16(yVal)
542+
}
543+
case ssa.OpMIPS64LoweredPanicBoundsCR:
544+
yIsReg = true
545+
yVal := int(v.Args[0].Reg() - mips.REG_R1)
546+
c := v.Aux.(ssa.PanicBoundsC).C
547+
if c >= 0 && c <= abi.BoundsMaxConst {
548+
xVal = int(c)
549+
} else {
550+
// Move constant to a register
551+
xIsReg = true
552+
if xVal == yVal {
553+
xVal = 1
554+
}
555+
p := s.Prog(mips.AMOVV)
556+
p.From.Type = obj.TYPE_CONST
557+
p.From.Offset = c
558+
p.To.Type = obj.TYPE_REG
559+
p.To.Reg = mips.REG_R1 + int16(xVal)
560+
}
561+
case ssa.OpMIPS64LoweredPanicBoundsCC:
562+
c := v.Aux.(ssa.PanicBoundsCC).Cx
563+
if c >= 0 && c <= abi.BoundsMaxConst {
564+
xVal = int(c)
565+
} else {
566+
// Move constant to a register
567+
xIsReg = true
568+
p := s.Prog(mips.AMOVV)
569+
p.From.Type = obj.TYPE_CONST
570+
p.From.Offset = c
571+
p.To.Type = obj.TYPE_REG
572+
p.To.Reg = mips.REG_R1 + int16(xVal)
573+
}
574+
c = v.Aux.(ssa.PanicBoundsCC).Cy
575+
if c >= 0 && c <= abi.BoundsMaxConst {
576+
yVal = int(c)
577+
} else {
578+
// Move constant to a register
579+
yIsReg = true
580+
yVal = 1
581+
p := s.Prog(mips.AMOVV)
582+
p.From.Type = obj.TYPE_CONST
583+
p.From.Offset = c
584+
p.To.Type = obj.TYPE_REG
585+
p.To.Reg = mips.REG_R1 + int16(yVal)
586+
}
587+
}
588+
c := abi.BoundsEncode(code, signed, xIsReg, yIsReg, xVal, yVal)
589+
590+
p := s.Prog(obj.APCDATA)
591+
p.From.SetConst(abi.PCDATA_PanicBounds)
592+
p.To.SetConst(int64(c))
593+
p = s.Prog(obj.ACALL)
512594
p.To.Type = obj.TYPE_MEM
513595
p.To.Name = obj.NAME_EXTERN
514-
p.To.Sym = ssagen.BoundsCheckFunc[v.AuxInt]
515-
s.UseArgs(16) // space used in callee args area by assembly stubs
596+
p.To.Sym = ir.Syms.PanicBounds
597+
516598
case ssa.OpMIPS64LoweredAtomicLoad8, ssa.OpMIPS64LoweredAtomicLoad32, ssa.OpMIPS64LoweredAtomicLoad64:
517599
as := mips.AMOVV
518600
switch v.Op {

src/cmd/compile/internal/ssa/_gen/MIPS64.rules

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -479,9 +479,11 @@
479479
// Publication barrier as intrinsic
480480
(PubBarrier ...) => (LoweredPubBarrier ...)
481481

482-
(PanicBounds [kind] x y mem) && boundsABI(kind) == 0 => (LoweredPanicBoundsA [kind] x y mem)
483-
(PanicBounds [kind] x y mem) && boundsABI(kind) == 1 => (LoweredPanicBoundsB [kind] x y mem)
484-
(PanicBounds [kind] x y mem) && boundsABI(kind) == 2 => (LoweredPanicBoundsC [kind] x y mem)
482+
(PanicBounds ...) => (LoweredPanicBoundsRR ...)
483+
(LoweredPanicBoundsRR [kind] x (MOVVconst [c]) mem) => (LoweredPanicBoundsRC [kind] x {PanicBoundsC{C:c}} mem)
484+
(LoweredPanicBoundsRR [kind] (MOVVconst [c]) y mem) => (LoweredPanicBoundsCR [kind] {PanicBoundsC{C:c}} y mem)
485+
(LoweredPanicBoundsRC [kind] {p} (MOVVconst [c]) mem) => (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:c, Cy:p.C}} mem)
486+
(LoweredPanicBoundsCR [kind] {p} (MOVVconst [c]) mem) => (LoweredPanicBoundsCC [kind] {PanicBoundsCC{Cx:p.C, Cy:c}} mem)
485487

486488
// Optimizations
487489

src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -136,10 +136,7 @@ func init() {
136136
lo = buildReg("LO")
137137
hi = buildReg("HI")
138138
callerSave = gp | fp | lo | hi | buildReg("g") // runtime.setg (and anything calling it) may clobber g
139-
r1 = buildReg("R1")
140-
r2 = buildReg("R2")
141-
r3 = buildReg("R3")
142-
r4 = buildReg("R4")
139+
first16 = buildReg("R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16")
143140
)
144141
// Common regInfo
145142
var (
@@ -469,12 +466,15 @@ func init() {
469466
// Do data barrier. arg0=memorys
470467
{name: "LoweredPubBarrier", argLength: 1, asm: "SYNC", hasSideEffects: true},
471468

472-
// There are three of these functions so that they can have three different register inputs.
473-
// When we check 0 <= c <= cap (A), then 0 <= b <= c (B), then 0 <= a <= b (C), we want the
474-
// default registers to match so we don't need to copy registers around unnecessarily.
475-
{name: "LoweredPanicBoundsA", argLength: 3, aux: "Int64", reg: regInfo{inputs: []regMask{r3, r4}}, typ: "Mem", call: true}, // arg0=idx, arg1=len, arg2=mem, returns memory. AuxInt contains report code (see PanicBounds in genericOps.go).
476-
{name: "LoweredPanicBoundsB", argLength: 3, aux: "Int64", reg: regInfo{inputs: []regMask{r2, r3}}, typ: "Mem", call: true}, // arg0=idx, arg1=len, arg2=mem, returns memory. AuxInt contains report code (see PanicBounds in genericOps.go).
477-
{name: "LoweredPanicBoundsC", argLength: 3, aux: "Int64", reg: regInfo{inputs: []regMask{r1, r2}}, typ: "Mem", call: true}, // arg0=idx, arg1=len, arg2=mem, returns memory. AuxInt contains report code (see PanicBounds in genericOps.go).
469+
// LoweredPanicBoundsRR takes x and y, two values that caused a bounds check to fail.
470+
// the RC and CR versions are used when one of the arguments is a constant. CC is used
471+
// when both are constant (normally both 0, as prove derives the fact that a [0] bounds
472+
// failure means the length must have also been 0).
473+
// AuxInt contains a report code (see PanicBounds in genericOps.go).
474+
{name: "LoweredPanicBoundsRR", argLength: 3, aux: "Int64", reg: regInfo{inputs: []regMask{first16, first16}}, typ: "Mem", call: true}, // arg0=x, arg1=y, arg2=mem, returns memory.
475+
{name: "LoweredPanicBoundsRC", argLength: 2, aux: "PanicBoundsC", reg: regInfo{inputs: []regMask{first16}}, typ: "Mem", call: true}, // arg0=x, arg1=mem, returns memory.
476+
{name: "LoweredPanicBoundsCR", argLength: 2, aux: "PanicBoundsC", reg: regInfo{inputs: []regMask{first16}}, typ: "Mem", call: true}, // arg0=y, arg1=mem, returns memory.
477+
{name: "LoweredPanicBoundsCC", argLength: 1, aux: "PanicBoundsCC", reg: regInfo{}, typ: "Mem", call: true}, // arg0=mem, returns memory.
478478
}
479479

480480
blocks := []blockData{

src/cmd/compile/internal/ssa/opGen.go

Lines changed: 22 additions & 16 deletions
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src/cmd/compile/internal/ssa/rewriteMIPS64.go

Lines changed: 88 additions & 55 deletions
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