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cmd/internal/obj/loong64: add support for FSEL instruction
Go asm syntax: FSEL FCC, FK, FJ, FD Equivalent platform assembler syntax: fsel fd, fj, fk, ca Change-Id: If75f16fca0adfc03f4952f8a5143d22da33ed425 Reviewed-on: https://go-review.googlesource.com/c/go/+/693457 LUCI-TryBot-Result: Go LUCI <[email protected]> Reviewed-by: Meidan Li <[email protected]> Reviewed-by: abner chenc <[email protected]> Reviewed-by: Dmitri Shuralyov <[email protected]> Reviewed-by: Mark Freeman <[email protected]>
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src/cmd/asm/internal/asm/testdata/loong64enc1.s

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@@ -376,6 +376,10 @@ lable2:
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FTINTRNEVF F0, F2 // 02e41a01
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FTINTRNEVD F0, F2 // 02e81a01
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// FSEL instruction
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FSEL FCC0, F1, F2, F3 // 4304000d
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FSEL FCC1, F1, F2 // 4284000d
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// LDX.{B,BU,H,HU,W,WU,D} instructions
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MOVB (R14)(R13), R12 // cc350038
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MOVBU (R14)(R13), R12 // cc352038

src/cmd/internal/obj/loong64/a.out.go

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@@ -748,6 +748,9 @@ const (
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AFTINTRNEVF
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AFTINTRNEVD
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// 3.2.4.2
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AFSEL
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// LSX and LASX memory access instructions
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AVMOVQ
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AXVMOVQ

src/cmd/internal/obj/loong64/anames.go

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src/cmd/internal/obj/loong64/asm.go

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@@ -154,6 +154,9 @@ var optab = []Optab{
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{AFMADDF, C_FREG, C_FREG, C_NONE, C_FREG, C_NONE, 37, 4, 0, 0},
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{AFMADDF, C_FREG, C_FREG, C_FREG, C_FREG, C_NONE, 37, 4, 0, 0},
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{AFSEL, C_FCCREG, C_FREG, C_FREG, C_FREG, C_NONE, 33, 4, 0, 0},
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{AFSEL, C_FCCREG, C_FREG, C_NONE, C_FREG, C_NONE, 33, 4, 0, 0},
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{AMOVW, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
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{AMOVWU, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
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{AMOVV, C_REG, C_NONE, C_NONE, C_SAUTO, C_NONE, 7, 4, REGSP, 0},
@@ -1517,6 +1520,7 @@ func buildop(ctxt *obj.Link) {
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AWORD,
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APRELD,
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APRELDX,
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AFSEL,
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obj.ANOP,
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obj.ATEXT,
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obj.AFUNCDATA,
@@ -2387,6 +2391,16 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
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}
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o1 = OP_6IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg))
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case 33: // fsel ca, fk, [fj], fd
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ca := uint32(p.From.Reg)
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fk := uint32(p.Reg)
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fd := uint32(p.To.Reg)
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fj := fd
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if len(p.RestArgs) > 0 {
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fj = uint32(p.GetFrom3().Reg)
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}
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o1 = 0x340<<18 | (ca&0x7)<<15 | (fk&0x1F)<<10 | (fj&0x1F)<<5 | (fd & 0x1F)
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case 34: // mov $con,fr
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v := c.regoff(&p.From)
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a := AADDU

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