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Revert "[LSR] Do not create duplicated PHI nodes while preserving LCSSA form" (llvm#107666)
Reverts llvm#107380 Change is causing the test preserve-lcssa.ll to fail on at least 2 build bots: - https://lab.llvm.org/buildbot/#/builders/190/builds/5231 - https://lab.llvm.org/buildbot/#/builders/161/builds/1855
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7 files changed

+44
-162
lines changed

7 files changed

+44
-162
lines changed

‎llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp‎

Lines changed: 15 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -2186,12 +2186,6 @@ class LSRInstance {
21862186
/// Induction variables that were generated and inserted by the SCEV Expander.
21872187
SmallVector<llvm::WeakVH, 2> ScalarEvolutionIVs;
21882188

2189-
// Inserting instructions in the loop and using them as PHI's input could
2190-
// break LCSSA in case if PHI's parent block is not a loop exit (i.e. the
2191-
// corresponding incoming block is not loop exiting). So collect all such
2192-
// instructions to form LCSSA for them later.
2193-
SmallSetVector<Instruction *, 4> InsertedNonLCSSAInsts;
2194-
21952189
void OptimizeShadowIV();
21962190
bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
21972191
ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
@@ -2282,9 +2276,9 @@ class LSRInstance {
22822276
SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
22832277
void RewriteForPHI(PHINode *PN, const LSRUse &LU, const LSRFixup &LF,
22842278
const Formula &F,
2285-
SmallVectorImpl<WeakTrackingVH> &DeadInsts);
2279+
SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
22862280
void Rewrite(const LSRUse &LU, const LSRFixup &LF, const Formula &F,
2287-
SmallVectorImpl<WeakTrackingVH> &DeadInsts);
2281+
SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
22882282
void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution);
22892283

22902284
public:
@@ -5864,11 +5858,17 @@ Value *LSRInstance::Expand(const LSRUse &LU, const LSRFixup &LF,
58645858
/// Helper for Rewrite. PHI nodes are special because the use of their operands
58655859
/// effectively happens in their predecessor blocks, so the expression may need
58665860
/// to be expanded in multiple places.
5867-
void LSRInstance::RewriteForPHI(PHINode *PN, const LSRUse &LU,
5868-
const LSRFixup &LF, const Formula &F,
5869-
SmallVectorImpl<WeakTrackingVH> &DeadInsts) {
5861+
void LSRInstance::RewriteForPHI(
5862+
PHINode *PN, const LSRUse &LU, const LSRFixup &LF, const Formula &F,
5863+
SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
58705864
DenseMap<BasicBlock *, Value *> Inserted;
58715865

5866+
// Inserting instructions in the loop and using them as PHI's input could
5867+
// break LCSSA in case if PHI's parent block is not a loop exit (i.e. the
5868+
// corresponding incoming block is not loop exiting). So collect all such
5869+
// instructions to form LCSSA for them later.
5870+
SmallVector<Instruction *, 4> InsertedNonLCSSAInsts;
5871+
58725872
for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
58735873
if (PN->getIncomingValue(i) == LF.OperandValToReplace) {
58745874
bool needUpdateFixups = false;
@@ -5939,7 +5939,7 @@ void LSRInstance::RewriteForPHI(PHINode *PN, const LSRUse &LU,
59395939
// the inserted value.
59405940
if (auto *I = dyn_cast<Instruction>(FullV))
59415941
if (L->contains(I) && !L->contains(BB))
5942-
InsertedNonLCSSAInsts.insert(I);
5942+
InsertedNonLCSSAInsts.push_back(I);
59435943

59445944
PN->setIncomingValue(i, FullV);
59455945
Pair.first->second = FullV;
@@ -5983,14 +5983,16 @@ void LSRInstance::RewriteForPHI(PHINode *PN, const LSRUse &LU,
59835983
}
59845984
}
59855985
}
5986+
5987+
formLCSSAForInstructions(InsertedNonLCSSAInsts, DT, LI, &SE);
59865988
}
59875989

59885990
/// Emit instructions for the leading candidate expression for this LSRUse (this
59895991
/// is called "expanding"), and update the UserInst to reference the newly
59905992
/// expanded value.
59915993
void LSRInstance::Rewrite(const LSRUse &LU, const LSRFixup &LF,
59925994
const Formula &F,
5993-
SmallVectorImpl<WeakTrackingVH> &DeadInsts) {
5995+
SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
59945996
// First, find an insertion point that dominates UserInst. For PHI nodes,
59955997
// find the nearest block which dominates all the relevant uses.
59965998
if (PHINode *PN = dyn_cast<PHINode>(LF.UserInst)) {
@@ -6078,9 +6080,6 @@ void LSRInstance::ImplementSolution(
60786080
Changed = true;
60796081
}
60806082

6081-
auto InsertedInsts = InsertedNonLCSSAInsts.takeVector();
6082-
formLCSSAForInstructions(InsertedInsts, DT, LI, &SE);
6083-
60846083
for (const IVChain &Chain : IVChainVec) {
60856084
GenerateIVChain(Chain, DeadInsts);
60866085
Changed = true;

‎llvm/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll‎

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -24,15 +24,15 @@ define ptr @test1() {
2424
; CHECK-NEXT: br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]
2525
; CHECK: bbA:
2626
; CHECK-NEXT: switch i32 0, label [[BBA_BB89_CRIT_EDGE:%.*]] [
27-
; CHECK-NEXT: i32 47, label [[BBA_BB89_CRIT_EDGE]]
28-
; CHECK-NEXT: i32 58, label [[BBA_BB89_CRIT_EDGE]]
27+
; CHECK-NEXT: i32 47, label [[BBA_BB89_CRIT_EDGE]]
28+
; CHECK-NEXT: i32 58, label [[BBA_BB89_CRIT_EDGE]]
2929
; CHECK-NEXT: ]
3030
; CHECK: bbA.bb89_crit_edge:
3131
; CHECK-NEXT: br label [[BB89:%.*]]
3232
; CHECK: bbB:
3333
; CHECK-NEXT: switch i8 0, label [[BBB_BB89_CRIT_EDGE:%.*]] [
34-
; CHECK-NEXT: i8 47, label [[BBB_BB89_CRIT_EDGE]]
35-
; CHECK-NEXT: i8 58, label [[BBB_BB89_CRIT_EDGE]]
34+
; CHECK-NEXT: i8 47, label [[BBB_BB89_CRIT_EDGE]]
35+
; CHECK-NEXT: i8 58, label [[BBB_BB89_CRIT_EDGE]]
3636
; CHECK-NEXT: ]
3737
; CHECK: bbB.bb89_crit_edge:
3838
; CHECK-NEXT: br label [[BB89]]
@@ -85,22 +85,23 @@ define ptr @test2() {
8585
; CHECK-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV]], i64 1
8686
; CHECK-NEXT: br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]
8787
; CHECK: loopexit:
88+
; CHECK-NEXT: [[SCEVGEP_LCSSA1:%.*]] = phi ptr [ [[SCEVGEP]], [[LOOP]] ]
8889
; CHECK-NEXT: [[SCEVGEP_LCSSA:%.*]] = phi ptr [ [[SCEVGEP]], [[LOOP]] ]
8990
; CHECK-NEXT: br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]
9091
; CHECK: bbA:
9192
; CHECK-NEXT: switch i32 0, label [[BB89:%.*]] [
92-
; CHECK-NEXT: i32 47, label [[BB89]]
93-
; CHECK-NEXT: i32 58, label [[BB89]]
93+
; CHECK-NEXT: i32 47, label [[BB89]]
94+
; CHECK-NEXT: i32 58, label [[BB89]]
9495
; CHECK-NEXT: ]
9596
; CHECK: bbB:
9697
; CHECK-NEXT: switch i8 0, label [[BBB_EXIT_CRIT_EDGE:%.*]] [
97-
; CHECK-NEXT: i8 47, label [[BBB_EXIT_CRIT_EDGE]]
98-
; CHECK-NEXT: i8 58, label [[BBB_EXIT_CRIT_EDGE]]
98+
; CHECK-NEXT: i8 47, label [[BBB_EXIT_CRIT_EDGE]]
99+
; CHECK-NEXT: i8 58, label [[BBB_EXIT_CRIT_EDGE]]
99100
; CHECK-NEXT: ]
100101
; CHECK: bbB.exit_crit_edge:
101102
; CHECK-NEXT: br label [[EXIT:%.*]]
102103
; CHECK: bb89:
103-
; CHECK-NEXT: [[TMP75PHI:%.*]] = phi ptr [ [[SCEVGEP_LCSSA]], [[BBA]] ], [ [[SCEVGEP_LCSSA]], [[BBA]] ], [ [[SCEVGEP_LCSSA]], [[BBA]] ]
104+
; CHECK-NEXT: [[TMP75PHI:%.*]] = phi ptr [ [[SCEVGEP_LCSSA1]], [[BBA]] ], [ [[SCEVGEP_LCSSA1]], [[BBA]] ], [ [[SCEVGEP_LCSSA1]], [[BBA]] ]
104105
; CHECK-NEXT: br label [[EXIT]]
105106
; CHECK: exit:
106107
; CHECK-NEXT: [[RESULT:%.*]] = phi ptr [ [[TMP75PHI]], [[BB89]] ], [ [[SCEVGEP_LCSSA]], [[BBB_EXIT_CRIT_EDGE]] ]

‎llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,8 @@ define amdgpu_kernel void @scaledregtest() local_unnamed_addr {
1616
; CHECK-NEXT: entry:
1717
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1818
; CHECK: loopexit:
19-
; CHECK-NEXT: [[SCEVGEP11_LCSSA:%.*]] = phi ptr addrspace(5) [ [[SCEVGEP11:%.*]], [[FOR_BODY]] ]
2019
; CHECK-NEXT: [[SCEVGEP13_LCSSA:%.*]] = phi ptr [ [[SCEVGEP13:%.*]], [[FOR_BODY]] ]
20+
; CHECK-NEXT: [[SCEVGEP11_LCSSA:%.*]] = phi ptr addrspace(5) [ [[SCEVGEP11:%.*]], [[FOR_BODY]] ]
2121
; CHECK-NEXT: br label [[FOR_BODY_1:%.*]]
2222
; CHECK: for.body.1:
2323
; CHECK-NEXT: [[LSR_IV5:%.*]] = phi ptr addrspace(5) [ [[SCEVGEP6:%.*]], [[FOR_BODY_1]] ], [ [[SCEVGEP11_LCSSA]], [[LOOPEXIT:%.*]] ]

‎llvm/test/Transforms/LoopStrengthReduce/X86/2011-11-29-postincphi.ll‎

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,17 +20,16 @@ define i64 @sqlite3DropTriggerPtr() nounwind {
2020
; CHECK-NEXT: .p2align 4, 0x90
2121
; CHECK-NEXT: .LBB0_1: # %bb1
2222
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
23+
; CHECK-NEXT: movq %rbx, %rcx
2324
; CHECK-NEXT: testb %al, %al
24-
; CHECK-NEXT: je .LBB0_4
25+
; CHECK-NEXT: je .LBB0_3
2526
; CHECK-NEXT: # %bb.2: # %bb4
2627
; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
27-
; CHECK-NEXT: incq %rbx
28+
; CHECK-NEXT: leaq 1(%rcx), %rbx
2829
; CHECK-NEXT: testb %al, %al
2930
; CHECK-NEXT: jne .LBB0_1
30-
; CHECK-NEXT: # %bb.3: # %bb8split
31-
; CHECK-NEXT: decq %rbx
32-
; CHECK-NEXT: .LBB0_4: # %bb8
33-
; CHECK-NEXT: movq %rbx, %rax
31+
; CHECK-NEXT: .LBB0_3: # %bb8
32+
; CHECK-NEXT: movq %rcx, %rax
3433
; CHECK-NEXT: popq %rbx
3534
; CHECK-NEXT: retq
3635
bb:

‎llvm/test/Transforms/LoopStrengthReduce/X86/expander-crashes.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,8 @@ define i64 @blam(ptr %start, ptr %end, ptr %ptr.2) {
2121
; CHECK-NEXT: [[EC:%.*]] = icmp eq ptr [[IV_NEXT]], [[END:%.*]]
2222
; CHECK-NEXT: br i1 [[EC]], label [[LOOP_2_PH:%.*]], label [[LOOP_1_HEADER]]
2323
; CHECK: loop.2.ph:
24-
; CHECK-NEXT: [[LSR_IV_NEXT5_LCSSA:%.*]] = phi i64 [ [[LSR_IV_NEXT5]], [[LOOP_1_HEADER]] ]
2524
; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi ptr [ [[IV_NEXT]], [[LOOP_1_HEADER]] ]
25+
; CHECK-NEXT: [[LSR_IV_NEXT5_LCSSA:%.*]] = phi i64 [ [[LSR_IV_NEXT5]], [[LOOP_1_HEADER]] ]
2626
; CHECK-NEXT: br label [[LOOP_2_HEADER:%.*]]
2727
; CHECK: loop.2.header:
2828
; CHECK-NEXT: [[LSR_IV2:%.*]] = phi i64 [ [[LSR_IV_NEXT3:%.*]], [[LOOP_2_LATCH:%.*]] ], [ [[LSR_IV_NEXT5_LCSSA]], [[LOOP_2_PH]] ]

‎llvm/test/Transforms/LoopStrengthReduce/X86/missing-phi-operand-update.ll‎

Lines changed: 12 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -18,24 +18,23 @@ define i32 @foo(ptr %A, i32 %t) {
1818
; CHECK-NEXT: entry:
1919
; CHECK-NEXT: br label [[LOOP_32:%.*]]
2020
; CHECK: loop.exit.loopexitsplitsplitsplit:
21-
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV1:%.*]], [[IFMERGE_34:%.*]] ]
22-
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[LSR_IV]], -1
21+
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[LSR_IV:%.*]], -1
2322
; CHECK-NEXT: br label [[LOOP_EXIT_LOOPEXITSPLITSPLIT:%.*]]
2423
; CHECK: ifmerge.38.loop.exit.loopexitsplitsplit_crit_edge:
25-
; CHECK-NEXT: [[LSR_IV_LCSSA10:%.*]] = phi i64 [ [[LSR_IV1]], [[IFMERGE_38:%.*]] ]
24+
; CHECK-NEXT: [[LSR_IV_LCSSA10:%.*]] = phi i64 [ [[LSR_IV]], [[IFMERGE_38:%.*]] ]
2625
; CHECK-NEXT: br label [[LOOP_EXIT_LOOPEXITSPLITSPLIT]]
2726
; CHECK: loop.exit.loopexitsplitsplit:
2827
; CHECK-NEXT: [[INDVARS_IV_LCSSA_PH_PH_PH:%.*]] = phi i64 [ [[LSR_IV_LCSSA10]], [[IFMERGE_38_LOOP_EXIT_LOOPEXITSPLITSPLIT_CRIT_EDGE:%.*]] ], [ [[TMP0]], [[LOOP_EXIT_LOOPEXITSPLITSPLITSPLIT:%.*]] ]
2928
; CHECK-NEXT: br label [[LOOP_EXIT_LOOPEXITSPLIT:%.*]]
3029
; CHECK: ifmerge.42.loop.exit.loopexitsplit_crit_edge:
31-
; CHECK-NEXT: [[LSR_IV_LCSSA11:%.*]] = phi i64 [ [[LSR_IV1]], [[IFMERGE_42:%.*]] ]
30+
; CHECK-NEXT: [[LSR_IV_LCSSA11:%.*]] = phi i64 [ [[LSR_IV]], [[IFMERGE_42:%.*]] ]
3231
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[LSR_IV_LCSSA11]], 1
3332
; CHECK-NEXT: br label [[LOOP_EXIT_LOOPEXITSPLIT]]
3433
; CHECK: loop.exit.loopexitsplit:
3534
; CHECK-NEXT: [[INDVARS_IV_LCSSA_PH_PH:%.*]] = phi i64 [ [[TMP1]], [[IFMERGE_42_LOOP_EXIT_LOOPEXITSPLIT_CRIT_EDGE:%.*]] ], [ [[INDVARS_IV_LCSSA_PH_PH_PH]], [[LOOP_EXIT_LOOPEXITSPLITSPLIT]] ]
3635
; CHECK-NEXT: br label [[LOOP_EXIT_LOOPEXIT:%.*]]
3736
; CHECK: then.34.loop.exit.loopexit_crit_edge:
38-
; CHECK-NEXT: [[LSR_IV_LCSSA:%.*]] = phi i64 [ [[LSR_IV1]], [[THEN_34:%.*]] ]
37+
; CHECK-NEXT: [[LSR_IV_LCSSA:%.*]] = phi i64 [ [[LSR_IV]], [[THEN_34:%.*]] ]
3938
; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[LSR_IV_LCSSA]], -2
4039
; CHECK-NEXT: br label [[LOOP_EXIT_LOOPEXIT]]
4140
; CHECK: loop.exit.loopexit:
@@ -49,31 +48,31 @@ define i32 @foo(ptr %A, i32 %t) {
4948
; CHECK-NEXT: [[I_0_LCSSA:%.*]] = phi i32 [ [[TMP]], [[LOOP_EXIT]] ], [ 50, [[THEN_8_1]] ], [ 50, [[IFMERGE_8:%.*]] ]
5049
; CHECK-NEXT: ret i32 [[I_0_LCSSA]]
5150
; CHECK: loop.32:
52-
; CHECK-NEXT: [[LSR_IV1]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[IFMERGE_46:%.*]] ], [ 2, [[ENTRY:%.*]] ]
51+
; CHECK-NEXT: [[LSR_IV]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[IFMERGE_46:%.*]] ], [ 2, [[ENTRY:%.*]] ]
5352
; CHECK-NEXT: [[I1_I64_0:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[NEXTIVLOOP_32:%.*]], [[IFMERGE_46]] ]
54-
; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[LSR_IV1]], 2
53+
; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
5554
; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]
5655
; CHECK-NEXT: [[SCEVGEP8:%.*]] = getelementptr i8, ptr [[SCEVGEP7]], i64 -4
5756
; CHECK-NEXT: [[GEPLOAD:%.*]] = load i32, ptr [[SCEVGEP8]], align 4
5857
; CHECK-NEXT: [[CMP_34:%.*]] = icmp sgt i32 [[GEPLOAD]], [[T]]
59-
; CHECK-NEXT: br i1 [[CMP_34]], label [[THEN_34]], label [[IFMERGE_34]]
58+
; CHECK-NEXT: br i1 [[CMP_34]], label [[THEN_34]], label [[IFMERGE_34:%.*]]
6059
; CHECK: then.34:
61-
; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[LSR_IV1]], 2
60+
; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
6261
; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP4]]
6362
; CHECK-NEXT: [[SCEVGEP6:%.*]] = getelementptr i8, ptr [[SCEVGEP5]], i64 -8
6463
; CHECK-NEXT: [[GEPLOAD18:%.*]] = load i32, ptr [[SCEVGEP6]], align 4
6564
; CHECK-NEXT: [[CMP_35:%.*]] = icmp slt i32 [[GEPLOAD18]], [[T]]
6665
; CHECK-NEXT: br i1 [[CMP_35]], label [[THEN_34_LOOP_EXIT_LOOPEXIT_CRIT_EDGE]], label [[IFMERGE_34]]
6766
; CHECK: ifmerge.34:
68-
; CHECK-NEXT: [[TMP5:%.*]] = shl nuw nsw i64 [[LSR_IV1]], 2
67+
; CHECK-NEXT: [[TMP5:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
6968
; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]
7069
; CHECK-NEXT: [[GEPLOAD20:%.*]] = load i32, ptr [[SCEVGEP4]], align 4
7170
; CHECK-NEXT: [[CMP_38:%.*]] = icmp sgt i32 [[GEPLOAD20]], [[T]]
7271
; CHECK-NEXT: [[CMP_39:%.*]] = icmp slt i32 [[GEPLOAD]], [[T]]
7372
; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP_38]], [[CMP_39]]
7473
; CHECK-NEXT: br i1 [[OR_COND]], label [[LOOP_EXIT_LOOPEXITSPLITSPLITSPLIT]], label [[IFMERGE_38]]
7574
; CHECK: ifmerge.38:
76-
; CHECK-NEXT: [[TMP6:%.*]] = shl nuw nsw i64 [[LSR_IV1]], 2
75+
; CHECK-NEXT: [[TMP6:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
7776
; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP6]]
7877
; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[SCEVGEP2]], i64 4
7978
; CHECK-NEXT: [[GEPLOAD24:%.*]] = load i32, ptr [[SCEVGEP3]], align 4
@@ -82,7 +81,7 @@ define i32 @foo(ptr %A, i32 %t) {
8281
; CHECK-NEXT: [[OR_COND55:%.*]] = and i1 [[CMP_42]], [[CMP_43]]
8382
; CHECK-NEXT: br i1 [[OR_COND55]], label [[IFMERGE_38_LOOP_EXIT_LOOPEXITSPLITSPLIT_CRIT_EDGE]], label [[IFMERGE_42]]
8483
; CHECK: ifmerge.42:
85-
; CHECK-NEXT: [[TMP7:%.*]] = shl nuw nsw i64 [[LSR_IV1]], 2
84+
; CHECK-NEXT: [[TMP7:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
8685
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP7]]
8786
; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 8
8887
; CHECK-NEXT: [[GEPLOAD28:%.*]] = load i32, ptr [[SCEVGEP1]], align 4
@@ -92,7 +91,7 @@ define i32 @foo(ptr %A, i32 %t) {
9291
; CHECK-NEXT: br i1 [[OR_COND56]], label [[IFMERGE_42_LOOP_EXIT_LOOPEXITSPLIT_CRIT_EDGE]], label [[IFMERGE_46]]
9392
; CHECK: ifmerge.46:
9493
; CHECK-NEXT: [[NEXTIVLOOP_32]] = add nuw nsw i64 [[I1_I64_0]], 1
95-
; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV1]], 4
94+
; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 4
9695
; CHECK-NEXT: [[CONDLOOP_32:%.*]] = icmp ult i64 [[NEXTIVLOOP_32]], 12
9796
; CHECK-NEXT: br i1 [[CONDLOOP_32]], label [[LOOP_32]], label [[LOOP_25:%.*]]
9897
; CHECK: loop.25:

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