hps: switch SPI flash to DDR mode

Signed-off-by: Dan Callaghan <dcallagh@google.com>

Author: danc86

soc/hps_soc.py

@@ -161,7 +161,9 @@ def setup_litespi_flash(self):
         self.submodules.spiflash_phy = LiteSPIPHY(
             self.platform.request("spiflash4x"),
             GD25LQ128D(Codes.READ_1_1_4),
-            default_divisor=0)
+            default_divisor=0,
+            rate='1:2',
+            extra_latency=1)
         self.submodules.spiflash_mmap  = LiteSPI(phy=self.spiflash_phy,
             mmap_endianness = self.cpu.endianness)
         self.csr.add("spiflash_mmap")