Merge pull request #17 from google/pagetable

Allow initial MAIR, TCR and SCTLR values to be specified.

Author: qwandor

CHANGELOG.md

@@ -1,5 +1,12 @@
 # Changelog
 
+## Unreleased
+
+### Improvements
+
+- Added optional parameters to `initial_pagetable!` to allow initial MAIR, TCR and SCTLR values to
+  be specified. The default values are exposed as constants.
+
 ## 0.2.1
 
 ### Bugfixes

examples/qemu_el1.rs

@@ -7,7 +7,10 @@
 #![no_std]
 #![no_main]
 
-use aarch64_paging::paging::Attributes;
+use aarch64_paging::{
+    mair::{Mair, MairAttribute, NormalMemory},
+    paging::Attributes,
+};
 use aarch64_rt::{InitialPagetable, entry, initial_pagetable};
 use arm_pl011_uart::{PL011Registers, Uart, UniqueMmioPointer};
 use core::{fmt::Write, panic::PanicInfo, ptr::NonNull};
@@ -32,16 +35,33 @@ const MEMORY_ATTRIBUTES: Attributes = Attributes::VALID
     .union(Attributes::ACCESSED)
     .union(Attributes::NON_GLOBAL);
 
-initial_pagetable!({
-    let mut idmap = [0; 512];
-    // 1 GiB of device memory.
-    idmap[0] = DEVICE_ATTRIBUTES.bits();
-    // 1 GiB of normal memory.
-    idmap[1] = MEMORY_ATTRIBUTES.bits() | 0x40000000;
-    // Another 1 GiB of device memory starting at 256 GiB.
-    idmap[256] = DEVICE_ATTRIBUTES.bits() | 0x4000000000;
-    InitialPagetable(idmap)
-});
+/// Indirect memory attributes to use.
+///
+/// These are used for `ATTRIBUTE_INDEX_0` and `ATTRIBUTE_INDEX_1` in `DEVICE_ATTRIBUTES` and
+/// `MEMORY_ATTRIBUTES` respectively.
+const MAIR: Mair = Mair::EMPTY
+    .with_attribute(0, MairAttribute::DEVICE_NGNRE)
+    .with_attribute(
+        1,
+        MairAttribute::normal(
+            NormalMemory::WriteBackNonTransientReadWriteAllocate,
+            NormalMemory::WriteBackNonTransientReadWriteAllocate,
+        ),
+    );
+
+initial_pagetable!(
+    {
+        let mut idmap = [0; 512];
+        // 1 GiB of device memory.
+        idmap[0] = DEVICE_ATTRIBUTES.bits();
+        // 1 GiB of normal memory.
+        idmap[1] = MEMORY_ATTRIBUTES.bits() | 0x40000000;
+        // Another 1 GiB of device memory starting at 256 GiB.
+        idmap[256] = DEVICE_ATTRIBUTES.bits() | 0x4000000000;
+        InitialPagetable(idmap)
+    },
+    MAIR.0
+);
 
 entry!(main);
 fn main(arg0: u64, arg1: u64, arg2: u64, arg3: u64) -> ! {

src/el1_enable_mmu.S

@@ -22,7 +22,7 @@ mod pagetable;
 use core::arch::asm;
 use core::arch::global_asm;
 #[cfg(feature = "initial-pagetable")]
-pub use pagetable::InitialPagetable;
+pub use pagetable::{DEFAULT_MAIR, DEFAULT_SCTLR, DEFAULT_TCR, InitialPagetable};
 
 global_asm!(include_str!("entry.S"));