Support detecting exception level at runtime (#26)

* set_exception_vector and rust_entry can be mangled.

They aren't referred to directly in any assembly code.

* Factor out separate functions to enable the MMU at each EL.

These are public, so users of the crate can call them directly if needed.

* Detect EL at runtime for enable_mmu if no elX feature specified.

* Detect current EL for setting exception vector too.

* Hide functions to enable MMU.

They need to be public because the macro calls them, but they shouldn't
be called directly.

* Move private public symbols to __private submodule.

* Use Rust code to switch on exception level for vector table.

Author: qwandor

CHANGELOG.md

@@ -1,5 +1,18 @@
 # Changelog
 
+## Unreleased
+
+### Improvements
+
+- If the `initial-pagetable` or `exceptions` features are specified without any of the `elX`
+  features, then the exception level will be checked at runtime and the appropriate registers for
+  the current EL will be used. The `el1` feature is no longer enabled by default, as this runtime
+  detection should work instead.
+
+### Bugfixes
+
+- Stopped exposing unmangled symbols for `set_exception_vector` and `rust_entry`.
+
 ## 0.2.2
 
 ### Improvements

Cargo.toml

@@ -19,7 +19,7 @@ arm-pl011-uart = "0.4.0"
 smccc = "0.2.2"
 
 [features]
-default = ["el1", "exceptions", "initial-pagetable", "psci"]
+default = ["exceptions", "initial-pagetable", "psci"]
 el1 = []
 el2 = []
 el3 = []

README.md

@@ -46,7 +46,7 @@ fn main() {
 
 ## Features
 
-`el1`, `exceptions`, `initial-pagetable` and `psci` are enabled by default.
+`exceptions`, `initial-pagetable` and `psci` are enabled by default.
 
 ### `el1`
 
@@ -115,6 +115,10 @@ while the hypervisor or host has cacheable aliases to the same memory can lead t
 issues. Even if the host doesn't explicitly access the memory, speculative accesses can lead to
 cache fills.
 
+This may be combined with one of the `elX` features to set up the page table for that exception
+level. If not, the exception level will be checked at runtime and the corresponding system registers
+used.
+
 ### `psci`
 
 Adds the `start_core` function to start another CPU core via a PSCI `CPU_ON` call. This adds a

src/lib.rs

@@ -19,6 +19,12 @@ mod entry;
 #[cfg(feature = "initial-pagetable")]
 mod pagetable;
 
+#[cfg(feature = "initial-pagetable")]
+#[doc(hidden)]
+pub mod __private {
+    pub use crate::pagetable::{__enable_mmu_el1, __enable_mmu_el2, __enable_mmu_el3};
+}
+
 #[cfg(any(feature = "exceptions", feature = "psci"))]
 use core::arch::asm;
 #[cfg(feature = "exceptions")]
@@ -42,7 +48,6 @@ global_asm!(include_str!("exceptions.S"));
 
 /// Sets the appropriate vbar to point to our `vector_table`, if the `exceptions` feature is
 /// enabled.
-#[unsafe(no_mangle)]
 extern "C" fn set_exception_vector() {
     // SAFETY: We provide a valid vector table.
     #[cfg(all(feature = "el1", feature = "exceptions"))]
@@ -74,9 +79,55 @@ extern "C" fn set_exception_vector() {
             out("x9") _,
         );
     }
+    #[cfg(all(
+        feature = "exceptions",
+        not(any(feature = "el1", feature = "el2", feature = "el3"))
+    ))]
+    {
+        let current_el: u64;
+        // SAFETY: Reading CurrentEL is always safe.
+        unsafe {
+            asm!(
+                "mrs {current_el}, CurrentEL",
+                options(nomem, nostack, preserves_flags),
+                current_el = out(reg) current_el,
+            );
+        }
+        match (current_el >> 2) & 0b11 {
+            // SAFETY: We provide a valid vector table.
+            1 => unsafe {
+                asm!(
+                    "adr x9, vector_table_el1",
+                    "msr vbar_el1, x9",
+                    options(nomem, nostack, preserves_flags),
+                    out("x9") _,
+                );
+            },
+            // SAFETY: We provide a valid vector table.
+            2 => unsafe {
+                asm!(
+                    "adr x9, vector_table_el2",
+                    "msr vbar_el2, x9",
+                    options(nomem, nostack, preserves_flags),
+                    out("x9") _,
+                );
+            },
+            // SAFETY: We provide a valid vector table.
+            3 => unsafe {
+                asm!(
+                    "adr x9, vector_table_el3",
+                    "msr vbar_el3, x9",
+                    options(nomem, nostack, preserves_flags),
+                    out("x9") _,
+                );
+            },
+            _ => {
+                panic!("Unexpected EL");
+            }
+        }
+    }
 }
 
-#[unsafe(no_mangle)]
 extern "C" fn rust_entry(arg0: u64, arg1: u64, arg2: u64, arg3: u64) -> ! {
     set_exception_vector();
     __main(arg0, arg1, arg2, arg3)