Support booting the kernel in EL1 with a PSCI proxy

Cargo.toml

@@ -11,17 +11,22 @@ categories = ["embedded", "no-std"]
 
 [dependencies]
 aarch64-paging = { version = "0.11", default-features = false }
-aarch64-rt = { version = "0.3", features = ["el2", "exceptions", "initial-pagetable", "psci"], default-features = false }
+aarch64-rt = { version = "0.4", features = ["el2", "exceptions", "initial-pagetable", "psci"], default-features = false }
 arm-pl011-uart = "0.4"
+arm-psci = "0.2"
 arm-sysregs = { version = "0.2", features = ["el1", "el2"] }
 buddy_system_allocator = { version = "0.12", default-features = false, features = ["alloc", "use_spin"] }
+dtoolkit = { version = "0.1", features = ["write"] }
 embedded-io = "0.7"
 log = "0.4"
 percore = "0.2"
 safe-mmio = "0.2"
 smccc = "0.2"
 spin = { version = "0.10", features = ["lazy", "once", "spin_mutex"], default-features = false }
 
+[patch.crates-io]
+aarch64-rt = { git = "https://github.com/m4tx/aarch64-rt.git", rev = "4b70c951fa2263ca00bcd029dfc7b68ec74f69e7" }
+
 [lints.rust]
 deprecated-safe = "warn"
 keyword-idents = "warn"

linker/qemu.ld

@@ -1,4 +1,13 @@
 MEMORY
 {
-	image : ORIGIN = 0x40080000, LENGTH = 64M
+	image : ORIGIN = 0x40080000, LENGTH = 4M
+	payload (rwx) : ORIGIN = 0x40400000, LENGTH = 64M
 }
+
+SECTIONS {
+	.payload :
+	{
+       *(.payload);
+       . = ALIGN(4);
+     } > payload
+} INSERT AFTER .text;

src/exceptions.rs

@@ -6,42 +6,13 @@
 // option. This file may not be copied, modified, or distributed
 // except according to those terms.
 
-#[unsafe(no_mangle)]
-extern "C" fn sync_exception_current(_elr: u64, _spsr: u64) {
-    panic!("Unexpected sync_exception_current");
-}
-
-#[unsafe(no_mangle)]
-extern "C" fn irq_current(_elr: u64, _spsr: u64) {
-    panic!("Unexpected irq_current");
-}
-
-#[unsafe(no_mangle)]
-extern "C" fn fiq_current(_elr: u64, _spsr: u64) {
-    panic!("Unexpected fiq_current");
-}
-
-#[unsafe(no_mangle)]
-extern "C" fn serr_current(_elr: u64, _spsr: u64) {
-    panic!("Unexpected serr_current");
-}
-
-#[unsafe(no_mangle)]
-extern "C" fn sync_lower(_elr: u64, _spsr: u64) {
-    panic!("Unexpected sync_lower");
-}
-
-#[unsafe(no_mangle)]
-extern "C" fn irq_lower(_elr: u64, _spsr: u64) {
-    panic!("Unexpected irq_lower");
-}
-
-#[unsafe(no_mangle)]
-extern "C" fn fiq_lower(_elr: u64, _spsr: u64) {
-    panic!("Unexpected fiq_lower");
-}
-
-#[unsafe(no_mangle)]
-extern "C" fn serr_lower(_elr: u64, _spsr: u64) {
-    panic!("Unexpected serr_lower");
+use aarch64_rt::{ExceptionHandlers, RegisterStateRef};
+
+pub struct Exceptions;
+impl ExceptionHandlers for Exceptions {
+    extern "C" fn sync_lower(register_state: RegisterStateRef) {
+        // sync_lower exception is most likely a HVC/SMC call, which we should
+        // handle in the hypervisor.
+        crate::hypervisor::handle_sync_lower(register_state);
+    }
 }