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Fix codegen 1.5 block conversion tests which inadvertently target 1.0.
PiperOrigin-RevId: 861805278
1 parent 626b119 commit 2d6aa8b

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3 files changed

+58
-63
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3 files changed

+58
-63
lines changed

xls/codegen_v_1_5/block_conversion_pass_pipeline_test.cc

Lines changed: 48 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,6 @@
2424
#include <string>
2525
#include <string_view>
2626
#include <tuple>
27-
#include <utility>
2827
#include <vector>
2928

3029
#include "gmock/gmock.h"
@@ -46,7 +45,6 @@
4645
#include "xls/codegen/block_conversion_test_fixture.h"
4746
#include "xls/codegen/codegen_options.h"
4847
#include "xls/codegen/codegen_pass.h"
49-
#include "xls/codegen/codegen_result.h"
5048
#include "xls/codegen/ram_configuration.h"
5149
#include "xls/codegen_v_1_5/convert_to_block.h"
5250
#include "xls/common/casts.h"
@@ -69,15 +67,13 @@
6967
#include "xls/ir/nodes.h"
7068
#include "xls/ir/op.h"
7169
#include "xls/ir/proc.h"
72-
#include "xls/ir/proc_elaboration.h"
7370
#include "xls/ir/register.h"
7471
#include "xls/ir/source_location.h"
7572
#include "xls/ir/value.h"
7673
#include "xls/ir/verifier.h"
7774
#include "xls/scheduling/pipeline_schedule.h"
7875
#include "xls/scheduling/run_pipeline_schedule.h"
7976
#include "xls/scheduling/scheduling_options.h"
80-
#include "xls/scheduling/scheduling_result.h"
8177
#include "xls/tools/codegen.h"
8278
#include "xls/tools/codegen_flags.pb.h"
8379
#include "xls/tools/scheduling_options_flags.pb.h"
@@ -6799,27 +6795,25 @@ TEST_F(BlockConversionTest, TwoBitSelectorAllCasesPopulated) {
67996795
TEST_F(ProcConversionTestFixture, SimpleMultiProcConversion) {
68006796
XLS_ASSERT_OK_AND_ASSIGN(std::unique_ptr<Package> p,
68016797
CreateMultiProcPackage());
6802-
SchedulingOptionsFlagsProto scheduling_options;
6803-
scheduling_options.set_pipeline_stages(2);
6804-
scheduling_options.set_delay_model("unit");
6805-
scheduling_options.set_multi_proc(true);
6798+
SchedulingOptions scheduling_options;
6799+
scheduling_options.pipeline_stages(2);
6800+
scheduling_options.delay_model("unit");
6801+
scheduling_options.schedule_all_procs(true);
68066802

6807-
CodegenFlagsProto codegen_options;
6808-
codegen_options.set_flop_inputs(false);
6809-
codegen_options.set_flop_outputs(false);
6810-
codegen_options.set_reset("rst");
6811-
codegen_options.set_streaming_channel_data_suffix("_data");
6812-
codegen_options.set_streaming_channel_valid_suffix("_valid");
6813-
codegen_options.set_streaming_channel_ready_suffix("_ready");
6814-
codegen_options.set_module_name("p");
6815-
codegen_options.set_generator(GeneratorKind::GENERATOR_KIND_PIPELINE);
6803+
CodegenOptions codegen_options;
6804+
codegen_options.clock_name("clk");
6805+
codegen_options.flop_inputs(false);
6806+
codegen_options.flop_outputs(false);
6807+
codegen_options.reset("rst", false, false, false);
6808+
codegen_options.streaming_channel_data_suffix("_data");
6809+
codegen_options.streaming_channel_valid_suffix("_valid");
6810+
codegen_options.streaming_channel_ready_suffix("_ready");
6811+
codegen_options.module_name("p");
6812+
codegen_options.generate_combinational(false);
68166813

6817-
std::pair<SchedulingResult, verilog::CodegenResult> result;
68186814
XLS_ASSERT_OK_AND_ASSIGN(
6819-
result, ScheduleAndCodegen(p.get(), scheduling_options, codegen_options,
6820-
/*with_delay_model=*/true));
6821-
6822-
XLS_ASSERT_OK_AND_ASSIGN(Block * top_block, p->GetBlock("p"));
6815+
Block * top_block,
6816+
ConvertToBlock(p.get(), codegen_options, scheduling_options));
68236817

68246818
std::vector<absl::flat_hash_map<std::string, uint64_t>> inputs;
68256819
std::vector<absl::flat_hash_map<std::string, uint64_t>> outputs;
@@ -6897,27 +6891,25 @@ TEST_F(ProcConversionTestFixture,
68976891
SimpleMultiProcConversionWithFunctionsPresent) {
68986892
XLS_ASSERT_OK_AND_ASSIGN(std::unique_ptr<Package> p,
68996893
CreateMultiProcPackage(/*with_functions=*/true));
6900-
SchedulingOptionsFlagsProto scheduling_options;
6901-
scheduling_options.set_pipeline_stages(2);
6902-
scheduling_options.set_delay_model("unit");
6903-
scheduling_options.set_multi_proc(true);
6894+
SchedulingOptions scheduling_options;
6895+
scheduling_options.pipeline_stages(2);
6896+
scheduling_options.delay_model("unit");
6897+
scheduling_options.schedule_all_procs(true);
69046898

6905-
CodegenFlagsProto codegen_options;
6906-
codegen_options.set_flop_inputs(false);
6907-
codegen_options.set_flop_outputs(false);
6908-
codegen_options.set_reset("rst");
6909-
codegen_options.set_streaming_channel_data_suffix("_data");
6910-
codegen_options.set_streaming_channel_valid_suffix("_valid");
6911-
codegen_options.set_streaming_channel_ready_suffix("_ready");
6912-
codegen_options.set_module_name("p");
6913-
codegen_options.set_generator(GeneratorKind::GENERATOR_KIND_PIPELINE);
6899+
CodegenOptions codegen_options;
6900+
codegen_options.clock_name("clk");
6901+
codegen_options.flop_inputs(false);
6902+
codegen_options.flop_outputs(false);
6903+
codegen_options.reset("rst", false, false, false);
6904+
codegen_options.streaming_channel_data_suffix("_data");
6905+
codegen_options.streaming_channel_valid_suffix("_valid");
6906+
codegen_options.streaming_channel_ready_suffix("_ready");
6907+
codegen_options.module_name("p");
6908+
codegen_options.generate_combinational(false);
69146909

6915-
std::pair<SchedulingResult, verilog::CodegenResult> result;
69166910
XLS_ASSERT_OK_AND_ASSIGN(
6917-
result, ScheduleAndCodegen(p.get(), scheduling_options, codegen_options,
6918-
/*with_delay_model=*/true));
6919-
6920-
XLS_ASSERT_OK_AND_ASSIGN(Block * top_block, p->GetBlock("p"));
6911+
Block * top_block,
6912+
ConvertToBlock(p.get(), codegen_options, scheduling_options));
69216913

69226914
std::vector<absl::flat_hash_map<std::string, uint64_t>> inputs;
69236915
std::vector<absl::flat_hash_map<std::string, uint64_t>> outputs;
@@ -6997,27 +6989,25 @@ TEST_F(ProcConversionTestFixture, SimpleFunctionWithProcsPresent) {
69976989
XLS_ASSERT_OK_AND_ASSIGN(Function * f0, p->GetFunction("f0"));
69986990
XLS_ASSERT_OK(p->SetTop(f0));
69996991

7000-
SchedulingOptionsFlagsProto scheduling_options;
7001-
scheduling_options.set_pipeline_stages(1);
7002-
scheduling_options.set_delay_model("unit");
7003-
scheduling_options.set_multi_proc(true);
6992+
SchedulingOptions scheduling_options;
6993+
scheduling_options.pipeline_stages(1);
6994+
scheduling_options.delay_model("unit");
6995+
scheduling_options.schedule_all_procs(true);
70046996

7005-
CodegenFlagsProto codegen_options;
7006-
codegen_options.set_flop_inputs(false);
7007-
codegen_options.set_flop_outputs(false);
7008-
codegen_options.set_reset("rst");
7009-
codegen_options.set_streaming_channel_data_suffix("_data");
7010-
codegen_options.set_streaming_channel_valid_suffix("_valid");
7011-
codegen_options.set_streaming_channel_ready_suffix("_ready");
7012-
codegen_options.set_module_name("p");
7013-
codegen_options.set_generator(GeneratorKind::GENERATOR_KIND_PIPELINE);
6997+
CodegenOptions codegen_options;
6998+
codegen_options.clock_name("clk");
6999+
codegen_options.flop_inputs(false);
7000+
codegen_options.flop_outputs(false);
7001+
codegen_options.reset("rst", false, false, false);
7002+
codegen_options.streaming_channel_data_suffix("_data");
7003+
codegen_options.streaming_channel_valid_suffix("_valid");
7004+
codegen_options.streaming_channel_ready_suffix("_ready");
7005+
codegen_options.module_name("p");
7006+
codegen_options.generate_combinational(false);
70147007

7015-
std::pair<SchedulingResult, verilog::CodegenResult> result;
70167008
XLS_ASSERT_OK_AND_ASSIGN(
7017-
result, ScheduleAndCodegen(p.get(), scheduling_options, codegen_options,
7018-
/*with_delay_model=*/true));
7019-
7020-
XLS_ASSERT_OK_AND_ASSIGN(Block * top_block, p->GetBlock("p"));
7009+
Block * top_block,
7010+
ConvertToBlock(p.get(), codegen_options, scheduling_options));
70217011

70227012
EXPECT_EQ(top_block->name(), "p");
70237013
EXPECT_EQ(top_block->GetPorts().size(), 5);
@@ -7073,9 +7063,6 @@ TEST_F(ProcConversionTestFixture, TrivialProcHierarchyWithProcScopedChannels) {
70737063
XLS_ASSERT_OK_AND_ASSIGN(Proc * top, pb.Build({}));
70747064
XLS_ASSERT_OK(p->SetTop(top));
70757065

7076-
XLS_ASSERT_OK_AND_ASSIGN(ProcElaboration elab,
7077-
ProcElaboration::Elaborate(top));
7078-
70797066
XLS_ASSERT_OK(ConvertToBlock(
70807067
p.get(),
70817068
CodegenOptions().reset("rst", false, false, false).clock_name("clk"),

xls/codegen_v_1_5/global_channel_block_stitching_pass.cc

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,14 @@ absl::Status InstantiateBlocksInContainer(
6363
if (block.get() == container) {
6464
continue;
6565
}
66+
// Skip anything that has a function source; this doesn't need to talk over
67+
// channels, so it doesn't need an instantiation.
68+
if (block->IsScheduled() &&
69+
down_cast<ScheduledBlock*>(block.get())->source() != nullptr &&
70+
down_cast<ScheduledBlock*>(block.get())->source()->IsFunction()) {
71+
continue;
72+
}
73+
6674
blocks_to_instantiate.push_back(block.get());
6775
}
6876
absl::c_sort(blocks_to_instantiate, &FunctionBase::NameLessThan);

xls/scheduling/scheduling_options.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -280,8 +280,8 @@ class SchedulingOptions {
280280
int64_t opt_level() const { return opt_level_; }
281281

282282
// Sets/gets the target delay model
283-
SchedulingOptions& delay_model(std::string& value) {
284-
delay_model_ = value;
283+
SchedulingOptions& delay_model(std::string_view value) {
284+
delay_model_ = std::string(value);
285285
return *this;
286286
}
287287
std::optional<std::string> delay_model() const { return delay_model_; }

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