Aliasing

[Duttenheim]

https://x.com/notimothylottes/status/1950950397155201173?s=46&t=q8NjNhI3q2Ao2JCNf_hw_Q

Consider adding a union type which allows for aliasing of memory.

• Investigate how other IRs (Metal/DXIL) handles it
• Add a feature switch so languages like WGSL can throw errors.
• Add a union type which aliases the same memory as different types in the IR. For SPIRV that's using Aliased on an OpVariable of the largest size and creating new OpVariables initialized on the original one.

[Duttenheim]

One way to manage this with SPIRV is to emit a struct with a vector of u32 that holds the largest type, where a 4d vector is the largest. Then when a value is read, a simple OpBitcast is performed on the original data to the target type.