diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 5114c7dbd..578d9e0a5 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -240,7 +240,7 @@ jobs:
           - "examples/NimBLE_Client"
           - "examples/NimBLE_Server"
         variant:
-          # - Generic_nRF51822:chip=xxaa
+          - Generic_nRF51822:chip=xxaa
           - Generic_nRF52832
           - Generic_nRF52833
           - Generic_nRF52840
@@ -312,8 +312,8 @@ jobs:
             platform = https://github.com/h2zero/platform-n-able.git
             framework = arduino
 
-            ; [env:generic_nrf51822_xxaa
-            ; board = generic_nrf51822_xxaa
+            [env:generic_nrf51822_xxaa]
+            board = generic_nrf51822_xxaa
 
             [env:generic_nrf52832]
             board = generic_nrf52832
@@ -357,7 +357,7 @@ jobs:
 
             [env:generic_nrf52840]
             board = generic_nrf52840
-            build_flags = '-DMYNEWT_VAL_BLE_EXT_ADV=1'
+            build_flags = -D MYNEWT_VAL_BLE_EXT_ADV=1
           EOF
           cp ${{ matrix.example }}/* example/src/
           platformio run -d example
diff --git a/src/nimble/nimble/drivers/nrf51/src/ble_phy.c b/src/nimble/nimble/drivers/nrf51/src/ble_phy.c
index 305f90879..ebb0527f8 100644
--- a/src/nimble/nimble/drivers/nrf51/src/ble_phy.c
+++ b/src/nimble/nimble/drivers/nrf51/src/ble_phy.c
@@ -49,6 +49,10 @@
 #error LE Coded PHY cannot be enabled on nRF51
 #endif
 
+#ifndef min
+#define min(a, b) ((a)<(b)?(a):(b))
+#endif
+
 static uint32_t
 ble_phy_mode_pdu_start_off(int phy_mode)
 {
diff --git a/src/nimble/nimble/drivers/nrf5x/src/ble_phy.c b/src/nimble/nimble/drivers/nrf5x/src/ble_phy.c
index 67b4891d6..d3d690bdb 100644
--- a/src/nimble/nimble/drivers/nrf5x/src/ble_phy.c
+++ b/src/nimble/nimble/drivers/nrf5x/src/ble_phy.c
@@ -74,6 +74,10 @@ extern void tm_tick(void);
 
 #include <nimble/nimble/controller/include/controller/ble_ll_pdu.h>
 
+#ifndef min
+#define min(a, b) ((a)<(b)?(a):(b))
+#endif
+
 /*
  * NOTE: This code uses a couple of PPI channels so care should be taken when
  *       using PPI somewhere else.
diff --git a/src/nimble/porting/npl/freertos/src/nimble_port_freertos.c b/src/nimble/porting/npl/freertos/src/nimble_port_freertos.c
index dd6015e90..c6d906a3c 100644
--- a/src/nimble/porting/npl/freertos/src/nimble_port_freertos.c
+++ b/src/nimble/porting/npl/freertos/src/nimble_port_freertos.c
@@ -98,14 +98,11 @@ nimble_port_freertos_deinit(void)
 #else // ESP_PLATFORM
 
 #if NIMBLE_CFG_CONTROLLER
-# ifdef MYNEWT_VAL_NIMBLE_CONTROLLER_TASK_STACK_SIZE
-#  define NIMBLE_LL_STACK_SIZE   (MYNEWT_VAL(NIMBLE_CONTROLLER_TASK_STACK_SIZE) / 4)
+
+# if MYNEWT_VAL(BLE_LL_CFG_FEAT_LL_EXT_ADV)
+#  define NIMBLE_LL_STACK_SIZE   (MYNEWT_VAL(NIMBLE_CONTROLLER_TASK_STACK_SIZE) / 4) + 30
 # else
-#  if MYNEWT_VAL(BLE_LL_CFG_FEAT_LL_EXT_ADV)
-#   define NIMBLE_LL_STACK_SIZE   (130)
-#  else
-#   define NIMBLE_LL_STACK_SIZE   (100)
-#  endif
+#  define NIMBLE_LL_STACK_SIZE   (MYNEWT_VAL(NIMBLE_CONTROLLER_TASK_STACK_SIZE) / 4)
 # endif
 
 // configMAX_PRIORITIES - 1 is Tmr builtin task
diff --git a/src/nimconfig.h b/src/nimconfig.h
index d02e4dbbd..eb46c5e35 100644
--- a/src/nimconfig.h
+++ b/src/nimconfig.h
@@ -1,12 +1,6 @@
 #ifndef NIMCONFIG_H
 #define NIMCONFIG_H
 
-#ifdef ESP_PLATFORM
-#include "sdkconfig.h"
-#else
-#include "ext_nimble_config.h"
-#endif
-
 /***********************************************
  *            Arduino User Options             *
  **********************************************/
@@ -24,12 +18,12 @@
  *  Values: 0 = DEBUG, 1 = INFO, 2 = WARNING, 3 = ERROR, 4 = CRITICAL, 5+ = NONE\n
  *  Uses approx. 32kB of flash memory.
  */
- // #define MYNEWT_VAL_BLE_HS_LOG_LVL 5
+// #define MYNEWT_VAL_BLE_HS_LOG_LVL 5
 
 /** @brief Un-comment to change the default GAP appearance */
 // #define  MYNEWT_VAL_BLE_SVC_GAP_APPEARANCE 0x0
 
- /** @brief Un-comment if not using NimBLE Client functions \n
+/** @brief Un-comment if not using NimBLE Client functions \n
  *  Reduces flash size by approx. 7kB.
  */
 // #define MYNEWT_VAL_BLE_ROLE_CENTRAL 0
@@ -108,11 +102,11 @@
  */
 // #define MYNEWT_VAL_NIMBLE_CPP_ATT_VALUE_INIT_LENGTH 20
 
- /** @brief Un-comment to set the debug log messages level from the NimBLE CPP Wrapper.\n
+/** @brief Un-comment to set the debug log messages level from the NimBLE CPP Wrapper.\n
  *  Values: 0 = NONE, 1 = ERROR, 2 = WARNING, 3 = INFO, 4+ = DEBUG\n
  *  Uses approx. 32kB of flash memory.
  */
- // #define MYNEWT_VAL_NIMBLE_CPP_LOG_LEVEL 0
+// #define MYNEWT_VAL_NIMBLE_CPP_LOG_LEVEL 0
 
 /** @brief Un-comment to enable the debug asserts in NimBLE CPP wrapper.*/
 // #define MYNEWT_VAL_NIMBLE_CPP_DEBUG_ASSERT_ENABLED 1
@@ -153,53 +147,81 @@
 /* This section should not be altered */
 
 #ifdef ESP_PLATFORM
-#include "sdkconfig.h"
-
-#ifndef CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE
-#define CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE (0)
-#endif
-
-#ifndef CONFIG_BTDM_SCAN_DUPL_TYPE_DATA
-#define CONFIG_BTDM_SCAN_DUPL_TYPE_DATA (1)
-#endif
-
-#ifndef CONFIG_BTDM_SCAN_DUPL_TYPE_DATA_DEVICE
-#define CONFIG_BTDM_SCAN_DUPL_TYPE_DATA_DEVICE (2)
-#endif
-
-#if !defined(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE) && (defined(CONFIG_IDF_TARGET_ESP32) || \
-defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3))
-#define CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE (1)
-#endif
-
-#if !defined(CONFIG_BT_CONTROLLER_DISABLED)
-#define CONFIG_BT_CONTROLLER_DISABLED (0)
-#endif
-
-#ifndef CONFIG_BT_NIMBLE_USE_ESP_TIMER
-#define CONFIG_BT_NIMBLE_USE_ESP_TIMER (1)
-#endif
+# include "sdkconfig.h"
+
+# ifndef CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE
+#  define CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE (0)
+# endif
+
+# ifndef CONFIG_BTDM_SCAN_DUPL_TYPE_DATA
+#  define CONFIG_BTDM_SCAN_DUPL_TYPE_DATA (1)
+# endif
+
+# ifndef CONFIG_BTDM_SCAN_DUPL_TYPE_DATA_DEVICE
+#  define CONFIG_BTDM_SCAN_DUPL_TYPE_DATA_DEVICE (2)
+# endif
+
+# if !defined(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE) && \
+     (defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3))
+#  define CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE (1)
+# endif
+
+# if !defined(CONFIG_BT_CONTROLLER_DISABLED)
+#  define CONFIG_BT_CONTROLLER_DISABLED (0)
+# endif
+
+# if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
+#  define NIMBLE_CFG_CONTROLLER 0
+# else
+#  define NIMBLE_CFG_CONTROLLER CONFIG_BT_CONTROLLER_ENABLED
+# endif
+
+# ifndef CONFIG_BT_NIMBLE_USE_ESP_TIMER
+#  define CONFIG_BT_NIMBLE_USE_ESP_TIMER (1)
+# endif
+
+#define MYNEWT_VAL_BLE_USE_ESP_TIMER (CONFIG_BT_NIMBLE_USE_ESP_TIMER)
+
+#else // !ESP_PLATFORM
+# if defined(NRF51)
+#  include "syscfg/devcfg/nrf51cfg.h"
+# elif defined(NRF52810_XXAA)
+#  include "syscfg/devcfg/nrf52810cfg.h"
+# elif defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
+#  include "syscfg/devcfg/nrf52832cfg.h"
+# elif defined(NRF52833_XXAA)
+#  include "syscfg/devcfg/nrf52833cfg.h"
+# elif defined(NRF52840_XXAA)
+#  include "syscfg/devcfg/nrf52840cfg.h"
+# else
+#  error No supported mcu config specified
+# endif
+
+# ifdef USE_LFRC
+#  define MYNEWT_VAL_BLE_LL_SCA (500)
+# endif
+
+/* Required definitions for NimBLE */
+# define NIMBLE_CFG_CONTROLLER               (1)
+# define MYNEWT_VAL_BLE_CONTROLLER           (1)
+# define CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE (1)
 #endif // ESP_PLATFORM
 
 /* Enables the use of Arduino String class for attribute values */
 #if defined __has_include
-#  if __has_include (<Arduino.h>)
-#    define NIMBLE_CPP_ARDUINO_STRING_AVAILABLE (1)
-#  endif
+# if __has_include(<Arduino.h>)
+#  define NIMBLE_CPP_ARDUINO_STRING_AVAILABLE (1)
+# endif
 #endif
 
+/* Required macros for all supported devices */
+
 #ifndef CONFIG_BT_NIMBLE_ENABLED
-#define CONFIG_BT_NIMBLE_ENABLED (1)
+# define CONFIG_BT_NIMBLE_ENABLED (1)
 #endif
 
 #ifndef CONFIG_BT_CONTROLLER_ENABLED
-#define CONFIG_BT_CONTROLLER_ENABLED (1)
-#endif
-
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
-#define NIMBLE_CFG_CONTROLLER    0
-#else
-#define NIMBLE_CFG_CONTROLLER    CONFIG_BT_CONTROLLER_ENABLED
+# define CONFIG_BT_CONTROLLER_ENABLED (1)
 #endif
 
 #endif // NIMCONFIG_H
diff --git a/src/syscfg/devcfg/nrf51cfg.h b/src/syscfg/devcfg/nrf51cfg.h
new file mode 100644
index 000000000..e7d9b99b4
--- /dev/null
+++ b/src/syscfg/devcfg/nrf51cfg.h
@@ -0,0 +1,102 @@
+#ifndef _NRF51CFG_H
+#define _NRF51CFG_H
+
+#ifndef NRF51
+# error NRF51 not defined
+#else
+
+# ifndef DEVICE_RAM_SIZE
+#  error undefined ram size
+# endif
+
+# ifndef MYNEWT_VAL_BLE_MAX_CONNECTIONS
+#  define MYNEWT_VAL_BLE_MAX_CONNECTIONS 1
+# endif
+
+# ifndef MYNEWT_VAL_BLE_STORE_MAX_BONDS
+#  define MYNEWT_VAL_BLE_STORE_MAX_BONDS 1
+# endif
+
+# if MYNEWT_VAL_BLE_STORE_MAX_BONDS
+#  ifndef MYNEWT_VAL_BLE_STORE_MAX_CCCDS
+#   define MYNEWT_VAL_BLE_STORE_MAX_CCCDS 3
+#  endif
+#  ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY
+#   define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY (1)
+#  endif
+# else
+#  define MYNEWT_VAL_BLE_STORE_MAX_CCCDS 0
+#  ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY
+#   define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY (0)
+#  endif
+# endif
+
+# if (DEVICE_RAM_SIZE) > 16
+#  ifndef MYNEWT_VAL_MSYS_1_BLOCK_COUNT
+#   define MYNEWT_VAL_MSYS_1_BLOCK_COUNT (12)
+#  endif
+#  ifndef MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE
+#   define MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE (2048)
+#  endif
+# else
+#  ifndef MYNEWT_VAL_MSYS_1_BLOCK_COUNT
+#   if MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY
+#    define MYNEWT_VAL_MSYS_1_BLOCK_COUNT (7)
+#   else
+#    define MYNEWT_VAL_MSYS_1_BLOCK_COUNT (5)
+#   endif
+#  endif
+#  ifndef MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE
+#   define MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE (1152)
+#  endif
+# endif
+
+# ifndef MYNEWT_VAL_NIMBLE_CONTROLLER_TASK_STACK_SIZE
+#  define MYNEWT_VAL_NIMBLE_CONTROLLER_TASK_STACK_SIZE (400)
+# endif
+
+# ifndef MYNEWT_VAL_MSYS_1_BLOCK_SIZE
+#  define MYNEWT_VAL_MSYS_1_BLOCK_SIZE (88)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_ATT_PREFERRED_MTU
+#  define MYNEWT_VAL_BLE_ATT_PREFERRED_MTU (23)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_SM_SC
+#  define MYNEWT_VAL_BLE_SM_SC (0)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS
+#  define MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS (8)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS
+#  define MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS (8)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_LL_WHITELIST_SIZE
+#  define MYNEWT_VAL_BLE_LL_WHITELIST_SIZE (1)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_ATT_SVR_MAX_PREP_ENTRIES
+#  define MYNEWT_VAL_BLE_ATT_SVR_MAX_PREP_ENTRIES (5)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_GATT_READ_MAX_ATTRS
+#  define MYNEWT_VAL_BLE_GATT_READ_MAX_ATTRS (4)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_TRANSPORT_EVT_COUNT
+#  define MYNEWT_VAL_BLE_TRANSPORT_EVT_COUNT (2)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_TRANSPORT_ACL_COUNT
+#  define MYNEWT_VAL_BLE_TRANSPORT_ACL_COUNT (4)
+# endif
+
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_2M_PHY (0)
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY (0)
+
+#endif /* NRF51 */
+#endif /* _NRF51CFG_H */
diff --git a/src/syscfg/devcfg/nrf52810cfg.h b/src/syscfg/devcfg/nrf52810cfg.h
new file mode 100644
index 000000000..32e61f8b2
--- /dev/null
+++ b/src/syscfg/devcfg/nrf52810cfg.h
@@ -0,0 +1,61 @@
+#ifndef _NRF52810CFG_H
+#define _NRF52810CFG_H
+
+#if !defined(NRF52810_XXAA)
+# error NRF52810_XXAA not defined
+#else
+
+# ifndef MYNEWT_VAL_MCU_TARGET__nRF52810
+#  define MYNEWT_VAL_MCU_TARGET__nRF52810 (1)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_MAX_CONNECTIONS
+#  define MYNEWT_VAL_BLE_MAX_CONNECTIONS 1
+# endif
+
+# ifndef MYNEWT_VAL_MSYS_1_BLOCK_COUNT
+#  define MYNEWT_VAL_MSYS_1_BLOCK_COUNT (8)
+# endif
+
+# ifndef MYNEWT_VAL_MSYS_1_BLOCK_SIZE
+#  define MYNEWT_VAL_MSYS_1_BLOCK_SIZE (88)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_STORE_MAX_BONDS
+#  define MYNEWT_VAL_BLE_STORE_MAX_BONDS 1
+# endif
+
+# if MYNEWT_VAL_BLE_STORE_MAX_BONDS
+#  ifndef MYNEWT_VAL_BLE_STORE_MAX_CCCDS
+#   define MYNEWT_VAL_BLE_STORE_MAX_CCCDS 3
+#  endif
+#  ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY
+#   define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY (1)
+#  endif
+# else
+#  define MYNEWT_VAL_BLE_STORE_MAX_CCCDS 0
+#  ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY
+#   define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY (0)
+#  endif
+# endif
+
+# ifndef MYNEWT_VAL_BLE_ATT_PREFERRED_MTU
+#  define MYNEWT_VAL_BLE_ATT_PREFERRED_MTU (256)
+# endif
+
+# ifndef MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE
+#  define MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE (1408)
+# endif
+
+# ifndef MYNEWT_VAL_NIMBLE_CONTROLLER_TASK_STACK_SIZE
+#  define MYNEWT_VAL_NIMBLE_CONTROLLER_TASK_STACK_SIZE (400)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_SM_SC
+#  define MYNEWT_VAL_BLE_SM_SC (0)
+# endif
+
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY (0)
+
+#endif // NRF52810_XXAA
+#endif // _NRF52810CFG_H
diff --git a/src/syscfg/devcfg/nrf52832cfg.h b/src/syscfg/devcfg/nrf52832cfg.h
new file mode 100644
index 000000000..e633f7030
--- /dev/null
+++ b/src/syscfg/devcfg/nrf52832cfg.h
@@ -0,0 +1,23 @@
+#ifndef _NRF52832CFG_H
+#define _NRF52832CFG_H
+
+#if !defined(NRF52832_XXAA) && !defined(NRF52832_XXAB)
+# error NRF52832_XXAA/B not defined
+#else
+
+# ifndef MYNEWT_VAL_MCU_TARGET__nRF52832
+#  define MYNEWT_VAL_MCU_TARGET__nRF52832 (1)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_ATT_PREFERRED_MTU
+#  define MYNEWT_VAL_BLE_ATT_PREFERRED_MTU (256)
+# endif
+
+# ifndef MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE
+#  define MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE (2048)
+# endif
+
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY (0)
+
+#endif // NRF52832_XXAA/B
+#endif // _NRF52832CFG_H
diff --git a/src/syscfg/devcfg/nrf52833cfg.h b/src/syscfg/devcfg/nrf52833cfg.h
new file mode 100644
index 000000000..6d72485f8
--- /dev/null
+++ b/src/syscfg/devcfg/nrf52833cfg.h
@@ -0,0 +1,21 @@
+#ifndef _NRF52833CFG_H
+#define _NRF52833CFG_H
+
+#ifndef NRF52833_XXAA
+# error NRF52833_XXAA not defined
+#else
+
+# ifndef MYNEWT_VAL_MCU_TARGET__nRF52833
+#  define MYNEWT_VAL_MCU_TARGET__nRF52833 (1)
+# endif
+
+# ifndef MYNEWT_VAL_BLE_ATT_PREFERRED_MTU
+#  define MYNEWT_VAL_BLE_ATT_PREFERRED_MTU (256)
+# endif
+
+# ifndef MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE
+#  define MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE (2048)
+# endif
+
+#endif // NRF52833_XXAA
+#endif // _NRF52833CFG_H
diff --git a/src/syscfg/devcfg/nrf52840cfg.h b/src/syscfg/devcfg/nrf52840cfg.h
new file mode 100644
index 000000000..73029b460
--- /dev/null
+++ b/src/syscfg/devcfg/nrf52840cfg.h
@@ -0,0 +1,17 @@
+#ifndef _NRF52840CFG_H
+#define _NRF52840CFG_H
+
+#ifndef NRF52840_XXAA
+# error NRF52840_XXAA not defined
+#else
+
+# ifndef MYNEWT_VAL_MCU_TARGET__nRF52840
+#  define MYNEWT_VAL_MCU_TARGET__nRF52840 (1)
+# endif
+
+# ifndef MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE
+#  define MYNEWT_VAL_NIMBLE_HOST_TASK_STACK_SIZE (2048)
+# endif
+
+#endif // NRF52840_XXAA
+#endif // _NRF52840CFG_H
diff --git a/src/syscfg/syscfg.h b/src/syscfg/syscfg.h
index f8d607952..93b377744 100644
--- a/src/syscfg/syscfg.h
+++ b/src/syscfg/syscfg.h
@@ -142,11 +142,15 @@
 #endif
 
 #ifndef MYNEWT_VAL_OS_CPUTIME_FREQ
-#define MYNEWT_VAL_OS_CPUTIME_FREQ (1000000)
+#define MYNEWT_VAL_OS_CPUTIME_FREQ (32768)
+#endif
+
+#ifndef MYNEWT_VAL_TIMER_5
+#define MYNEWT_VAL_TIMER_5 (1)
 #endif
 
 #ifndef MYNEWT_VAL_OS_CPUTIME_TIMER_NUM
-#define MYNEWT_VAL_OS_CPUTIME_TIMER_NUM (0)
+#define MYNEWT_VAL_OS_CPUTIME_TIMER_NUM (5)
 #endif
 
 /* Overridden by @apache-mynewt-core/hw/bsp/native (defined by @apache-mynewt-core/kernel/os) */
@@ -430,6 +434,18 @@
 #define MYNEWT_VAL_BLE_HCI_VS_OCF_OFFSET (0)
 #endif
 
+#ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_ADDRESS_END_PIN
+#define MYNEWT_VAL_BLE_PHY_DBG_TIME_ADDRESS_END_PIN (-1)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_TXRXEN_READY_PIN
+#define MYNEWT_VAL_BLE_PHY_DBG_TIME_TXRXEN_READY_PIN (-1)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_PHY_DBG_TIME_WFR_PIN
+#define MYNEWT_VAL_BLE_PHY_DBG_TIME_WFR_PIN (-1)
+#endif
+
 #ifndef MYNEWT_VAL_BLE_ISO
 #define MYNEWT_VAL_BLE_ISO (0)
 #endif
@@ -447,7 +463,7 @@
 #endif
 
 #ifndef MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES
-#define MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES (0)
+#define MYNEWT_VAL_BLE_MULTI_ADV_INSTANCES (1)
 #endif
 
 #ifndef MYNEWT_VAL_BLE_PERIODIC_ADV
@@ -488,7 +504,7 @@
 
 /*** @apache-mynewt-nimble/nimble/host */
 #ifndef MYNEWT_VAL_BLE_ATT_PREFERRED_MTU
-#define MYNEWT_VAL_BLE_ATT_PREFERRED_MTU (256)
+#define MYNEWT_VAL_BLE_ATT_PREFERRED_MTU (517)
 #endif
 
 #ifndef MYNEWT_VAL_BLE_ATT_SVR_FIND_INFO
@@ -680,7 +696,7 @@
 #endif
 
 #ifndef MYNEWT_VAL_BLE_HS_DEBUG
-#define MYNEWT_VAL_BLE_HS_DEBUG (1)
+#define MYNEWT_VAL_BLE_HS_DEBUG (0)
 #endif
 
 #ifndef MYNEWT_VAL_BLE_HS_FLOW_CTRL
@@ -772,7 +788,7 @@
 #endif
 
 #ifndef MYNEWT_VAL_BLE_SM_BONDING
-#define MYNEWT_VAL_BLE_SM_BONDING (0)
+#define MYNEWT_VAL_BLE_SM_BONDING (1)
 #endif
 
 #ifndef MYNEWT_VAL_BLE_SM_IO_CAP
@@ -823,10 +839,6 @@
 #define MYNEWT_VAL_BLE_SM_THEIR_KEY_DIST (0)
 #endif
 
-#ifndef MYNEWT_VAL_BLE_STORE_CONFIG_PERSIST
-#define MYNEWT_VAL_BLE_STORE_CONFIG_PERSIST (1)
-#endif
-
 #ifndef MYNEWT_VAL_BLE_STORE_MAX_BONDS
 #define MYNEWT_VAL_BLE_STORE_MAX_BONDS (3)
 #endif
@@ -839,6 +851,14 @@
 #define MYNEWT_VAL_BLE_STORE_MAX_EADS (0)
 #endif
 
+#ifndef MYNEWT_VAL_BLE_STORE_CONFIG_PERSIST
+#if MYNEWT_VAL_BLE_STORE_MAX_BONDS
+#define MYNEWT_VAL_BLE_STORE_CONFIG_PERSIST (1)
+#else
+#define MYNEWT_VAL_BLE_STORE_CONFIG_PERSIST (0)
+#endif
+#endif
+
 /*** @apache-mynewt-nimble/nimble/host/services/ans */
 #ifndef MYNEWT_VAL_BLE_SVC_ANS_NEW_ALERT_CAT
 #define MYNEWT_VAL_BLE_SVC_ANS_NEW_ALERT_CAT (0)
@@ -1159,6 +1179,10 @@
 #define MYNEWT_VAL_BLE_MESH_TX_SEG_MSG_COUNT (4)
 #endif
 
+#ifndef MYNEWT_VAL_BLE_MESH_SEG_RETRANSMIT_ATTEMPTS
+#define MYNEWT_VAL_BLE_MESH_SEG_RETRANSMIT_ATTEMPTS (4)
+#endif
+
 #ifndef MYNEWT_VAL_BLE_SVC_BAS_SYSINIT_STAGE
 #define MYNEWT_VAL_BLE_SVC_BAS_SYSINIT_STAGE (303)
 #endif
@@ -1313,21 +1337,6 @@
 #define MYNEWT_VAL_BLE_SVC_TPS_SYSINIT_STAGE (303)
 #endif
 
-/*** @apache-mynewt-nimble/nimble/transport */
-// #undef MYNEWT_VAL_BLE_ACL_BUF_COUNT
-
-// #undef MYNEWT_VAL_BLE_ACL_BUF_SIZE
-
-// #undef MYNEWT_VAL_BLE_HCI_BRIDGE
-
-// #undef MYNEWT_VAL_BLE_HCI_EVT_BUF_SIZE
-
-// #undef MYNEWT_VAL_BLE_HCI_EVT_HI_BUF_COUNT
-
-// #undef MYNEWT_VAL_BLE_HCI_EVT_LO_BUF_COUNT
-
-// #undef MYNEWT_VAL_BLE_HCI_TRANSPORT
-
 #ifndef MYNEWT_VAL_BLE_MONITOR_CONSOLE_BUFFER_SIZE
 #define MYNEWT_VAL_BLE_MONITOR_CONSOLE_BUFFER_SIZE (128)
 #endif
@@ -1452,7 +1461,11 @@
 #endif
 
 #ifndef MYNEWT_VAL_BLE_TRANSPORT_LL__native
+#ifdef ESP_PLATFORM
 #define MYNEWT_VAL_BLE_TRANSPORT_LL__native (0)
+#else
+#define MYNEWT_VAL_BLE_TRANSPORT_LL__native (1)
+#endif
 #endif
 
 #ifndef MYNEWT_VAL_BLE_TRANSPORT_LL__nrf5340
@@ -1460,7 +1473,11 @@
 #endif
 
 #ifndef MYNEWT_VAL_BLE_TRANSPORT_LL__socket
+#ifdef ESP_PLATFORM
 #define MYNEWT_VAL_BLE_TRANSPORT_LL__socket (1)
+#else
+#define MYNEWT_VAL_BLE_TRANSPORT_LL__socket (0)
+#endif
 #endif
 
 #ifndef MYNEWT_VAL_BLE_TRANSPORT_LL
@@ -1547,6 +1564,10 @@
 #define MYNEWT_VAL_BLE_LL_WHITELIST_SIZE (12)
 #endif
 
+#ifndef MYNEWT_VAL_BLE_LL_PUBLIC_DEV_ADDR
+#define MYNEWT_VAL_BLE_LL_PUBLIC_DEV_ADDR (0x000000000000)
+#endif
+
 #ifndef MYNEWT_VAL_BLE_LL_ROLE_BROADCASTER
 #define MYNEWT_VAL_BLE_LL_ROLE_BROADCASTER MYNEWT_VAL_BLE_ROLE_BROADCASTER
 #endif
@@ -1563,10 +1584,146 @@
 #define MYNEWT_VAL_BLE_LL_ROLE_PERIPHERAL MYNEWT_VAL_BLE_ROLE_PERIPHERAL
 #endif
 
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_CONN_PARAM_REQ
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_CONN_PARAM_REQ (1)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_SCA
+#define MYNEWT_VAL_BLE_LL_SCA (60)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_PERIPH_INIT_FEAT_XCHG
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_PERIPH_INIT_FEAT_XCHG (1)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_MIN_WIN_OFFSET
+#define MYNEWT_VAL_BLE_LL_CONN_INIT_MIN_WIN_OFFSET (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_SLOTS
+#define MYNEWT_VAL_BLE_LL_CONN_INIT_SLOTS (4)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_DTM
+#define MYNEWT_VAL_BLE_LL_DTM (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_NUM_COMP_PKT_ITVL_MS
+#define MYNEWT_VAL_BLE_LL_NUM_COMP_PKT_ITVL_MS (2000)
+#endif
+
 #ifndef MYNEWT_VAL_BLE_LL_TX_PWR_MAX_DBM
 #define MYNEWT_VAL_BLE_LL_TX_PWR_MAX_DBM (20)
 #endif
 
+#ifndef MYNEWT_VAL_BLE_HW_WHITELIST_ENABLE
+#define MYNEWT_VAL_BLE_HW_WHITELIST_ENABLE (1)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CONN_STRICT_SCHED
+#define MYNEWT_VAL_BLE_LL_CONN_STRICT_SCHED (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_DATA_LEN_EXT
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_DATA_LEN_EXT (MYNEWT_VAL_BLE_ROLE_PERIPHERAL || MYNEWT_VAL_BLE_ROLE_CENTRAL)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_ENCRYPTION (MYNEWT_VAL_BLE_ROLE_PERIPHERAL || MYNEWT_VAL_BLE_ROLE_CENTRAL)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CSA2
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CSA2 (1)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_PING (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV (MYNEWT_VAL_BLE_EXT_ADV)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CONN_INIT_MAX_TX_BYTES
+#define MYNEWT_VAL_BLE_LL_CONN_INIT_MAX_TX_BYTES (27)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE
+#define MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE (251)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_SUPP_MAX_RX_BYTES
+#define MYNEWT_VAL_BLE_LL_SUPP_MAX_RX_BYTES (MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_SUPP_MAX_TX_BYTES
+#define MYNEWT_VAL_BLE_LL_SUPP_MAX_TX_BYTES (MYNEWT_VAL_BLE_LL_MAX_PKT_SIZE)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS
+#define MYNEWT_VAL_BLE_LL_NUM_SCAN_DUP_ADVS (32)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS
+#define MYNEWT_VAL_BLE_LL_NUM_SCAN_RSP_ADVS (32)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_MANUFACTURER_ID
+#define MYNEWT_VAL_BLE_LL_MANUFACTURER_ID (0x0b65)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE
+#if MYNEWT_VAL(BLE_STORE_MAX_BONDS)
+#define MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE (4)
+#else
+#define MYNEWT_VAL_BLE_LL_RESOLV_LIST_SIZE (0)
+#endif
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_RNG_BUFSIZE
+#define MYNEWT_VAL_BLE_LL_RNG_BUFSIZE (32)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_TX_PWR_DBM
+#define MYNEWT_VAL_BLE_LL_TX_PWR_DBM (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_SYSVIEW
+#define MYNEWT_VAL_BLE_LL_SYSVIEW (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_HCI_VS_EVENT_ON_ASSERT
+#define MYNEWT_VAL_BLE_LL_HCI_VS_EVENT_ON_ASSERT (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_SCHED_AUX_MAFS_DELAY
+#define MYNEWT_VAL_BLE_LL_SCHED_AUX_MAFS_DELAY (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_SCHED_AUX_CHAIN_MAFS_DELAY
+#define MYNEWT_VAL_BLE_LL_SCHED_AUX_CHAIN_MAFS_DELAY (0)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_SCHED_SCAN_AUX_PDU_LEN
+#define MYNEWT_VAL_BLE_LL_SCHED_SCAN_AUX_PDU_LEN (41)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_SCHED_SCAN_SYNC_PDU_LEN
+#define MYNEWT_VAL_BLE_LL_SCHED_SCAN_SYNC_PDU_LEN (32)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_RFMGMT_ENABLE_TIME
+#define MYNEWT_VAL_BLE_LL_RFMGMT_ENABLE_TIME (1500)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_2M_PHY
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_2M_PHY (1)
+#endif
+
+#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY
+#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LE_CODED_PHY (1)
+#endif
+
 #ifndef MYNEWT_VAL_BLE_MESH_NET_BUF_USER_DATA_SIZE
 #define MYNEWT_VAL_BLE_MESH_NET_BUF_USER_DATA_SIZE (4)
 #endif
@@ -1699,6 +1856,10 @@
 #define MYNEWT_VAL_BLE_FEM_PA_GAIN (0)
 #endif
 
+#ifndef MYNEWT_VAL_BLE_PUBLIC_DEV_ADDR
+#define MYNEWT_VAL_BLE_PUBLIC_DEV_ADDR ((uint8_t[6]){0x00, 0x00, 0x00, 0x00, 0x00, 0x00})
+#endif
+
 /*espressif added configs*/
 
 #ifndef MYNEWT_VAL_NIMBLE_PINNED_TO_CORE
@@ -1721,10 +1882,6 @@
 #define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_PRIVACY (1)
 #endif
 
-#ifndef MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV
-#define MYNEWT_VAL_BLE_LL_CFG_FEAT_LL_EXT_ADV (MYNEWT_VAL_BLE_EXT_ADV)
-#endif
-
 #ifndef MYNEWT_VAL_BLE_MESH_PROVISIONER
 #define MYNEWT_VAL_BLE_MESH_PROVISIONER (0)
 #endif
@@ -1738,7 +1895,7 @@
 #endif
 
 #ifndef MYNEWT_VAL_BLE_USE_ESP_TIMER
-#define MYNEWT_VAL_BLE_USE_ESP_TIMER (1)
+#define MYNEWT_VAL_BLE_USE_ESP_TIMER (0)
 #endif
 
 #ifndef MYNEWT_VAL_OPTIMIZE_MULTI_CONN
@@ -1815,11 +1972,11 @@
 #endif
 #endif
 
-#define BLE_50_FEATURE_SUPPORT (1)
+#define BLE_50_FEATURE_SUPPORT (MYNEWT_VAL_BLE_LL_CFG_FEAT_DATA_LEN_EXT)
 
 /* NimBLE-Arduino added configurations */
 #ifndef MYNEWT_VAL_NIMBLE_CONTROLLER_TASK_STACK_SIZE
-#define MYNEWT_VAL_NIMBLE_CONTROLLER_TASK_STACK_SIZE (4096)
+#define MYNEWT_VAL_NIMBLE_CONTROLLER_TASK_STACK_SIZE (512)
 #endif
 
 #ifndef MYNEWT_VAL_NIMBLE_CPP_FREERTOS_TASK_BLOCK_BIT