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lines changed Original file line number Diff line number Diff line change @@ -145,6 +145,22 @@ static inline void dwc2_phy_init(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
145145 if (hs_phy_type == HS_PHY_TYPE_NONE ) {
146146 // Enable on-chip FS PHY
147147 dwc2 -> stm32_gccfg |= STM32_GCCFG_PWRDWN ;
148+
149+ // https://community.st.com/t5/stm32cubemx-mcus/why-stm32h743-usb-fs-doesn-t-work-if-freertos-tickless-idle/m-p/349480#M18867
150+ // H7 running on full-speed phy need to disable ULPI clock in sleep mode.
151+ // Otherwise, USB won't work when mcu executing WFI/WFE instruction i.e tick-less RTOS.
152+ // Note: there may be other family that is affected by this, but only H7 is tested so far
153+ #if defined(USB_OTG_FS_PERIPH_BASE ) && defined(RCC_AHB1LPENR_USB2OTGFSULPILPEN )
154+ if ( USB_OTG_FS_PERIPH_BASE == (uint32_t ) dwc2 ) {
155+ RCC -> AHB1LPENR &= ~RCC_AHB1LPENR_USB2OTGFSULPILPEN ;
156+ }
157+ #endif
158+
159+ #if defined(USB_OTG_HS_PERIPH_BASE ) && defined(RCC_AHB1LPENR_USB1OTGHSULPILPEN )
160+ if ( USB_OTG_HS_PERIPH_BASE == (uint32_t ) dwc2 ) {
161+ RCC -> AHB1LPENR &= ~RCC_AHB1LPENR_USB1OTGHSULPILPEN ;
162+ }
163+ #endif
148164 } else {
149165#if CFG_TUSB_MCU != OPT_MCU_STM32U5
150166 // Disable FS PHY, TODO on U5A5 (dwc2 4.11a) 16th bit is 'Host CDP behavior enable'
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