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hathachhathach
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add -DRTOS=zephyr to ci west build
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8 files changed

+513
-2
lines changed

8 files changed

+513
-2
lines changed

‎.github/workflows/build.yml‎

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@@ -156,5 +156,5 @@ jobs:
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- name: Build
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run: |
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west build -b pca10056 examples/device/cdc_msc
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west build -b pca10056 examples/device/msc_dual_lun
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west -v build -b pca10056 -d examples/device/cdc_msc/build examples/device/cdc_msc -- -DRTOS=zephyr
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west -v build -b pca10056 -d examples/device/msc_dual_lun/build examples/device/msc_dual_lun -- -DRTOS=zephyr

‎examples/device/msc_dual_lun/prj.conf‎

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CONFIG_GPIO=y
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CONFIG_FPU=y
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CONFIG_NO_OPTIMIZATIONS=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_NRFX_POWER=y
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CONFIG_NRFX_UARTE0=y

‎hw/bsp/family_support.cmake‎

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@@ -81,6 +81,7 @@ endif()
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if (RTOS STREQUAL zephyr)
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set(BOARD_ROOT ${TOP}/hw/bsp/${FAMILY})
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cmake_print_variables(BOARD_ROOT BOARD)
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find_package(Zephyr REQUIRED HINTS ${TOP}/zephyr)
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endif ()
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‎hw/bsp/nrf/boards/pca10056/zephyr/Kconfig.pca10056‎

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# Copyright (c) 2022 Zephyr Project members and individual contributors
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_PCA10056
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select SOC_NRF52840_QIAA

‎hw/bsp/nrf/boards/pca10056/zephyr/board.yml‎

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board:
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name: pca10056
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full_name: nRF52840 DK
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vendor: nordic
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socs:
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- name: nrf52840

‎hw/bsp/nrf/boards/pca10056/zephyr/pca10056_nrf52840-pinctrl.dtsi‎

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/*
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* Copyright (c) 2022 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 6)>,
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<NRF_PSEL(UART_RTS, 0, 5)>;
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};
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group2 {
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psels = <NRF_PSEL(UART_RX, 0, 8)>,
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<NRF_PSEL(UART_CTS, 0, 7)>;
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bias-pull-up;
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};
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};
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uart0_sleep: uart0_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 6)>,
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<NRF_PSEL(UART_RX, 0, 8)>,
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<NRF_PSEL(UART_RTS, 0, 5)>,
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<NRF_PSEL(UART_CTS, 0, 7)>;
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low-power-enable;
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};
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};
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uart1_default: uart1_default {
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group1 {
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psels = <NRF_PSEL(UART_RX, 1, 1)>;
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bias-pull-up;
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};
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group2 {
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psels = <NRF_PSEL(UART_TX, 1, 2)>;
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};
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};
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uart1_sleep: uart1_sleep {
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group1 {
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psels = <NRF_PSEL(UART_RX, 1, 1)>,
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<NRF_PSEL(UART_TX, 1, 2)>;
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low-power-enable;
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};
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};
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i2c0_default: i2c0_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
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<NRF_PSEL(TWIM_SCL, 0, 27)>;
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};
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};
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i2c0_sleep: i2c0_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
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<NRF_PSEL(TWIM_SCL, 0, 27)>;
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low-power-enable;
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};
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};
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i2c1_default: i2c1_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
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<NRF_PSEL(TWIM_SCL, 0, 31)>;
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};
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};
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i2c1_sleep: i2c1_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
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<NRF_PSEL(TWIM_SCL, 0, 31)>;
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low-power-enable;
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};
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};
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pwm0_default: pwm0_default {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
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nordic,invert;
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};
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};
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pwm0_sleep: pwm0_sleep {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 13)>;
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low-power-enable;
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};
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};
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spi0_default: spi0_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
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<NRF_PSEL(SPIM_MOSI, 0, 26)>,
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<NRF_PSEL(SPIM_MISO, 0, 29)>;
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};
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};
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spi0_sleep: spi0_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 27)>,
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<NRF_PSEL(SPIM_MOSI, 0, 26)>,
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<NRF_PSEL(SPIM_MISO, 0, 29)>;
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low-power-enable;
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};
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};
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spi1_default: spi1_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
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<NRF_PSEL(SPIM_MOSI, 0, 30)>,
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<NRF_PSEL(SPIM_MISO, 1, 8)>;
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};
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};
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spi1_sleep: spi1_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 31)>,
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<NRF_PSEL(SPIM_MOSI, 0, 30)>,
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<NRF_PSEL(SPIM_MISO, 1, 8)>;
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low-power-enable;
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};
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};
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spi2_default: spi2_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
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<NRF_PSEL(SPIM_MOSI, 0, 20)>,
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<NRF_PSEL(SPIM_MISO, 0, 21)>;
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};
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};
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spi2_sleep: spi2_sleep {
134+
group1 {
135+
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
136+
<NRF_PSEL(SPIM_MOSI, 0, 20)>,
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<NRF_PSEL(SPIM_MISO, 0, 21)>;
138+
low-power-enable;
139+
};
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};
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142+
qspi_default: qspi_default {
143+
group1 {
144+
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
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<NRF_PSEL(QSPI_IO0, 0, 20)>,
146+
<NRF_PSEL(QSPI_IO1, 0, 21)>,
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<NRF_PSEL(QSPI_IO2, 0, 22)>,
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<NRF_PSEL(QSPI_IO3, 0, 23)>,
149+
<NRF_PSEL(QSPI_CSN, 0, 17)>;
150+
nordic,drive-mode = <NRF_DRIVE_H0H1>;
151+
};
152+
};
153+
154+
qspi_sleep: qspi_sleep {
155+
group1 {
156+
psels = <NRF_PSEL(QSPI_SCK, 0, 19)>,
157+
<NRF_PSEL(QSPI_IO0, 0, 20)>,
158+
<NRF_PSEL(QSPI_IO1, 0, 21)>,
159+
<NRF_PSEL(QSPI_IO2, 0, 22)>,
160+
<NRF_PSEL(QSPI_IO3, 0, 23)>;
161+
low-power-enable;
162+
};
163+
group2 {
164+
psels = <NRF_PSEL(QSPI_CSN, 0, 17)>;
165+
low-power-enable;
166+
bias-pull-up;
167+
};
168+
};
169+
170+
spi3_default: spi3_default {
171+
group1 {
172+
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
173+
<NRF_PSEL(SPIM_MISO, 1, 14)>,
174+
<NRF_PSEL(SPIM_MOSI, 1, 13)>;
175+
};
176+
};
177+
178+
spi3_sleep: spi3_sleep {
179+
group1 {
180+
psels = <NRF_PSEL(SPIM_SCK, 1, 15)>,
181+
<NRF_PSEL(SPIM_MISO, 1, 14)>,
182+
<NRF_PSEL(SPIM_MOSI, 1, 13)>;
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low-power-enable;
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};
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};
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};

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