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TUD_EPBUF_TYPE_DEF ncm_device
1 parent 090964c commit 1533e69

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5 files changed

+40
-11
lines changed

5 files changed

+40
-11
lines changed

src/class/net/ncm_device.c

Lines changed: 15 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -89,15 +89,13 @@ typedef struct {
8989
uint8_t rhport; // storage of \a rhport because some callbacks are done without it
9090

9191
// recv handling
92-
CFG_TUSB_MEM_ALIGN recv_ntb_t recv_ntb[RECV_NTB_N]; // actual recv NTBs
9392
recv_ntb_t *recv_free_ntb[RECV_NTB_N]; // free list of recv NTBs
9493
recv_ntb_t *recv_ready_ntb[RECV_NTB_N]; // NTBs waiting for transmission to glue logic
9594
recv_ntb_t *recv_tinyusb_ntb; // buffer for the running transfer TinyUSB -> driver
9695
recv_ntb_t *recv_glue_ntb; // buffer for the running transfer driver -> glue logic
9796
uint16_t recv_glue_ntb_datagram_ndx; // index into \a recv_glue_ntb_datagram
9897

9998
// xmit handling
100-
CFG_TUSB_MEM_ALIGN xmit_ntb_t xmit_ntb[XMIT_NTB_N]; // actual xmit NTBs
10199
xmit_ntb_t *xmit_free_ntb[XMIT_NTB_N]; // free list of xmit NTBs
102100
xmit_ntb_t *xmit_ready_ntb[XMIT_NTB_N]; // NTBs waiting for transmission to TinyUSB
103101
xmit_ntb_t *xmit_tinyusb_ntb; // buffer for the running transfer driver -> TinyUSB
@@ -118,15 +116,26 @@ typedef struct {
118116
bool tud_network_recv_renew_process_again; // tud_network_recv_renew() should process again
119117
} ncm_interface_t;
120118

121-
CFG_TUD_MEM_SECTION CFG_TUD_MEM_ALIGN tu_static ncm_interface_t ncm_interface;
119+
typedef struct {
120+
struct {
121+
TUD_EPBUF_TYPE_DEF(ntb, recv_ntb_t);
122+
} recv[RECV_NTB_N];
123+
124+
struct {
125+
TUD_EPBUF_TYPE_DEF(ntb, xmit_ntb_t);
126+
} xmit[XMIT_NTB_N];
127+
} ncm_epbuf_t;
128+
129+
static ncm_interface_t ncm_interface;
130+
CFG_TUD_MEM_SECTION static ncm_epbuf_t ncm_epbuf;
122131

123132
/**
124133
* This is the NTB parameter structure
125134
*
126135
* \attention
127136
* We are lucky, that byte order is correct
128137
*/
129-
CFG_TUD_MEM_SECTION CFG_TUD_MEM_ALIGN tu_static const ntb_parameters_t ntb_parameters = {
138+
TU_ATTR_ALIGNED(4) static const ntb_parameters_t ntb_parameters = {
130139
.wLength = sizeof(ntb_parameters_t),
131140
.bmNtbFormatsSupported = 0x01,// 16-bit NTB supported
132141
.dwNtbInMaxSize = CFG_TUD_NCM_IN_NTB_MAX_SIZE,
@@ -743,10 +752,10 @@ void netd_init(void) {
743752
memset(&ncm_interface, 0, sizeof(ncm_interface));
744753

745754
for (int i = 0; i < XMIT_NTB_N; ++i) {
746-
ncm_interface.xmit_free_ntb[i] = ncm_interface.xmit_ntb + i;
755+
ncm_interface.xmit_free_ntb[i] = &ncm_epbuf.xmit[i].ntb;
747756
}
748757
for (int i = 0; i < RECV_NTB_N; ++i) {
749-
ncm_interface.recv_free_ntb[i] = ncm_interface.recv_ntb + i;
758+
ncm_interface.recv_free_ntb[i] = &ncm_epbuf.recv[i].ntb;
750759
}
751760
} // netd_init
752761

src/common/tusb_mcu.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -373,8 +373,8 @@
373373
#define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 1
374374
#endif
375375

376-
#define CFG_TUD_MEM_DCACHE_LINE_SIZE 64
377-
#define CFG_TUH_MEM_DCACHE_LINE_SIZE 64
376+
#define CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT 64
377+
#define CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT 64
378378

379379
#define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 // TODO currently have issue with buffer DMA with espressif
380380

src/common/tusb_types.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,16 +35,17 @@
3535
extern "C" {
3636
#endif
3737

38-
// DCache padding for variable to occupy full cache line
3938
#define TUD_EPBUF_DCACHE_SIZE(_size) \
4039
(CFG_TUD_MEM_DCACHE_ENABLE ? (TU_DIV_CEIL(_size, CFG_TUD_MEM_DCACHE_LINE_SIZE) * CFG_TUD_MEM_DCACHE_LINE_SIZE) : (_size))
4140

41+
// Declare an endpoint buffer with uint8_t[size]
4242
#define TUD_EPBUF_DEF(_name, _size) \
4343
union { \
4444
CFG_TUD_MEM_ALIGN uint8_t _name[_size]; \
4545
uint8_t _name##_dcache_padding[TUD_EPBUF_DCACHE_SIZE(_size)]; \
4646
};
4747

48+
// Declare an endpoint buffer with a type
4849
#define TUD_EPBUF_TYPE_DEF(_name, _type) \
4950
union { \
5051
CFG_TUD_MEM_ALIGN _type _name; \

src/portable/synopsys/dwc2/dwc2_esp32.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,6 @@ TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t* dwc2, uint
116116
//--------------------------------------------------------------------+
117117
#if CFG_TUD_DWC2_DMA_ENABLE || CFG_TUH_DWC2_DMA_ENABLE
118118
#if defined(SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE) && SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
119-
#include "hal/cache_hal.h"
120119
#include "esp_cache.h"
121120

122121
#if CFG_TUD_MEM_DCACHE_LINE_SIZE != CONFIG_CACHE_L1_CACHE_LINE_SIZE || \

src/tusb_option.h

Lines changed: 21 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -433,7 +433,11 @@
433433
#endif
434434

435435
#ifndef CFG_TUD_MEM_DCACHE_LINE_SIZE
436-
#define CFG_TUD_MEM_DCACHE_LINE_SIZE 32
436+
#ifndef CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT
437+
#define CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT 32
438+
#endif
439+
440+
#define CFG_TUD_MEM_DCACHE_LINE_SIZE CFG_TUD_MEM_DCACHE_LINE_SIZE_DEFAULT
437441
#endif
438442

439443
#ifndef CFG_TUD_ENDPOINT0_SIZE
@@ -543,6 +547,22 @@
543547
#define CFG_TUH_MEM_ALIGN CFG_TUSB_MEM_ALIGN
544548
#endif
545549

550+
#ifndef CFG_TUH_MEM_DCACHE_ENABLE
551+
#ifndef CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT
552+
#define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT 0
553+
#endif
554+
555+
#define CFG_TUH_MEM_DCACHE_ENABLE CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT
556+
#endif
557+
558+
#ifndef CFG_TUH_MEM_DCACHE_LINE_SIZE
559+
#ifndef CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT
560+
#define CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT 32
561+
#endif
562+
563+
#define CFG_TUH_MEM_DCACHE_LINE_SIZE CFG_TUH_MEM_DCACHE_LINE_SIZE_DEFAULT
564+
#endif
565+
546566
//------------- CLASS -------------//
547567

548568
#ifndef CFG_TUH_HUB

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