@@ -142,16 +142,20 @@ static void __tusb_irq_path_func(hw_handle_buff_status)(void)
142142 for (uint i = 1 ; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers ; i ++ )
143143 {
144144 // EPX is bit 0
145- // IEP1 is bit 2
146- // IEP2 is bit 4
147- // IEP3 is bit 6
145+ // IEP1 IN is bit 2
146+ // IEP1 OUT is bit 3
147+ // IEP2 IN is bit 4
148+ // IEP2 OUT is bit 5
149+ // IEP3 IN is bit 6
150+ // IEP3 OUT is bit 7
148151 // etc
149- bit = 1 << (i * 2 );
150-
151- if (remaining_buffers & bit )
152- {
153- remaining_buffers &= ~bit ;
154- _handle_buff_status_bit (bit , & ep_pool [i ]);
152+ for (int j = 0 ; j < 2 ; j ++ ){
153+ bit = 1 << (i * 2 + j );
154+ if (remaining_buffers & bit )
155+ {
156+ remaining_buffers &= ~bit ;
157+ _handle_buff_status_bit (bit , & ep_pool [i ]);
158+ }
155159 }
156160 }
157161
@@ -273,10 +277,10 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
273277{
274278 struct hw_endpoint * ep = NULL ;
275279
276- if (transfer_type == TUSB_XFER_INTERRUPT )
280+ if (transfer_type != TUSB_XFER_CONTROL )
277281 {
278282 ep = _next_free_interrupt_ep ();
279- pico_info ("Allocate interrupt ep %d\n" , ep -> interrupt_num );
283+ pico_info ("Allocate %s ep %d\n" , tu_edpt_type_str ( transfer_type ) , ep -> interrupt_num );
280284 assert (ep );
281285 ep -> buffer_control = & usbh_dpram -> int_ep_buffer_ctrl [ep -> interrupt_num ].ctrl ;
282286 ep -> endpoint_control = & usbh_dpram -> int_ep_ctrl [ep -> interrupt_num ].ctrl ;
@@ -337,8 +341,9 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
337341 pico_trace ("endpoint control (0x%p) <- 0x%x\n" , ep -> endpoint_control , ep_reg );
338342 ep -> configured = true;
339343
340- if (bmInterval )
344+ if (ep != & epx )
341345 {
346+ // Endpoint has its own addr_endp and interrupt bits to be setup!
342347 // This is an interrupt endpoint
343348 // so need to set up interrupt endpoint address control register with:
344349 // device address
@@ -520,10 +525,12 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
520525
521526 // Get appropriate ep. Either EPX or interrupt endpoint
522527 struct hw_endpoint * ep = get_dev_ep (dev_addr , ep_addr );
528+
523529 TU_ASSERT (ep );
524-
525- // EP should be inactive
526- assert (!ep -> active );
530+
531+ // Should we maybe be able to check if endpt is busy/active instead?
532+ if (ep -> active )
533+ return false;
527534
528535 // Control endpoint can change direction 0x00 <-> 0x80
529536 if ( ep_addr != ep -> ep_addr )
@@ -570,7 +577,9 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
570577
571578 // Configure EP0 struct with setup info for the trans complete
572579 struct hw_endpoint * ep = _hw_endpoint_allocate (0 );
580+
573581 TU_ASSERT (ep );
582+ assert (ep == & epx );
574583
575584 // EPX should be inactive
576585 assert (!ep -> active );
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