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Merge pull request #2906 from hathach/add-ra8m1
Add ra8m1_ek
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‎.circleci/config2.yml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ commands:
1616
"arm-gcc": "https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack/releases/download/v13.2.1-1.1/xpack-arm-none-eabi-gcc-13.2.1-1.1-linux-x64.tar.gz",
1717
"msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
1818
"riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz",
19-
"rx-gcc": "https://llvm-gcc-renesas.com/downloads/get.php?f=rx/8.3.0.202004-gnurx/gcc-8.3.0.202004-GNURX-ELF.run",
19+
"rx-gcc": "https://github.com/hathach/rx_device/releases/download/0.0.1/gcc-8.3.0.202411-GNURX-ELF.run",
2020
"arm-iar": "https://updates.iar.com/FileStore/STANDARD/001/003/322/cxarm-9.60.3.deb"
2121
}'
2222
toolchain_url=$(echo $TOOLCHAIN_JSON | jq -r '.["<< parameters.toolchain >>"]')

‎.github/actions/setup_toolchain/action.yml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ runs:
4141
"arm-clang": "https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-19.1.1/LLVM-ET-Arm-19.1.1-Linux-x86_64.tar.xz",
4242
"msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
4343
"riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz",
44-
"rx-gcc": "http://gcc-renesas.com/downloads/get.php?f=rx/8.3.0.202004-gnurx/gcc-8.3.0.202004-GNURX-ELF.run"
44+
"rx-gcc": "https://github.com/hathach/rx_device/releases/download/0.0.1/gcc-8.3.0.202411-GNURX-ELF.run"
4545
}'
4646
TOOLCHAIN_URL=$(echo $TOOLCHAIN_JSON | jq -r '.["${{ inputs.toolchain }}"]')
4747
echo "toolchain_url=$TOOLCHAIN_URL"

‎.github/workflows/pre-commit.yml‎

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Original file line numberDiff line numberDiff line change
@@ -33,6 +33,8 @@ jobs:
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3434
- name: Build Fuzzer
3535
run: |
36+
sudo apt install libc++-dev libc++abi-dev
37+
clang --version
3638
export CC=clang
3739
export CXX=clang++
3840
fuzz_harness=$(ls -d test/fuzz/device/*/)

‎.idea/cmake.xml‎

Lines changed: 5 additions & 2 deletions
Some generated files are not rendered by default. Learn more about customizing how changed files appear on GitHub.

‎examples/build_system/cmake/cpu/cortex-m85.cmake‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
if (TOOLCHAIN STREQUAL "gcc")
2+
set(TOOLCHAIN_COMMON_FLAGS
3+
-mthumb
4+
-mcpu=cortex-m85
5+
-mfloat-abi=hard
6+
-mfpu=fpv5-d16
7+
)
8+
set(FREERTOS_PORT GCC_ARM_CM85_NTZ_NONSECURE CACHE INTERNAL "")
9+
10+
elseif (TOOLCHAIN STREQUAL "clang")
11+
set(TOOLCHAIN_COMMON_FLAGS
12+
--target=arm-none-eabi
13+
-mcpu=cortex-m85
14+
-mfpu=fpv5-d16
15+
)
16+
set(FREERTOS_PORT GCC_ARM_CM85_NTZ_NONSECURE CACHE INTERNAL "")
17+
18+
elseif (TOOLCHAIN STREQUAL "iar")
19+
set(TOOLCHAIN_COMMON_FLAGS
20+
--cpu cortex-m85
21+
--fpu VFPv5_D16
22+
)
23+
set(FREERTOS_PORT IAR_ARM_CM85_NTZ_NONSECURE CACHE INTERNAL "")
24+
25+
endif ()

‎examples/build_system/make/cpu/cortex-m85.mk‎

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@@ -0,0 +1,27 @@
1+
ifeq ($(TOOLCHAIN),gcc)
2+
CFLAGS += \
3+
-mthumb \
4+
-mcpu=cortex-m85 \
5+
-mfloat-abi=hard \
6+
-mfpu=fpv5-d16 \
7+
8+
else ifeq ($(TOOLCHAIN),clang)
9+
CFLAGS += \
10+
--target=arm-none-eabi \
11+
-mcpu=cortex-m85 \
12+
-mfpu=fpv5-d16 \
13+
14+
else ifeq ($(TOOLCHAIN),iar)
15+
CFLAGS += \
16+
--cpu cortex-m85 \
17+
--fpu VFPv5_D16 \
18+
19+
ASFLAGS += \
20+
--cpu cortex-m85 \
21+
--fpu VFPv5_D16 \
22+
23+
else
24+
$(error "TOOLCHAIN is not supported")
25+
endif
26+
27+
FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM85_NTZ/non_secure

‎hw/bsp/ra/board_cfg.h‎

Lines changed: 10 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -1,45 +1,13 @@
1-
/*
2-
* The MIT License (MIT)
3-
*
4-
* Copyright (c) 2023 Ha Thach (tinyusb.org)
5-
*
6-
* Permission is hereby granted, free of charge, to any person obtaining a copy
7-
* of this software and associated documentation files (the "Software"), to deal
8-
* in the Software without restriction, including without limitation the rights
9-
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10-
* copies of the Software, and to permit persons to whom the Software is
11-
* furnished to do so, subject to the following conditions:
12-
*
13-
* The above copyright notice and this permission notice shall be included in
14-
* all copies or substantial portions of the Software.
15-
*
16-
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17-
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18-
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19-
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20-
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21-
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22-
* THE SOFTWARE.
23-
*
24-
*/
25-
26-
#ifndef _BOARD_CFG_H
27-
#define _BOARD_CFG_H
28-
1+
/* generated configuration header file - do not edit */
2+
#ifndef BOARD_CFG_H_
3+
#define BOARD_CFG_H_
294
#ifdef __cplusplus
30-
extern "C" {
31-
#endif
32-
33-
#if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8)
34-
#define BOARD_HAS_USB_HIGHSPEED
35-
#endif
5+
extern "C" {
6+
#endif
367

37-
// for SystemInit()
38-
void bsp_init(void * p_args);
39-
40-
41-
#ifdef __cplusplus
42-
}
43-
#endif
8+
void bsp_init(void * p_args);
449

45-
#endif
10+
#ifdef __cplusplus
11+
}
12+
#endif
13+
#endif /* BOARD_CFG_H_ */

‎hw/bsp/ra/boards/portenta_c33/board.cmake‎

Lines changed: 6 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -4,22 +4,13 @@ set(MCU_VARIANT ra6m5)
44
set(JLINK_DEVICE R7FA6M5BH)
55
set(DFU_UTIL_VID_PID 2341:0368)
66

7-
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
8-
9-
# Device port default to PORT1 Highspeed
10-
if (NOT DEFINED PORT)
11-
set(PORT 1)
7+
# device default to PORT 1 High Speed
8+
if (NOT DEFINED RHPORT_DEVICE)
9+
set(RHPORT_DEVICE 1)
10+
endif()
11+
if (NOT DEFINED RHPORT_HOST)
12+
set(RHPORT_HOST 0)
1213
endif()
13-
14-
# Host port will be the other port
15-
set(HOST_PORT $<NOT:${PORT}>)
1614

1715
function(update_board TARGET)
18-
target_compile_definitions(${TARGET} PUBLIC
19-
BOARD_TUD_RHPORT=${PORT}
20-
BOARD_TUH_RHPORT=${HOST_PORT}
21-
# port 0 is fullspeed, port 1 is highspeed
22-
BOARD_TUD_MAX_SPEED=$<IF:${PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
23-
BOARD_TUH_MAX_SPEED=$<IF:${HOST_PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
24-
)
2516
endfunction()

‎hw/bsp/ra/boards/portenta_c33/board.h‎

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Original file line numberDiff line numberDiff line change
@@ -31,36 +31,9 @@
3131
extern "C" {
3232
#endif
3333

34-
#define LED1 BSP_IO_PORT_01_PIN_07 // Red LED
3534
#define LED_STATE_ON 1
36-
37-
#define SW1 BSP_IO_PORT_04_PIN_08 // D12
3835
#define BUTTON_STATE_ACTIVE 0
3936

40-
static const ioport_pin_cfg_t board_pin_cfg[] = {
41-
{ .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW },
42-
{ .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT },
43-
44-
// USB FS
45-
{ .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH },
46-
{ .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH},
47-
{ .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH},
48-
49-
// USB HS
50-
{ .pin = BSP_IO_PORT_07_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS },
51-
{ .pin = BSP_IO_PORT_11_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH},
52-
{ .pin = BSP_IO_PORT_11_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH},
53-
54-
// ETM Trace
55-
#ifdef TRACE_ETM
56-
{ .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
57-
{ .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
58-
{ .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
59-
{ .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
60-
{ .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
61-
#endif
62-
};
63-
6437
#ifdef __cplusplus
6538
}
6639
#endif

‎hw/bsp/ra/boards/portenta_c33/board.mk‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,9 @@
11
CPU_CORE = cortex-m33
22
MCU_VARIANT = ra6m5
33

4-
LD_FILE = ${BOARD_PATH}/${BOARD}.ld
5-
64
# Port 1 is highspeed
7-
PORT ?= 1
5+
RHPORT_DEVICE ?= 1
6+
RHPORT_HOST ?= 0
87

98
JLINK_DEVICE = R7FA6M5BH
109
DFU_UTIL_OPTION = -d 2341:0368 -a 0

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