Skip to content

Commit bfcdef4

Browse files
authored
Merge pull request #1690 from tore-espressif/fix/espressif/iso_transfers
esp: Fix Isochronous transfers
2 parents 55db123 + a49ca79 commit bfcdef4

File tree

1 file changed

+16
-0
lines changed

1 file changed

+16
-0
lines changed

src/portable/espressif/esp32sx/dcd_esp32sx.c

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@ typedef struct {
5959
uint16_t queued_len;
6060
uint16_t max_size;
6161
bool short_packet;
62+
uint8_t interval;
6263
} xfer_ctl_t;
6364

6465
static const char *TAG = "TUSB:DCD";
@@ -267,6 +268,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt)
267268

268269
xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir);
269270
xfer->max_size = tu_edpt_packet_size(desc_edpt);
271+
xfer->interval = desc_edpt->bInterval;
270272

271273
if (dir == TUSB_DIR_OUT) {
272274
out_ep[epnum].doepctl |= USB_USBACTEP1_M |
@@ -379,6 +381,13 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
379381
USB0.in_ep_reg[epnum].dieptsiz = (num_packets << USB_D_PKTCNT0_S) | total_bytes;
380382
USB0.in_ep_reg[epnum].diepctl |= USB_D_EPENA1_M | USB_D_CNAK1_M; // Enable | CNAK
381383

384+
// For ISO endpoint with interval=1 set correct DATA0/DATA1 bit for next frame
385+
if ((USB0.in_ep_reg[epnum].diepctl & USB_D_EPTYPE0_M) == (1 << USB_D_EPTYPE1_S) && xfer->interval == 1) {
386+
// Take odd/even bit from frame counter.
387+
uint32_t const odd_frame_now = (USB0.dsts & (1u << USB_SOFFN_S));
388+
USB0.in_ep_reg[epnum].diepctl |= (odd_frame_now ? USB_DI_SETD0PID1 : USB_DI_SETD1PID1);
389+
}
390+
382391
// Enable fifo empty interrupt only if there are something to put in the fifo.
383392
if(total_bytes != 0) {
384393
USB0.dtknqr4_fifoemptymsk |= (1 << epnum);
@@ -387,6 +396,13 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
387396
// Each complete packet for OUT xfers triggers XFRC.
388397
USB0.out_ep_reg[epnum].doeptsiz |= USB_PKTCNT0_M | ((xfer->max_size & USB_XFERSIZE0_V) << USB_XFERSIZE0_S);
389398
USB0.out_ep_reg[epnum].doepctl |= USB_EPENA0_M | USB_CNAK0_M;
399+
400+
// For ISO endpoint with interval=1 set correct DATA0/DATA1 bit for next frame
401+
if ((USB0.out_ep_reg[epnum].doepctl & USB_D_EPTYPE0_M) == (1 << USB_D_EPTYPE1_S) && xfer->interval == 1) {
402+
// Take odd/even bit from frame counter.
403+
uint32_t const odd_frame_now = (USB0.dsts & (1u << USB_SOFFN_S));
404+
USB0.out_ep_reg[epnum].doepctl |= (odd_frame_now ? USB_DO_SETD0PID1 : USB_DO_SETD1PID1);
405+
}
390406
}
391407
return true;
392408
}

0 commit comments

Comments
 (0)