@@ -58,34 +58,48 @@ static inline void SystemClock_Config(void) {
5858 RCC_OscInitTypeDef RCC_OscInitStruct = {0 };
5959 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0 };
6060
61- /** Configure the main internal regulator output voltage */
62- HAL_PWREx_ControlVoltageScaling (PWR_REGULATOR_VOLTAGE_SCALE1 );
61+ /** Configure the main internal regulator output voltage
62+ */
63+ __HAL_PWR_VOLTAGESCALING_CONFIG (PWR_REGULATOR_VOLTAGE_SCALE0 );
64+
65+ while (!__HAL_PWR_GET_FLAG (PWR_FLAG_VOSRDY )) {}
6366
6467 /** Initializes the RCC Oscillators according to the specified parameters
6568 * in the RCC_OscInitTypeDef structure.
66- Freq 250MHZ */
67-
68- RCC_OscInitStruct .OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE ;
69+ */
70+ RCC_OscInitStruct .OscillatorType = RCC_OSCILLATORTYPE_HSI48 |RCC_OSCILLATORTYPE_HSE ;
6971 RCC_OscInitStruct .HSEState = RCC_HSE_BYPASS_DIGITAL ;
7072 RCC_OscInitStruct .HSI48State = RCC_HSI48_ON ;
7173 RCC_OscInitStruct .PLL .PLLState = RCC_PLL_ON ;
7274 RCC_OscInitStruct .PLL .PLLSource = RCC_PLL1_SOURCE_HSE ;
73- RCC_OscInitStruct .PLL .PLLM = 5 ;
74- RCC_OscInitStruct .PLL .PLLN = 100 ;
75+ RCC_OscInitStruct .PLL .PLLM = 4 ;
76+ RCC_OscInitStruct .PLL .PLLN = 250 ;
7577 RCC_OscInitStruct .PLL .PLLP = 2 ;
76- RCC_OscInitStruct .PLL .PLLQ = 10 ;
78+ RCC_OscInitStruct .PLL .PLLQ = 2 ;
7779 RCC_OscInitStruct .PLL .PLLR = 2 ;
78- RCC_OscInitStruct .PLL .PLLRGE = RCC_PLL1_VCIRANGE_2 ;
80+ RCC_OscInitStruct .PLL .PLLRGE = RCC_PLL1_VCIRANGE_1 ;
7981 RCC_OscInitStruct .PLL .PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE ;
8082 RCC_OscInitStruct .PLL .PLLFRACN = 0 ;
81- HAL_RCC_OscConfig (& RCC_OscInitStruct );
82-
83- /** Initializes the CPU, AHB and APB buses clocks */
84- RCC_ClkInitStruct .ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 ;
83+ if (HAL_RCC_OscConfig (& RCC_OscInitStruct ) != HAL_OK )
84+ {
85+ Error_Handler ();
86+ }
87+
88+ /** Initializes the CPU, AHB and APB buses clocks
89+ */
90+ RCC_ClkInitStruct .ClockType = RCC_CLOCKTYPE_HCLK |RCC_CLOCKTYPE_SYSCLK
91+ |RCC_CLOCKTYPE_PCLK1 |RCC_CLOCKTYPE_PCLK2
92+ |RCC_CLOCKTYPE_PCLK3 ;
8593 RCC_ClkInitStruct .SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK ;
8694 RCC_ClkInitStruct .AHBCLKDivider = RCC_SYSCLK_DIV1 ;
8795 RCC_ClkInitStruct .APB1CLKDivider = RCC_HCLK_DIV1 ;
88- HAL_RCC_ClockConfig (& RCC_ClkInitStruct , FLASH_LATENCY_5 );
96+ RCC_ClkInitStruct .APB2CLKDivider = RCC_HCLK_DIV1 ;
97+ RCC_ClkInitStruct .APB3CLKDivider = RCC_HCLK_DIV1 ;
98+
99+ if (HAL_RCC_ClockConfig (& RCC_ClkInitStruct , FLASH_LATENCY_5 ) != HAL_OK )
100+ {
101+ Error_Handler ();
102+ }
89103
90104 // Configure CRS clock source
91105 __HAL_RCC_CRS_CLK_ENABLE ();
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