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Commit edec37c

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hathachhathach
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fix cmake build
1 parent 386f338 commit edec37c

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4 files changed

+21
-46
lines changed

4 files changed

+21
-46
lines changed

‎hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake‎

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,11 @@
11
set(MCU_VARIANT stm32n657xx)
22
set(JLINK_DEVICE stm32n6xx)
33

4-
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32N657XX_LRUN.ld)
5-
set(LD_FILE_Clang ${LD_FILE_GNU})
6-
7-
set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
4+
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32N657XX_AXISRAM2_fsbl.ld)
85

96
function(update_board TARGET)
10-
117
target_compile_definitions(${TARGET} PUBLIC
12-
STM32N6xx
13-
SEGGER_RTT_SECTION="noncacheable_buffer"
14-
BUFFER_SIZE_UP=0x3000
8+
STM32N657xx
159
)
1610

1711
target_sources(${TARGET} PUBLIC

‎hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk‎

Lines changed: 4 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,17 @@
1-
MCU_VARIANT = stm32n6xx
2-
CFLAGS += -DSTM32N6xx
3-
4-
# For flash-jlink target
1+
MCU_VARIANT = stm32n657xx
2+
CFLAGS += -DSTM32N657xx
53
JLINK_DEVICE = stm32n6xx
64

5+
LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
6+
77
# flash target using on-board stlink
88
flash: flash-stlink
99

1010
PORT = 1
1111

12-
1312
SRC_C += \
1413
$(BOARD_PATH)/tcpp0203/tcpp0203.c \
1514
$(BOARD_PATH)/tcpp0203/tcpp0203_reg.c \
1615

1716
INC += \
1817
$(TOP)/$(BOARD_PATH)/tcpp0203 \
19-
20-
CFLAGS += \
21-
-DSEGGER_RTT_SECTION=\"noncacheable_buffer\" \
22-
-DSTM32N657xx
23-
-DBUFFER_SIZE_UP=0x3000 \

‎hw/bsp/stm32n6/family.cmake‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -26,14 +26,12 @@ if (NOT DEFINED RHPORT_HOST)
2626
set(RHPORT_HOST 1)
2727
endif ()
2828

29-
if (NOT DEFINED RHPORT_SPEED)
30-
set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
31-
endif ()
29+
# N6 are all high speed
3230
if (NOT DEFINED RHPORT_DEVICE_SPEED)
33-
list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
31+
set(RHPORT_DEVICE_SPEED OPT_MODE_HIGH_SPEED)
3432
endif ()
3533
if (NOT DEFINED RHPORT_HOST_SPEED)
36-
list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
34+
set(RHPORT_HOST_SPEED OPT_MODE_HIGH_SPEED)
3735
endif ()
3836

3937
cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
@@ -61,7 +59,7 @@ function(add_board_target BOARD_TARGET)
6159
endif()
6260

6361
add_library(${BOARD_TARGET} STATIC
64-
${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}_ns.c
62+
${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}_fsbl.c
6563
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
6664
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
6765
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
@@ -86,6 +84,8 @@ function(add_board_target BOARD_TARGET)
8684
BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
8785
BOARD_TUH_RHPORT=${RHPORT_HOST}
8886
BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
87+
SEGGER_RTT_SECTION="noncacheable_buffer"
88+
BUFFER_SIZE_UP=0x3000
8989
)
9090

9191
update_board(${BOARD_TARGET})

‎hw/bsp/stm32n6/family.mk‎

Lines changed: 9 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
ST_FAMILY = n6
22
ST_PREFIX = stm32${ST_FAMILY}xx
3-
ST_PREFIX_LONG = stm32${ST_FAMILY}57xx
43
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
54
ST_HAL_DRIVER = hw/mcu/st/${ST_PREFIX}_hal_driver
65

@@ -12,26 +11,15 @@ CPU_CORE ?= cortex-m55
1211
# ----------------------
1312
# Port & Speed Selection
1413
# ----------------------
15-
RHPORT_SPEED ?= OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED
1614
RHPORT_DEVICE ?= 1
1715
RHPORT_HOST ?= 1
1816

19-
# Determine RHPORT_DEVICE_SPEED if not defined
2017
ifndef RHPORT_DEVICE_SPEED
21-
ifeq ($(RHPORT_DEVICE), 0)
22-
RHPORT_DEVICE_SPEED = $(firstword $(RHPORT_SPEED))
23-
else
24-
RHPORT_DEVICE_SPEED = $(lastword $(RHPORT_SPEED))
25-
endif
18+
RHPORT_DEVICE_SPEED = OPT_MODE_HIGH_SPEED
2619
endif
2720

28-
# Determine RHPORT_HOST_SPEED if not defined
2921
ifndef RHPORT_HOST_SPEED
30-
ifeq ($(RHPORT_HOST), 0)
31-
RHPORT_HOST_SPEED = $(firstword $(RHPORT_SPEED))
32-
else
33-
RHPORT_HOST_SPEED = $(lastword $(RHPORT_SPEED))
34-
endif
22+
RHPORT_HOST_SPEED = OPT_MODE_HIGH_SPEED
3523
endif
3624

3725
# --------------
@@ -42,7 +30,9 @@ CFLAGS += \
4230
-DBOARD_TUD_RHPORT=${RHPORT_DEVICE} \
4331
-DBOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED} \
4432
-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
45-
-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
33+
-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
34+
-DSEGGER_RTT_SECTION=\"noncacheable_buffer\" \
35+
-DBUFFER_SIZE_UP=0x3000 \
4636

4737
# GCC Flags
4838
CFLAGS_GCC += \
@@ -71,10 +61,10 @@ SRC_C += \
7161
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_dma.c \
7262
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_gpio.c \
7363
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_hcd.c \
74-
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_i2c.c \
64+
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_i2c.c \
7565
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pcd.c \
7666
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pcd_ex.c \
77-
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr.c \
67+
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr.c \
7868
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr_ex.c \
7969
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc.c \
8070
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc_ex.c \
@@ -89,13 +79,10 @@ INC += \
8979
$(TOP)/$(ST_CMSIS)/Include \
9080
$(TOP)/$(ST_HAL_DRIVER)/Inc
9181

92-
# Linker
93-
LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
94-
9582
# Startup
96-
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(ST_PREFIX_LONG)_fsbl.s
83+
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT)_fsbl.s
9784
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
9885

9986
# Linker
100-
LD_FILE_GCC ?= $(ST_CMSIS)/Source/Templates/gcc/linker/$(ST_PREFIX_LONG)_flash.ld
87+
LD_FILE_GCC ?= $(ST_CMSIS)/Source/Templates/gcc/linker/$(MCU_VARIANT)_flash.ld
10188
LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf

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