Skip to content

Commit 3a37fb1

Browse files
diaolo01artkhyzha
authored andcommitted
[herd, litmus] Introduce execute bit in PTEs
1 parent 5604c67 commit 3a37fb1

File tree

12 files changed

+106
-42
lines changed

12 files changed

+106
-42
lines changed

herd/AArch64Sem.ml

Lines changed: 34 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -717,6 +717,7 @@ module Make
717717
valid_v : V.v;
718718
el0_v : V.v;
719719
tagged_v : V.v;
720+
x_v : V.v;
720721
}
721722

722723
let arch_op1 op = M.op1 (Op.ArchOp1 op)
@@ -726,6 +727,7 @@ module Make
726727
let extract_dbm v = arch_op1 AArch64Op.DBM v
727728
let extract_valid v = arch_op1 AArch64Op.Valid v
728729
let extract_el0 v = arch_op1 AArch64Op.EL0 v
730+
let extract_x v = arch_op1 AArch64Op.X v
729731
let extract_oa v = arch_op1 AArch64Op.OA v
730732
let extract_tagged v = arch_op1 AArch64Op.Tagged v
731733

@@ -791,9 +793,10 @@ module Make
791793
extract_af pte_v >>|
792794
extract_db pte_v >>|
793795
extract_dbm pte_v >>|
794-
extract_tagged pte_v) >>=
795-
(fun ((((((oa_v,el0_v),valid_v),af_v),db_v),dbm_v),tagged_v) ->
796-
M.unitT {oa_v; af_v; db_v; dbm_v; valid_v; el0_v; tagged_v})
796+
extract_tagged pte_v >>|
797+
extract_x pte_v) >>=
798+
(fun (((((((oa_v,el0_v),valid_v),af_v),db_v),dbm_v),tagged_v),x_v) ->
799+
M.unitT {oa_v; af_v; db_v; dbm_v; valid_v; el0_v; tagged_v; x_v})
797800

798801
let get_oa a_virt mpte =
799802
(M.op1 Op.Offset a_virt >>| mpte)
@@ -976,6 +979,12 @@ module Make
976979
if not ii.A.in_handler && is_el0 then
977980
fun pte_v -> m_op Op.Or (is_zero pte_v.el0_v) (m pte_v)
978981
else m in
982+
let execute_check cond =
983+
match domain with
984+
| DISide.Instr ->
985+
fun pte_v ->
986+
m_op Op.Or (cond pte_v) (is_zero pte_v.x_v)
987+
| _ -> cond in
979988

980989
let open DirtyBit in
981990
let tthm = dirty.tthm proc
@@ -985,20 +994,26 @@ module Make
985994
let mfault (_,ipte) m =
986995
let open FaultType.AArch64 in
987996
let open DISide in
997+
let transl_fault = M.unitT (Some (MMU (domain, Translation))) in
998+
let perm_fault = M.unitT (Some (MMU (domain, Permission))) in
999+
let af_fault = M.unitT (Some (MMU (domain, AccessFlag))) in
1000+
let perm =
1001+
match domain with
1002+
| Instr ->
1003+
(is_zero ipte.x_v) >>=
1004+
fun x ->
1005+
M.choiceT x perm_fault perm_fault
1006+
| _ -> perm_fault in
1007+
let af =
1008+
if ha then perm
1009+
else
1010+
(is_zero ipte.af_v) >>=
1011+
fun af ->
1012+
M.choiceT af af_fault perm in
9881013
(is_zero ipte.valid_v) >>=
989-
(fun c ->
990-
M.choiceT c
991-
(M.unitT (Some (MMU (domain, Translation))))
992-
(if ha then
993-
M.unitT (Some (MMU (domain, Permission)))
994-
else begin
995-
(is_zero ipte.af_v) >>=
996-
(fun c ->
997-
M.choiceT c
998-
(M.unitT (Some (MMU (domain, AccessFlag))))
999-
(M.unitT (Some (MMU (domain, Permission)))))
1000-
end) >>=
1001-
fun t -> mfault (get_oa a_virt m) a_virt t)
1014+
fun v ->
1015+
M.choiceT v transl_fault af >>= fun t ->
1016+
mfault (get_oa a_virt m) a_virt t
10021017
and mok (pte_v,ipte) a_pte m a =
10031018
let m =
10041019
let msg =
@@ -1081,13 +1096,15 @@ module Make
10811096
| Dir.W ->
10821097
fun pte_v ->
10831098
m_op Op.Or (cond_R pte_v) (is_zero pte_v.db_v) in
1099+
let cond = execute_check cond in
10841100
check_cond cond
10851101
else if (tthm && ha && not hd) then (* HW managment of AF *)
10861102
let cond = match dir with (* Do not check AF *)
10871103
| Dir.R -> fun pte_v -> is_zero pte_v.valid_v
10881104
| Dir.W ->
10891105
fun pte_v ->
10901106
m_op Op.Or (is_zero pte_v.valid_v) (is_zero pte_v.db_v) in
1107+
let cond = execute_check cond in
10911108
check_cond cond
10921109
else (* HW management of AF and DB *)
10931110
let cond = match dir with (* Do not check AF *)
@@ -1099,6 +1116,7 @@ module Make
10991116
(is_zero pte_v.valid_v)
11001117
(m_op Op.And
11011118
(is_zero pte_v.db_v) (is_zero pte_v.dbm_v)) in
1119+
let cond = execute_check cond in
11021120
check_cond cond)
11031121
end in
11041122
if pte2 then mvirt

herd/tests/instructions/AArch64.vmsa+ifetch/A010.litmus

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,4 +6,4 @@ TTD(P0:Page0)=(oa:PA(P0:Page0),x:0);
66
P0 ;
77
Page0: ;
88
ADD W0,W0,#1;
9-
forall Fault(P0:Page0,MMU:Permission)
9+
forall Fault(P0:Page0,I-MMU:Permission)
Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
Test A010 Required
2+
States 1
3+
Fault(P0:Page0,label:"P0:Page0",I-MMU:Permission);
4+
Ok
5+
Witnesses
6+
Positive: 1 Negative: 0
7+
Flag combining-vmsa-and-ifetch-is-not-supported
8+
Condition forall (fault(P0:Page0,I-MMU:Permission))
9+
Observation A008 Always 1 0
10+
Hash=cb0a8561acabcc5a329a5e61f8d9d457

herd/tests/instructions/AArch64.vmsa+ifetch/A010.litmus.expected-failure

Lines changed: 0 additions & 1 deletion
This file was deleted.
Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
Test A011 Required
2+
States 1
3+
0:X0=1;
4+
Ok
5+
Witnesses
6+
Positive: 1 Negative: 0
7+
Flag combining-vmsa-and-ifetch-is-not-supported
8+
Condition forall (0:X0=1)
9+
Observation A007 Always 1 0
10+
Hash=664b4fb6731a307c4de1b8e71c757cb3

herd/tests/instructions/AArch64.vmsa+ifetch/A011.litmus.expected-failure

Lines changed: 0 additions & 1 deletion
This file was deleted.

lib/AArch64Op.ml

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@ type 'op1 unop =
2222
| DBM (* get DBM from PTE entry *)
2323
| Valid (* get Valid bit from PTE entry *)
2424
| EL0 (* get EL0 bit from PTE entry *)
25+
| X (* get execute permission bit from PTE entry *)
2526
| OA (* get OA from PTE entry *)
2627
| SetOA (* store OA into PAR_EL1 *)
2728
| SetF (* set F to 1 in PAR_EL1 *)
@@ -71,6 +72,7 @@ module
7172
| DBM -> "DBM"
7273
| Valid -> "Valid"
7374
| EL0 -> "EL0"
75+
| X -> "X"
7476
| OA -> "OA"
7577
| SetOA -> "SetOA"
7678
| SetF -> "SetF"
@@ -137,6 +139,7 @@ module
137139
let getvalid = op_get_pteval (fun p -> p.valid <> 0)
138140

139141
let getel0 = op_get_pteval (fun p -> p.el0 <> 0)
142+
let getx = op_get_pteval (fun p -> p.x <> 0)
140143

141144
let gettagged = op_get_pteval (fun p -> Attrs.is_tagged p.attrs)
142145

@@ -215,6 +218,7 @@ module
215218
| DBM -> getdbm
216219
| Valid -> getvalid
217220
| EL0 -> getel0
221+
| X -> getx
218222
| OA -> getoa
219223
| SetOA -> setoa
220224
| SetF -> setf

lib/AArch64PteVal.ml

Lines changed: 25 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -187,6 +187,7 @@ type t = {
187187
db : int;
188188
dbm : int;
189189
el0 : int;
190+
x : int;
190191
attrs: Attrs.t;
191192
}
192193

@@ -199,6 +200,7 @@ let eq_props p1 p2 =
199200
Misc.int_eq p1.dbm p2.dbm &&
200201
Misc.int_eq p1.valid p2.valid &&
201202
Misc.int_eq p1.el0 p2.el0 &&
203+
Misc.int_eq p1.x p2.x &&
202204
Attrs.eq p1.attrs p2.attrs
203205

204206
(* Let us abstract... *)
@@ -217,7 +219,7 @@ let get_attrs {attrs;_ } = Attrs.as_list attrs
217219

218220
let prot_default =
219221
{ oa=OutputAddress.PHY "";
220-
valid=1; af=1; db=1; dbm=0; el0=1; attrs=Attrs.default; }
222+
valid=1; af=1; db=1; dbm=0; el0=1; x=1; attrs=Attrs.default; }
221223

222224
let default s = { prot_default with oa=OutputAddress.PHY s; }
223225

@@ -240,6 +242,7 @@ and pp_af hexa ok = pp_int_field hexa ok "af" (fun p -> p.af)
240242
and pp_db hexa ok = pp_int_field hexa ok "db" (fun p -> p.db)
241243
and pp_dbm hexa ok = pp_int_field hexa ok "dbm" (fun p -> p.dbm)
242244
and pp_el0 hexa ok = pp_int_field hexa ok "el0" (fun p -> p.el0)
245+
and pp_x hexa ok = pp_int_field hexa ok "x" (fun p -> p.x)
243246
and pp_attrs compat ok = pp_field ok
244247
(fun a -> sprintf (if compat then "%s" else "attrs:(%s)") (Attrs.pp a)) Attrs.eq (fun p -> p.attrs)
245248

@@ -254,6 +257,7 @@ let is_default_attrs t = Attrs.is_default t.attrs
254257
(2) Fields from el0 (included) are printed if non-default. *)
255258

256259
let pp_fields hexa showall p k =
260+
let k = pp_x hexa false p k in
257261
let k = pp_el0 hexa false p k in
258262
let k = pp_valid hexa showall p k in
259263
let k = pp_dbm hexa showall p k in
@@ -291,6 +295,7 @@ let add_field k v p =
291295
| "dbm" -> { p with dbm = my_int_of_string k v }
292296
| "valid" -> { p with valid = my_int_of_string k v }
293297
| "el0" -> { p with el0 = my_int_of_string k v }
298+
| "x" -> { p with x = my_int_of_string k v }
294299
| _ ->
295300
Warn.user_error "Illegal AArch64 page table entry property %s" k
296301

@@ -326,17 +331,19 @@ let compare =
326331
lex_compare (fun p1 p2 -> OutputAddress.compare p1.oa p2.oa) cmp in
327332
let cmp =
328333
lex_compare (fun p1 p2 -> Attrs.compare p1.attrs p2.attrs) cmp in
334+
let cmp =
335+
lex_compare (fun p1 p2 -> Misc.int_compare p1.x p2.x) cmp in
329336
cmp
330337

331338
let eq p1 p2 = OutputAddress.eq p1.oa p2.oa && eq_props p1 p2
332339

333340
(* For litmus *)
334341

335342
(* Those lists must of course match one with the other *)
336-
let fields = ["af";"db";"dbm";"valid";"el0";]
343+
let fields = ["af";"db";"dbm";"valid";"el0";"x";]
337344
and default_fields =
338345
let p = prot_default in
339-
let ds = [p.af; p.db; p.dbm; p.valid;p.el0;] in
346+
let ds = [p.af; p.db; p.dbm; p.valid; p.el0; p.x;] in
340347
List.map (Printf.sprintf "%i") ds
341348

342349
let norm =
@@ -361,9 +368,9 @@ let norm =
361368

362369
let dump_pack pp_oa p =
363370
sprintf
364-
"pack_pack(%s,%d,%d,%d,%d,%d)"
371+
"pack_pack(%s,%d,%d,%d,%d,%d,%d)"
365372
(pp_oa (OutputAddress.pp_old p.oa))
366-
p.af p.db p.dbm p.valid p.el0
373+
p.af p.db p.dbm p.valid p.el0 p.x
367374

368375
let as_physical p = OutputAddress.as_physical p.oa
369376

@@ -376,7 +383,8 @@ let as_flags p =
376383
(add p.valid "msk_valid"
377384
(add p.af "msk_af"
378385
(add p.dbm "msk_dbm"
379-
(add p.db "msk_db" [])))) in
386+
(add p.db "msk_db"
387+
(add p.x "msk_x" []))))) in
380388
let msk = String.concat "|" msk in
381389
Some msk
382390

@@ -392,12 +400,14 @@ let mask_el0 = Int64.shift_left 1L 6
392400
let mask_db = Int64.shift_left 1L 7
393401
let mask_af = Int64.shift_left 1L 10
394402
let mask_dbm = Int64.shift_left 1L 51
403+
let mask_x = Int64.shift_left 1L 54
395404
let mask_all_neg =
396405
Int64.lognot
397-
(Int64.logor mask_el0
398-
(Int64.logor
399-
(Int64.logor mask_valid mask_db)
400-
(Int64.logor mask_af mask_dbm)))
406+
(Int64.logor mask_x
407+
(Int64.logor mask_el0
408+
(Int64.logor
409+
(Int64.logor mask_valid mask_db)
410+
(Int64.logor mask_af mask_dbm))))
401411

402412
let is_zero v = Int64.equal 0L v
403413
let is_set v m = not (is_zero (Int64.logand v m))
@@ -410,6 +420,7 @@ let orop p m =
410420
let p = if is_set m mask_db then { p with db=0; } else p in
411421
let p = if is_set m mask_af then { p with af=1; } else p in
412422
let p = if is_set m mask_dbm then { p with dbm=1; } else p in
423+
let p = if is_set m mask_x then { p with x=1; } else p in
413424
Some p
414425

415426
and andnot2 p m =
@@ -420,6 +431,7 @@ and andnot2 p m =
420431
let p = if is_set m mask_db then { p with db=1; } else p in
421432
let p = if is_set m mask_af then { p with af=0; } else p in
422433
let p = if is_set m mask_dbm then { p with dbm=0; } else p in
434+
let p = if is_set m mask_x then { p with x=0; } else p in
423435
Some p
424436

425437
and andop p m =
@@ -439,4 +451,7 @@ and andop p m =
439451
let r =
440452
if is_set m mask_dbm && p.dbm=1
441453
then Int64.logor r mask_dbm else r in
454+
let r =
455+
if is_set m mask_x && p.x=1
456+
then Int64.logor r mask_x else r in
442457
Some r

lib/AArch64PteVal.mli

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@ type t = {
3535
db : int;
3636
dbm : int;
3737
el0 : int;
38+
x : int;
3839
attrs : Attrs.t;
3940
}
4041

lib/ASLOp.ml

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -219,12 +219,15 @@ let do_op op c1 c2 =
219219
| [10] ->
220220
let af = ASLScalar.bit_of_bv s2 in
221221
Constant.PteVal { pte with AArch64PteVal.af;} |> return
222-
| [7] ->
223-
let db = 1-ASLScalar.bit_of_bv s2 in
224-
Constant.PteVal { pte with AArch64PteVal.db;} |> return
225-
| _ ->
226-
set_slice positions c1 c2
227-
end
222+
| [7] ->
223+
let db = 1-ASLScalar.bit_of_bv s2 in
224+
Constant.PteVal { pte with AArch64PteVal.db;} |> return
225+
| [54] ->
226+
let x = ASLScalar.bit_of_bv s2 in
227+
Constant.PteVal { pte with AArch64PteVal.x;} |> return
228+
| _ ->
229+
set_slice positions c1 c2
230+
end
228231
| _ -> set_slice positions c1 c2
229232

230233
let do_op1 op cst =

0 commit comments

Comments
 (0)