Skip to content

Commit 9bbf595

Browse files
committed
Addressing review comments
1 parent fa839cb commit 9bbf595

File tree

4 files changed

+26
-38
lines changed

4 files changed

+26
-38
lines changed

herd/AArch64Sem.ml

Lines changed: 22 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1600,8 +1600,25 @@ module Make
16001600
| None -> false
16011601
| Some rB -> AArch64.reg_compare rA rB=0
16021602

1603+
(*
1604+
Arguments:
1605+
- rA: Base address register.
1606+
- dir: Access direction (Dir.R for reads, Dir.W for writes).
1607+
- updatedb: If true, update the Dirty Bit in table descriptors.
1608+
- checked: If true, perform memory tagging checks.
1609+
- mop: Function defining the memory operation.
1610+
- perms: Required permissions for Morello.
1611+
- ma: Virtual address to be accessed, represented as the value within the monad.
1612+
- mv: Value to be stored (for write operations), represented as the value in the monad.
1613+
- an: Annotation for the event structure.
1614+
- ii: Instruction metadata.
1615+
- branch: Determines control flow after the translated memory access:
1616+
typically next instruction for data accesses, or no change
1617+
when translating for instruction fetches.
1618+
- domain: Whether the translation is for data or instruction access.
1619+
*)
16031620
let do_lift_memop rA (* Base address register *)
1604-
dir updatedb checked mop perms ma mv an ii (branch : 'a M.t -> branch M.t) domain =
1621+
dir updatedb checked mop perms ma mv an ii branch domain =
16051622
if morello then
16061623
lift_morello mop perms ma mv dir an ii branch
16071624
else
@@ -1631,19 +1648,6 @@ module Make
16311648
else
16321649
mop Access.VIR ma |> branch
16331650

1634-
(*
1635-
Arguments:
1636-
- rA: Base address register.
1637-
- dir: Access direction (Dir.R for reads, Dir.W for writes).
1638-
- updatedb: If true, update the Dirty Bit in table descriptors.
1639-
- checked: If true, perform memory tagging checks.
1640-
- mop: Function defining the memory operation.
1641-
- perms: Required permissions for Morello.
1642-
- ma: Virtual address to be accessed, represented as the value within the monad.
1643-
- mv: Value to be stored (for write operations), represented as the value in the monad.
1644-
- an: Annotation for the event structure.
1645-
- ii: Instruction metadata.
1646-
*)
16471651
let lift_memop rA (* Base address register *)
16481652
dir updatedb checked mop perms ma mv an ii =
16491653
let domain = DISide.Data in
@@ -4731,7 +4735,10 @@ Arguments:
47314735
let cand_a = base + offset in
47324736
let cand_i = match IntMap.find cand_a test.Test_herd.code_segment with
47334737
| (_,(_,i)::_) -> i
4734-
| _ -> Warn.user_error "Instruction not found by the address %d" cand_a (* this case means that we have found a relevant page, but it does not have an instruction -- it may make sense to use NOP here rather than throw an error *)
4738+
(* this case means that we have found a relevant page, but it
4739+
does not have an instruction -- currently throws an error, but
4740+
a convention to assume NOP could be envisioned *)
4741+
| _ -> Warn.user_error "Instruction not found by the address %d" cand_a
47354742
in
47364743
cand_i)
47374744
|> InstrSet.of_list

herd/loader.ml

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -114,7 +114,9 @@ struct
114114
let offset = new_addr - old_addr in
115115
let immbranch_v = Option.get (A.mk_imm_branch offset) in
116116
let immbranch_sz = A.size_of_ins immbranch_v in
117-
assert (offset mod 4 = 0); (* FIXME: this check will fail when page alignment is implemented on architectures where instructions are not all 32-bit-sized *)
117+
(* NOTE: the following check will fail once page alignment is implemented on
118+
architectures where instructions are not all 32-bit-sized *)
119+
assert (offset mod 4 = 0);
118120
if offset == 0 then
119121
[]
120122
else if offset == immbranch_sz then

herd/mem.ml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1329,7 +1329,7 @@ let match_reg_events es =
13291329
with
13301330
| Some (V.Var _) -> true
13311331
| Some (V.Val (Symbolic (Virtual {name=n;_}))) when Symbol.is_label n -> true
1332-
| Some (V.Val (Symbolic (Physical (s,_)))) when (s |> Symbol.of_string |> Symbol.is_label) -> true (* FIXME: this benefits from a proper exposition of a label as a physical address *)
1332+
| Some (V.Val (Symbolic (Physical (s,_)))) when (s |> Symbol.of_string |> Symbol.is_label) -> true
13331333
| Some _|None -> false
13341334
in
13351335
let is_to_instr_ttd e =

herd/semExtra.ml

Lines changed: 0 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -91,8 +91,6 @@ module type S = sig
9191
(* "Exposed" TTDs of code pages, i.e. TTDs whose addresses are in registers *)
9292
(* In initial state *)
9393
val get_exposed_codepages : test -> (A.V.Cst.Scalar.t, A.V.Cst.PteVal.t, A.V.Cst.AddrReg.t, A.instruction) Constant.t list
94-
(* "Exposed" TTDs, i.e. TTDs whose values are in registers *)
95-
val get_exposed_codepage_mappings : test -> (A.V.Cst.Scalar.t, A.V.Cst.PteVal.t, A.V.Cst.AddrReg.t, A.instruction) Constant.t list
9694

9795
type event = E.event
9896
type event_structure = E.event_structure
@@ -362,25 +360,6 @@ module Make(C:Config) (A:Arch_herd.S) (Act:Action.S with module A = A)
362360
)
363361
st []
364362

365-
let get_exposed_codepage_mappings test =
366-
let { Test_herd.init_state=st; _ } = test in
367-
A.state_fold
368-
(fun _ v k ->
369-
match v with
370-
| V.Val (Constant.PteVal pte_v) -> begin
371-
match V.Cst.PteVal.as_physical pte_v with
372-
| Some str -> begin
373-
match Misc.str_as_label str with
374-
| Some (proc, lblname) ->
375-
(Constant.mk_sym_virtual_label_with_offset proc lblname 0)::k
376-
| None -> k
377-
end
378-
| None -> k
379-
end
380-
| V.Val _ | V.Var _ -> k)
381-
st []
382-
383-
384363
(**********)
385364
(* Events *)
386365
(**********)

0 commit comments

Comments
 (0)