@@ -405,6 +405,70 @@ struct drm_asahi_cmd_render {
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__u32 isp_bgobjvals ;
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};
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+ #define ASAHI_RENDER_UNK_UNK1 (1UL << 0)
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+ #define ASAHI_RENDER_UNK_SET_TILE_CONFIG (1UL << 1)
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+ #define ASAHI_RENDER_UNK_SET_UTILE_CONFIG (1UL << 2)
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+ #define ASAHI_RENDER_UNK_SET_AUX_FB_UNK (1UL << 3)
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+ #define ASAHI_RENDER_UNK_SET_G14_UNK (1UL << 4)
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+
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+ #define ASAHI_RENDER_UNK_SET_FRG_UNK_140 (1UL << 20)
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+ #define ASAHI_RENDER_UNK_SET_FRG_UNK_158 (1UL << 21)
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+ #define ASAHI_RENDER_UNK_SET_FRG_TILECFG (1UL << 22)
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+ #define ASAHI_RENDER_UNK_SET_LOAD_BGOBJVALS (1UL << 23)
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+ #define ASAHI_RENDER_UNK_SET_FRG_UNK_38 (1UL << 24)
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+ #define ASAHI_RENDER_UNK_SET_FRG_UNK_3C (1UL << 25)
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+ #define ASAHI_RENDER_UNK_SET_FRG_UNK_40 (1UL << 26)
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+ #define ASAHI_RENDER_UNK_SET_RELOAD_ZLSCTRL (1UL << 27)
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+ #define ASAHI_RENDER_UNK_SET_UNK_BUF_10 (1UL << 28)
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+ #define ASAHI_RENDER_UNK_SET_FRG_UNK_MASK (1UL << 29)
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+
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+ #define ASAHI_RENDER_UNK_SET_IOGPU_UNK54 (1UL << 40)
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+ #define ASAHI_RENDER_UNK_SET_IOGPU_UNK56 (1UL << 41)
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+ #define ASAHI_RENDER_UNK_SET_TILING_CONTROL (1UL << 42)
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+ #define ASAHI_RENDER_UNK_SET_TILING_CONTROL_2 (1UL << 43)
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+ #define ASAHI_RENDER_UNK_SET_VTX_UNK_F0 (1UL << 44)
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+ #define ASAHI_RENDER_UNK_SET_VTX_UNK_F8 (1UL << 45)
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+ #define ASAHI_RENDER_UNK_SET_VTX_UNK_118 (1UL << 46)
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+ #define ASAHI_RENDER_UNK_SET_VTX_UNK_MASK (1UL << 47)
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+
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+ #define ASAHI_RENDER_EXT_UNKNOWNS 0xff00
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+
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+ /* XXX: Do not upstream this struct */
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+ struct drm_asahi_cmd_render_unknowns {
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+ /** @type: Type ID of this extension */
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+ __u32 type ;
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+ __u32 pad ;
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+ /** @next: Pointer to the next extension struct, if any */
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+ __u64 next ;
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+
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+ __u64 flags ;
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+
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+ __u64 tile_config ;
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+ __u64 utile_config ;
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+
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+ __u64 aux_fb_unk ;
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+ __u64 g14_unk ;
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+ __u64 frg_unk_140 ;
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+ __u64 frg_unk_158 ;
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+ __u64 frg_tilecfg ;
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+ __u64 load_bgobjvals ;
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+ __u64 frg_unk_38 ;
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+ __u64 frg_unk_3c ;
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+ __u64 frg_unk_40 ;
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+ __u64 reload_zlsctrl ;
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+ __u64 unk_buf_10 ;
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+ __u64 frg_unk_mask ;
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+
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+ __u64 iogpu_unk54 ;
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+ __u64 iogpu_unk56 ;
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+ __u64 tiling_control ;
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+ __u64 tiling_control_2 ;
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+ __u64 vtx_unk_f0 ;
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+ __u64 vtx_unk_f8 ;
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+ __u64 vtx_unk_118 ;
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+ __u64 vtx_unk_mask ;
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+ };
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+
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struct drm_asahi_cmd_compute {
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__u64 flags ;
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@@ -415,10 +479,10 @@ struct drm_asahi_cmd_compute {
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__u32 attachment_count ;
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__u32 pad ;
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- __u64 buffer_descriptor ;
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+ __u64 helper_arg ;
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__u32 buffer_descriptor_size ; /* ? */
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- __u32 ctx_switch_prog ;
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+ __u32 helper_program ;
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__u32 encoder_id ;
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__u32 cmd_id ;
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