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hlorenzihlorenzi
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update nes example
1 parent 635c981 commit 3d61bc5

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3 files changed

+122
-69
lines changed

3 files changed

+122
-69
lines changed

‎examples/nes/cpu6502.asm‎

Lines changed: 96 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -15,33 +15,39 @@
1515
adc #{imm: i8 } => 0x69 @ imm
1616
adc <{zaddr: u8 } => 0x65 @ zaddr
1717
adc <{zaddr: u8 }, x => 0x75 @ zaddr
18-
adc {addr: u16} => 0x6d @ addr[7:0] @ addr[15:8]
19-
adc {addr: u16}, x => 0x7d @ addr[7:0] @ addr[15:8]
20-
adc {addr: u16}, y => 0x79 @ addr[7:0] @ addr[15:8]
18+
adc {zaddr: u8 } => 0x65 @ zaddr
19+
adc {zaddr: u8 }, x => 0x75 @ zaddr
20+
adc {addr: u16} => 0x6d @ le(addr)
21+
adc {addr: u16}, x => 0x7d @ le(addr)
22+
adc {addr: u16}, y => 0x79 @ le(addr)
2123
adc ({zaddr: u8 }, x) => 0x61 @ zaddr
2224
adc ({zaddr: u8 }), y => 0x71 @ zaddr
2325

24-
and #{imm: i8 } => 0x29 @ imm
26+
and #{imm: i8 } => 0x29 @ imm
2527
and <{zaddr: u8 } => 0x25 @ zaddr
2628
and <{zaddr: u8 }, x => 0x35 @ zaddr
27-
and {addr: u16} => 0x2d @ addr[7:0] @ addr[15:8]
28-
and {addr: u16}, x => 0x3d @ addr[7:0] @ addr[15:8]
29-
and {addr: u16}, y => 0x39 @ addr[7:0] @ addr[15:8]
29+
and {zaddr: u8 } => 0x25 @ zaddr
30+
and {zaddr: u8 }, x => 0x35 @ zaddr
31+
and {addr: u16} => 0x2d @ le(addr)
32+
and {addr: u16}, x => 0x3d @ le(addr)
33+
and {addr: u16}, y => 0x39 @ le(addr)
3034
and ({zaddr: u8 }, x) => 0x21 @ zaddr
3135
and ({zaddr: u8 }), y => 0x31 @ zaddr
3236

3337
asl a => 0x0a
3438
asl <{zaddr: u8 } => 0x07 @ zaddr
3539
asl <{zaddr: u8 }, x => 0x16 @ zaddr
36-
asl {addr: u16} => 0x0e @ addr[7:0] @ addr[15:8]
37-
asl {addr: u16}, x => 0x1e @ addr[7:0] @ addr[15:8]
40+
asl {zaddr: u8 } => 0x07 @ zaddr
41+
asl {zaddr: u8 }, x => 0x16 @ zaddr
42+
asl {addr: u16} => 0x0e @ le(addr)
43+
asl {addr: u16}, x => 0x1e @ le(addr)
3844

3945
bcc {addr: cpu6502_reladdr} => 0x90 @ addr
4046
bcs {addr: cpu6502_reladdr} => 0x80 @ addr
4147
beq {addr: cpu6502_reladdr} => 0xf0 @ addr
4248

4349
bit <{zaddr: u8 } => 0x24 @ zaddr
44-
bit {addr: u16} => 0x2C @ addr[7:0] @ addr[15:8]
50+
bit {addr: u16} => 0x2C @ le(addr)
4551

4652
bmi {addr: cpu6502_reladdr} => 0x30 @ addr
4753
bne {addr: cpu6502_reladdr} => 0xd0 @ addr
@@ -57,88 +63,108 @@
5763
cli => 0x58
5864
clv => 0xb8
5965

60-
cmp #{imm: i8 } => 0xc9 @ imm
66+
cmp #{imm: i8 } => 0xc9 @ imm
6167
cmp <{zaddr: u8 } => 0xc5 @ zaddr
6268
cmp <{zaddr: u8 }, x => 0xd5 @ zaddr
63-
cmp {addr: u16} => 0xcd @ addr[7:0] @ addr[15:8]
64-
cmp {addr: u16}, x => 0xdd @ addr[7:0] @ addr[15:8]
65-
cmp {addr: u16}, y => 0xd9 @ addr[7:0] @ addr[15:8]
69+
cmp {zaddr: u8 } => 0xc5 @ zaddr
70+
cmp {zaddr: u8 }, x => 0xd5 @ zaddr
71+
cmp {addr: u16} => 0xcd @ le(addr)
72+
cmp {addr: u16}, x => 0xdd @ le(addr)
73+
cmp {addr: u16}, y => 0xd9 @ le(addr)
6674
cmp ({zaddr: u8 }, x) => 0xc1 @ zaddr
6775
cmp ({zaddr: u8 }), y => 0xd1 @ zaddr
6876

69-
cpx #{imm: i8 } => 0xe0 @ imm
77+
cpx #{imm: i8 } => 0xe0 @ imm
7078
cpx <{zaddr: u8 } => 0xe4 @ zaddr
71-
cpx {addr: u16} => 0xec @ addr[7:0] @ addr[15:8]
79+
cpx {zaddr: u8 } => 0xe4 @ zaddr
80+
cpx {addr: u16} => 0xec @ le(addr)
7281

73-
cpy #{imm: i8 } => 0xc0 @ imm
82+
cpy #{imm: i8 } => 0xc0 @ imm
7483
cpy <{zaddr: u8 } => 0xc4 @ zaddr
75-
cpy {addr: u16} => 0xcc @ addr[7:0] @ addr[15:8]
84+
cpy {zaddr: u8 } => 0xc4 @ zaddr
85+
cpy {addr: u16} => 0xcc @ le(addr)
7686

7787
dec <{zaddr: u8 } => 0xc6 @ zaddr
7888
dec <{zaddr: u8 }, x => 0xd6 @ zaddr
79-
dec {addr: u16} => 0xce @ addr[7:0] @ addr[15:8]
80-
dec {addr: u16}, x => 0xde @ addr[7:0] @ addr[15:8]
89+
dec {zaddr: u8 } => 0xc6 @ zaddr
90+
dec {zaddr: u8 }, x => 0xd6 @ zaddr
91+
dec {addr: u16} => 0xce @ le(addr)
92+
dec {addr: u16}, x => 0xde @ le(addr)
8193

8294
dex => 0xca
8395
dey => 0x88
8496

85-
eor #{imm: i8 } => 0x49 @ imm
97+
eor #{imm: i8 } => 0x49 @ imm
8698
eor <{zaddr: u8 } => 0x45 @ zaddr
8799
eor <{zaddr: u8 }, x => 0x55 @ zaddr
88-
eor {addr: u16} => 0x4d @ addr[7:0] @ addr[15:8]
89-
eor {addr: u16}, x => 0x5d @ addr[7:0] @ addr[15:8]
90-
eor {addr: u16}, y => 0x59 @ addr[7:0] @ addr[15:8]
100+
eor {zaddr: u8 } => 0x45 @ zaddr
101+
eor {zaddr: u8 }, x => 0x55 @ zaddr
102+
eor {addr: u16} => 0x4d @ le(addr)
103+
eor {addr: u16}, x => 0x5d @ le(addr)
104+
eor {addr: u16}, y => 0x59 @ le(addr)
91105
eor ({zaddr: u8 }, x) => 0x41 @ zaddr
92106
eor ({zaddr: u8 }), y => 0x51 @ zaddr
93107

94108
inc <{zaddr: u8 } => 0xe6 @ zaddr
95109
inc <{zaddr: u8 }, x => 0xf6 @ zaddr
96-
inc {addr: u16} => 0xee @ addr[7:0] @ addr[15:8]
97-
inc {addr: u16}, x => 0xfe @ addr[7:0] @ addr[15:8]
110+
inc {zaddr: u8 } => 0xe6 @ zaddr
111+
inc {zaddr: u8 }, x => 0xf6 @ zaddr
112+
inc {addr: u16} => 0xee @ le(addr)
113+
inc {addr: u16}, x => 0xfe @ le(addr)
98114

99115
inx => 0xe8
100116
iny => 0xc8
101117

102-
jmp {addr: u16} => 0x4c @ addr[7:0] @ addr[15:8]
103-
jmp ({addr: u16}) => 0x6c @ addr[7:0] @ addr[15:8]
118+
jmp {addr: u16} => 0x4c @ le(addr)
119+
jmp ({addr: u16}) => 0x6c @ le(addr)
104120

105-
jsr {addr: u16} => 0x20 @ addr[7:0] @ addr[15:8]
121+
jsr {addr: u16} => 0x20 @ le(addr)
106122

107-
lda #{imm: i8 } => 0xa9 @ imm
123+
lda #{imm: i8 } => 0xa9 @ imm
108124
lda <{zaddr: u8 } => 0xa5 @ zaddr
109125
lda <{zaddr: u8 }, x => 0xb5 @ zaddr
110-
lda {addr: u16} => 0xad @ addr[7:0] @ addr[15:8]
111-
lda {addr: u16}, x => 0xbd @ addr[7:0] @ addr[15:8]
112-
lda {addr: u16}, y => 0xb9 @ addr[7:0] @ addr[15:8]
126+
lda {zaddr: u8 } => 0xa5 @ zaddr
127+
lda {zaddr: u8 }, x => 0xb5 @ zaddr
128+
lda {addr: u16} => 0xad @ le(addr)
129+
lda {addr: u16}, x => 0xbd @ le(addr)
130+
lda {addr: u16}, y => 0xb9 @ le(addr)
113131
lda ({zaddr: u8 }, x) => 0xa1 @ zaddr
114132
lda ({zaddr: u8 }), y => 0xb1 @ zaddr
115133

116-
ldx #{imm: i8 } => 0xa2 @ imm
134+
ldx #{imm: i8 } => 0xa2 @ imm
117135
ldx <{zaddr: u8 } => 0xa6 @ zaddr
118136
ldx <{zaddr: u8 }, y => 0xb6 @ zaddr
119-
ldx {addr: u16} => 0xae @ addr[7:0] @ addr[15:8]
120-
ldx {addr: u16}, y => 0xbe @ addr[7:0] @ addr[15:8]
137+
ldx {zaddr: u8 } => 0xa6 @ zaddr
138+
ldx {zaddr: u8 }, y => 0xb6 @ zaddr
139+
ldx {addr: u16} => 0xae @ le(addr)
140+
ldx {addr: u16}, y => 0xbe @ le(addr)
121141

122-
ldy #{imm: i8 } => 0xa0 @ imm
142+
ldy #{imm: i8 } => 0xa0 @ imm
123143
ldy <{zaddr: u8 } => 0xa4 @ zaddr
124144
ldy <{zaddr: u8 }, x => 0xb4 @ zaddr
125-
ldy {addr: u16} => 0xac @ addr[7:0] @ addr[15:8]
126-
ldy {addr: u16}, x => 0xbc @ addr[7:0] @ addr[15:8]
145+
ldy {zaddr: u8 } => 0xa4 @ zaddr
146+
ldy {zaddr: u8 }, x => 0xb4 @ zaddr
147+
ldy {addr: u16} => 0xac @ le(addr)
148+
ldy {addr: u16}, x => 0xbc @ le(addr)
127149

128150
lsr a => 0x4a
129151
lsr <{zaddr: u8 } => 0x46 @ zaddr
130152
lsr <{zaddr: u8 }, x => 0x56 @ zaddr
131-
lsr {addr: u16} => 0x4e @ addr[7:0] @ addr[15:8]
132-
lsr {addr: u16}, x => 0x5e @ addr[7:0] @ addr[15:8]
153+
lsr {zaddr: u8 } => 0x46 @ zaddr
154+
lsr {zaddr: u8 }, x => 0x56 @ zaddr
155+
lsr {addr: u16} => 0x4e @ le(addr)
156+
lsr {addr: u16}, x => 0x5e @ le(addr)
133157

134158
nop => 0xea
135159

136-
ora #{imm: i8 } => 0x09 @ imm
160+
ora #{imm: i8 } => 0x09 @ imm
137161
ora <{zaddr: u8 } => 0x05 @ zaddr
138162
ora <{zaddr: u8 }, x => 0x15 @ zaddr
139-
ora {addr: u16} => 0x0d @ addr[7:0] @ addr[15:8]
140-
ora {addr: u16}, x => 0x1d @ addr[7:0] @ addr[15:8]
141-
ora {addr: u16}, y => 0x19 @ addr[7:0] @ addr[15:8]
163+
ora {zaddr: u8 } => 0x05 @ zaddr
164+
ora {zaddr: u8 }, x => 0x15 @ zaddr
165+
ora {addr: u16} => 0x0d @ le(addr)
166+
ora {addr: u16}, x => 0x1d @ le(addr)
167+
ora {addr: u16}, y => 0x19 @ le(addr)
142168
ora ({zaddr: u8 }, x) => 0x01 @ zaddr
143169
ora ({zaddr: u8 }), y => 0x11 @ zaddr
144170

@@ -150,24 +176,30 @@
150176
rol a => 0x2a
151177
rol <{zaddr: u8 } => 0x26 @ zaddr
152178
rol <{zaddr: u8 }, x => 0x36 @ zaddr
153-
rol {addr: u16} => 0x2e @ addr[7:0] @ addr[15:8]
154-
rol {addr: u16}, x => 0x3e @ addr[7:0] @ addr[15:8]
179+
rol {zaddr: u8 } => 0x26 @ zaddr
180+
rol {zaddr: u8 }, x => 0x36 @ zaddr
181+
rol {addr: u16} => 0x2e @ le(addr)
182+
rol {addr: u16}, x => 0x3e @ le(addr)
155183
156184
ror a => 0x6a
157185
ror <{zaddr: u8 } => 0x66 @ zaddr
158186
ror <{zaddr: u8 }, x => 0x76 @ zaddr
159-
ror {addr: u16} => 0x6e @ addr[7:0] @ addr[15:8]
160-
ror {addr: u16}, x => 0x7e @ addr[7:0] @ addr[15:8]
187+
ror {zaddr: u8 } => 0x66 @ zaddr
188+
ror {zaddr: u8 }, x => 0x76 @ zaddr
189+
ror {addr: u16} => 0x6e @ le(addr)
190+
ror {addr: u16}, x => 0x7e @ le(addr)
161191

162192
rti => 0x40
163193
rts => 0x60
164194

165-
sbc #{imm: i8 } => 0xe9 @ imm
195+
sbc #{imm: i8 } => 0xe9 @ imm
166196
sbc <{zaddr: u8 } => 0xe5 @ zaddr
167197
sbc <{zaddr: u8 }, x => 0xf5 @ zaddr
168-
sbc {addr: u16} => 0xed @ addr[7:0] @ addr[15:8]
169-
sbc {addr: u16}, x => 0xfd @ addr[7:0] @ addr[15:8]
170-
sbc {addr: u16}, y => 0xf9 @ addr[7:0] @ addr[15:8]
198+
sbc {zaddr: u8 } => 0xe5 @ zaddr
199+
sbc {zaddr: u8 }, x => 0xf5 @ zaddr
200+
sbc {addr: u16} => 0xed @ le(addr)
201+
sbc {addr: u16}, x => 0xfd @ le(addr)
202+
sbc {addr: u16}, y => 0xf9 @ le(addr)
171203
sbc ({zaddr: u8 }, x) => 0xe1 @ zaddr
172204
sbc ({zaddr: u8 }), y => 0xf1 @ zaddr
173205

@@ -177,19 +209,25 @@
177209

178210
sta <{zaddr: u8 } => 0x85 @ zaddr
179211
sta <{zaddr: u8 }, x => 0x95 @ zaddr
180-
sta {addr: u16} => 0x8d @ addr[7:0] @ addr[15:8]
181-
sta {addr: u16}, x => 0x9d @ addr[7:0] @ addr[15:8]
182-
sta {addr: u16}, y => 0x99 @ addr[7:0] @ addr[15:8]
212+
sta {zaddr: u8 } => 0x85 @ zaddr
213+
sta {zaddr: u8 }, x => 0x95 @ zaddr
214+
sta {addr: u16} => 0x8d @ le(addr)
215+
sta {addr: u16}, x => 0x9d @ le(addr)
216+
sta {addr: u16}, y => 0x99 @ le(addr)
183217
sta ({zaddr: u8 }, x) => 0x81 @ zaddr
184218
sta ({zaddr: u8 }), y => 0x91 @ zaddr
185219

186220
stx <{zaddr: u8 } => 0x86 @ zaddr
187221
stx <{zaddr: u8 }, y => 0x96 @ zaddr
188-
stx {addr: u16} => 0x8e @ addr[7:0] @ addr[15:8]
222+
stx {zaddr: u8 } => 0x86 @ zaddr
223+
stx {zaddr: u8 }, y => 0x96 @ zaddr
224+
stx {addr: u16} => 0x8e @ le(addr)
189225

190226
sty <{zaddr: u8 } => 0x84 @ zaddr
191227
sty <{zaddr: u8 }, x => 0x94 @ zaddr
192-
sty {addr: u16} => 0x8c @ addr[7:0] @ addr[15:8]
228+
sty {zaddr: u8 } => 0x84 @ zaddr
229+
sty {zaddr: u8 }, x => 0x94 @ zaddr
230+
sty {addr: u16} => 0x8c @ le(addr)
193231

194232
tax => 0xaa
195233
tay => 0xa8

‎examples/nes/main.asm‎

Lines changed: 23 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,10 @@ reset:
5757
.vblankwait2:
5858
bit PPU_STATUS
5959
bpl .vblankwait2
60+
61+
; load first palette color
62+
lda 0x0d
63+
jsr loadPalette
6064

6165
; enable rendering
6266
lda #PPU_MASK_SHOWBKG | PPU_MASK_LEFTBKG
@@ -83,16 +87,9 @@ nmi:
8387
sta varTimer
8488

8589
; update background color
86-
lda PPU_STATUS
87-
88-
lda #VRAM_PALETTE[15:8]
89-
sta PPU_ADDR
90-
lda #VRAM_PALETTE[7:0]
91-
sta PPU_ADDR
92-
9390
ldx varPaletteIndex
9491
lda palette, x
95-
sta PPU_DATA
92+
jsr loadPalette
9693

9794
; increment palette index
9895
inc varPaletteIndex
@@ -107,7 +104,25 @@ nmi:
107104
.end:
108105
irq:
109106
rti
107+
108+
109+
loadPalette:
110+
; store color from A in all palette slots
111+
ldx PPU_STATUS
112+
113+
ldx #VRAM_PALETTE[15:8]
114+
stx PPU_ADDR
115+
ldx #VRAM_PALETTE[7:0]
116+
stx PPU_ADDR
110117

118+
ldy #0x20
119+
.palleteLoop:
120+
sta PPU_DATA
121+
dey
122+
bne .palleteLoop
123+
124+
rts
125+
111126

112127
palette:
113128
#d8 0x0d, 0x01, 0x12, 0x21, 0x31, 0x21, 0x12, 0x01, 0x0d ; blues

‎src/test/examples.rs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,9 @@ fn test_nes_example()
2828
test_example(
2929
"examples/nes/main.asm",
3030
&[
31-
194, 190, 155, 144, 20, 50, 124, 170, 98, 249,
32-
99, 13, 159, 227, 169, 45, 203, 83, 54, 116, 56,
33-
113, 142, 114, 183, 67, 237, 97, 156, 21, 234, 191
31+
226, 68, 213, 226, 71, 200, 16, 113, 21, 132,
32+
193, 34, 10, 134, 112, 238, 69, 165, 45, 199, 40,
33+
151, 195, 76, 157, 120, 172, 169, 37, 180, 123, 104
3434
]);
3535
}
3636

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