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[X86] Use X86 check prefix for 32-bit instead of X32 in tail call tests. NFC.
X32 is supposed to be used for gnux32 test coverage
1 parent 980a7e7 commit 2de0c92

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+101
-101
lines changed

3 files changed

+101
-101
lines changed

‎llvm/test/CodeGen/X86/musttail-tailcc.ll‎

Lines changed: 34 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
33
; RUN: llc < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=X64
4-
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32
4+
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
55

66
; tailcc will turn all of these musttail calls into tail calls.
77

@@ -12,9 +12,9 @@ define dso_local tailcc i32 @tailcaller(i32 %in1, i32 %in2) nounwind {
1212
; X64: # %bb.0: # %entry
1313
; X64-NEXT: jmp tailcallee # TAILCALL
1414
;
15-
; X32-LABEL: tailcaller:
16-
; X32: # %bb.0: # %entry
17-
; X32-NEXT: jmp tailcallee # TAILCALL
15+
; X86-LABEL: tailcaller:
16+
; X86: # %bb.0: # %entry
17+
; X86-NEXT: jmp tailcallee # TAILCALL
1818
entry:
1919
%tmp11 = musttail call tailcc i32 @tailcallee(i32 %in1, i32 %in2)
2020
ret i32 %tmp11
@@ -27,9 +27,9 @@ define tailcc noalias ptr @noalias_caller() nounwind {
2727
; X64: # %bb.0:
2828
; X64-NEXT: jmp alias_callee # TAILCALL
2929
;
30-
; X32-LABEL: noalias_caller:
31-
; X32: # %bb.0:
32-
; X32-NEXT: jmp alias_callee # TAILCALL
30+
; X86-LABEL: noalias_caller:
31+
; X86: # %bb.0:
32+
; X86-NEXT: jmp alias_callee # TAILCALL
3333
%p = musttail call tailcc ptr @alias_callee()
3434
ret ptr %p
3535
}
@@ -41,9 +41,9 @@ define dso_local tailcc ptr @alias_caller() nounwind {
4141
; X64: # %bb.0:
4242
; X64-NEXT: jmp noalias_callee # TAILCALL
4343
;
44-
; X32-LABEL: alias_caller:
45-
; X32: # %bb.0:
46-
; X32-NEXT: jmp noalias_callee # TAILCALL
44+
; X86-LABEL: alias_caller:
45+
; X86: # %bb.0:
46+
; X86-NEXT: jmp noalias_callee # TAILCALL
4747
%p = musttail call tailcc noalias ptr @noalias_callee()
4848
ret ptr %p
4949
}
@@ -53,18 +53,18 @@ define dso_local tailcc void @void_test(i32, i32, i32, i32) {
5353
; X64: # %bb.0: # %entry
5454
; X64-NEXT: jmp void_test # TAILCALL
5555
;
56-
; X32-LABEL: void_test:
57-
; X32: # %bb.0: # %entry
58-
; X32-NEXT: pushl %esi
59-
; X32-NEXT: .cfi_def_cfa_offset 8
60-
; X32-NEXT: .cfi_offset %esi, -8
61-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
62-
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
63-
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp)
64-
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
65-
; X32-NEXT: popl %esi
66-
; X32-NEXT: .cfi_def_cfa_offset 4
67-
; X32-NEXT: jmp void_test # TAILCALL
56+
; X86-LABEL: void_test:
57+
; X86: # %bb.0: # %entry
58+
; X86-NEXT: pushl %esi
59+
; X86-NEXT: .cfi_def_cfa_offset 8
60+
; X86-NEXT: .cfi_offset %esi, -8
61+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
62+
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
63+
; X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
64+
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
65+
; X86-NEXT: popl %esi
66+
; X86-NEXT: .cfi_def_cfa_offset 4
67+
; X86-NEXT: jmp void_test # TAILCALL
6868
entry:
6969
musttail call tailcc void @void_test( i32 %0, i32 %1, i32 %2, i32 %3)
7070
ret void
@@ -75,18 +75,18 @@ define dso_local tailcc i1 @i1test(i32, i32, i32, i32) {
7575
; X64: # %bb.0: # %entry
7676
; X64-NEXT: jmp i1test # TAILCALL
7777
;
78-
; X32-LABEL: i1test:
79-
; X32: # %bb.0: # %entry
80-
; X32-NEXT: pushl %esi
81-
; X32-NEXT: .cfi_def_cfa_offset 8
82-
; X32-NEXT: .cfi_offset %esi, -8
83-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
84-
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
85-
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp)
86-
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
87-
; X32-NEXT: popl %esi
88-
; X32-NEXT: .cfi_def_cfa_offset 4
89-
; X32-NEXT: jmp i1test # TAILCALL
78+
; X86-LABEL: i1test:
79+
; X86: # %bb.0: # %entry
80+
; X86-NEXT: pushl %esi
81+
; X86-NEXT: .cfi_def_cfa_offset 8
82+
; X86-NEXT: .cfi_offset %esi, -8
83+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
84+
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
85+
; X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
86+
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
87+
; X86-NEXT: popl %esi
88+
; X86-NEXT: .cfi_def_cfa_offset 4
89+
; X86-NEXT: jmp i1test # TAILCALL
9090
entry:
9191
%4 = musttail call tailcc i1 @i1test( i32 %0, i32 %1, i32 %2, i32 %3)
9292
ret i1 %4

‎llvm/test/CodeGen/X86/tailcall-tailcc.ll‎

Lines changed: 54 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
33
; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s -check-prefix=UEFI64
44
; RUN: llc < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=UEFI64
5-
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32
5+
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
66

77
; With -tailcallopt, CodeGen guarantees a tail call optimization
88
; for all of these.
@@ -26,15 +26,15 @@ define dso_local tailcc i32 @tailcaller(i32 %in1, i32 %in2) nounwind {
2626
; UEFI64-NEXT: addq $40, %rsp
2727
; UEFI64-NEXT: jmp tailcallee # TAILCALL
2828
;
29-
; X32-LABEL: tailcaller:
30-
; X32: # %bb.0: # %entry
31-
; X32-NEXT: subl $16, %esp
32-
; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
33-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
34-
; X32-NEXT: movl %edx, {{[0-9]+}}(%esp)
35-
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
36-
; X32-NEXT: addl $8, %esp
37-
; X32-NEXT: jmp tailcallee # TAILCALL
29+
; X86-LABEL: tailcaller:
30+
; X86: # %bb.0: # %entry
31+
; X86-NEXT: subl $16, %esp
32+
; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
33+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
34+
; X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
35+
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
36+
; X86-NEXT: addl $8, %esp
37+
; X86-NEXT: jmp tailcallee # TAILCALL
3838
entry:
3939
%tmp11 = tail call tailcc i32 @tailcallee(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
4040
ret i32 %tmp11
@@ -53,9 +53,9 @@ define tailcc noalias ptr @noalias_caller() nounwind {
5353
; UEFI64: # %bb.0:
5454
; UEFI64-NEXT: jmp alias_callee # TAILCALL
5555
;
56-
; X32-LABEL: noalias_caller:
57-
; X32: # %bb.0:
58-
; X32-NEXT: jmp alias_callee # TAILCALL
56+
; X86-LABEL: noalias_caller:
57+
; X86: # %bb.0:
58+
; X86-NEXT: jmp alias_callee # TAILCALL
5959
%p = tail call tailcc ptr @alias_callee()
6060
ret ptr %p
6161
}
@@ -73,9 +73,9 @@ define dso_local tailcc ptr @alias_caller() nounwind {
7373
; UEFI64: # %bb.0:
7474
; UEFI64-NEXT: jmp noalias_callee # TAILCALL
7575
;
76-
; X32-LABEL: alias_caller:
77-
; X32: # %bb.0:
78-
; X32-NEXT: jmp noalias_callee # TAILCALL
76+
; X86-LABEL: alias_caller:
77+
; X86: # %bb.0:
78+
; X86-NEXT: jmp noalias_callee # TAILCALL
7979
%p = tail call tailcc noalias ptr @noalias_callee()
8080
ret ptr %p
8181
}
@@ -93,9 +93,9 @@ define dso_local tailcc i32 @ret_undef() nounwind {
9393
; UEFI64: # %bb.0:
9494
; UEFI64-NEXT: jmp i32_callee # TAILCALL
9595
;
96-
; X32-LABEL: ret_undef:
97-
; X32: # %bb.0:
98-
; X32-NEXT: jmp i32_callee # TAILCALL
96+
; X86-LABEL: ret_undef:
97+
; X86: # %bb.0:
98+
; X86-NEXT: jmp i32_callee # TAILCALL
9999
%p = tail call tailcc i32 @i32_callee()
100100
ret i32 undef
101101
}
@@ -113,9 +113,9 @@ define dso_local tailcc i32 @noret() nounwind {
113113
; UEFI64: # %bb.0:
114114
; UEFI64-NEXT: jmp does_not_return # TAILCALL
115115
;
116-
; X32-LABEL: noret:
117-
; X32: # %bb.0:
118-
; X32-NEXT: jmp does_not_return # TAILCALL
116+
; X86-LABEL: noret:
117+
; X86: # %bb.0:
118+
; X86-NEXT: jmp does_not_return # TAILCALL
119119
tail call tailcc void @does_not_return()
120120
unreachable
121121
}
@@ -139,22 +139,22 @@ define dso_local tailcc void @void_test(i32, i32, i32, i32) {
139139
; UEFI64-NEXT: .seh_endepilogue
140140
; UEFI64-NEXT: jmp void_test # TAILCALL
141141
;
142-
; X32-LABEL: void_test:
143-
; X32: # %bb.0: # %entry
144-
; X32-NEXT: pushl %esi
145-
; X32-NEXT: .cfi_def_cfa_offset 8
146-
; X32-NEXT: subl $8, %esp
147-
; X32-NEXT: .cfi_def_cfa_offset 16
148-
; X32-NEXT: .cfi_offset %esi, -8
149-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
150-
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
151-
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp)
152-
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
153-
; X32-NEXT: addl $8, %esp
154-
; X32-NEXT: .cfi_def_cfa_offset 8
155-
; X32-NEXT: popl %esi
156-
; X32-NEXT: .cfi_def_cfa_offset 4
157-
; X32-NEXT: jmp void_test # TAILCALL
142+
; X86-LABEL: void_test:
143+
; X86: # %bb.0: # %entry
144+
; X86-NEXT: pushl %esi
145+
; X86-NEXT: .cfi_def_cfa_offset 8
146+
; X86-NEXT: subl $8, %esp
147+
; X86-NEXT: .cfi_def_cfa_offset 16
148+
; X86-NEXT: .cfi_offset %esi, -8
149+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
150+
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
151+
; X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
152+
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
153+
; X86-NEXT: addl $8, %esp
154+
; X86-NEXT: .cfi_def_cfa_offset 8
155+
; X86-NEXT: popl %esi
156+
; X86-NEXT: .cfi_def_cfa_offset 4
157+
; X86-NEXT: jmp void_test # TAILCALL
158158
entry:
159159
tail call tailcc void @void_test( i32 %0, i32 %1, i32 %2, i32 %3)
160160
ret void
@@ -179,22 +179,22 @@ define dso_local tailcc i1 @i1test(i32, i32, i32, i32) {
179179
; UEFI64-NEXT: .seh_endepilogue
180180
; UEFI64-NEXT: jmp i1test # TAILCALL
181181
;
182-
; X32-LABEL: i1test:
183-
; X32: # %bb.0: # %entry
184-
; X32-NEXT: pushl %esi
185-
; X32-NEXT: .cfi_def_cfa_offset 8
186-
; X32-NEXT: subl $8, %esp
187-
; X32-NEXT: .cfi_def_cfa_offset 16
188-
; X32-NEXT: .cfi_offset %esi, -8
189-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
190-
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
191-
; X32-NEXT: movl %esi, {{[0-9]+}}(%esp)
192-
; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
193-
; X32-NEXT: addl $8, %esp
194-
; X32-NEXT: .cfi_def_cfa_offset 8
195-
; X32-NEXT: popl %esi
196-
; X32-NEXT: .cfi_def_cfa_offset 4
197-
; X32-NEXT: jmp i1test # TAILCALL
182+
; X86-LABEL: i1test:
183+
; X86: # %bb.0: # %entry
184+
; X86-NEXT: pushl %esi
185+
; X86-NEXT: .cfi_def_cfa_offset 8
186+
; X86-NEXT: subl $8, %esp
187+
; X86-NEXT: .cfi_def_cfa_offset 16
188+
; X86-NEXT: .cfi_offset %esi, -8
189+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
190+
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
191+
; X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
192+
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
193+
; X86-NEXT: addl $8, %esp
194+
; X86-NEXT: .cfi_def_cfa_offset 8
195+
; X86-NEXT: popl %esi
196+
; X86-NEXT: .cfi_def_cfa_offset 4
197+
; X86-NEXT: jmp i1test # TAILCALL
198198
entry:
199199
%4 = tail call tailcc i1 @i1test( i32 %0, i32 %1, i32 %2, i32 %3)
200200
ret i1 %4

‎llvm/test/CodeGen/X86/tailcc-fastcc.ll‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -tailcallopt < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
33
; RUN: llc -tailcallopt < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=UEFI64
4-
; RUN: llc -tailcallopt < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32
4+
; RUN: llc -tailcallopt < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
55

66
; llc -tailcallopt should not enable tail calls from fastcc to tailcc or vice versa
77

@@ -24,12 +24,12 @@ define fastcc i32 @tailcaller1(i32 %in1, i32 %in2) nounwind {
2424
; UEFI64-NEXT: callq tailcallee1
2525
; UEFI64-NEXT: retq $40
2626
;
27-
; X32-LABEL: tailcaller1:
28-
; X32: # %bb.0: # %entry
29-
; X32-NEXT: pushl %edx
30-
; X32-NEXT: pushl %ecx
31-
; X32-NEXT: calll tailcallee1@PLT
32-
; X32-NEXT: retl
27+
; X86-LABEL: tailcaller1:
28+
; X86: # %bb.0: # %entry
29+
; X86-NEXT: pushl %edx
30+
; X86-NEXT: pushl %ecx
31+
; X86-NEXT: calll tailcallee1@PLT
32+
; X86-NEXT: retl
3333
entry:
3434
%tmp11 = tail call tailcc i32 @tailcallee1(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
3535
ret i32 %tmp11
@@ -54,12 +54,12 @@ define tailcc i32 @tailcaller2(i32 %in1, i32 %in2) nounwind {
5454
; UEFI64-NEXT: callq tailcallee2
5555
; UEFI64-NEXT: retq $40
5656
;
57-
; X32-LABEL: tailcaller2:
58-
; X32: # %bb.0: # %entry
59-
; X32-NEXT: pushl %edx
60-
; X32-NEXT: pushl %ecx
61-
; X32-NEXT: calll tailcallee2@PLT
62-
; X32-NEXT: retl
57+
; X86-LABEL: tailcaller2:
58+
; X86: # %bb.0: # %entry
59+
; X86-NEXT: pushl %edx
60+
; X86-NEXT: pushl %ecx
61+
; X86-NEXT: calll tailcallee2@PLT
62+
; X86-NEXT: retl
6363
entry:
6464
%tmp11 = tail call fastcc i32 @tailcallee2(i32 %in1, i32 %in2, i32 %in1, i32 %in2)
6565
ret i32 %tmp11

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