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mandlebugHoney Goyal
mandlebug
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Honey Goyal
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Fix VarArgs FixedStack object on AIX. (llvm#170240)
Create a mutable aliased fixed stack object for the va_list when any of the optional arguments are passed in gprs. Since we need to spill the gpr registers into the parameter save area the stack object is not immutable, and since the values will almost certainly be accessed through the IR value for a va_list make the stack object aliased as well.
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8 files changed

+90
-70
lines changed

8 files changed

+90
-70
lines changed

‎llvm/lib/Target/PowerPC/PPCISelLowering.cpp‎

Lines changed: 28 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -7392,9 +7392,27 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
73927392
FuncInfo->setMinReservedArea(CallerReservedArea);
73937393

73947394
if (isVarArg) {
7395-
FuncInfo->setVarArgsFrameIndex(
7396-
MFI.CreateFixedObject(PtrByteSize, CCInfo.getStackSize(), true));
7397-
SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
7395+
int VAListIndex = 0;
7396+
// If any of the optional arguments are passed in register then the fixed
7397+
// stack object we spill into is not immutable. Create a fixed stack object
7398+
// that overlaps the remainder of the parameter save area.
7399+
if (CCInfo.getStackSize() < (LinkageSize + MinParameterSaveArea)) {
7400+
unsigned FixedStackSize =
7401+
LinkageSize + MinParameterSaveArea - CCInfo.getStackSize();
7402+
VAListIndex =
7403+
MFI.CreateFixedObject(FixedStackSize, CCInfo.getStackSize(),
7404+
/* IsImmutable */ false, /* IsAliased */ true);
7405+
} else {
7406+
// All the arguments passed through ellipses are on the stack. Create a
7407+
// dummy fixed stack object the same size as a pointer since we don't
7408+
// know the actual size.
7409+
VAListIndex =
7410+
MFI.CreateFixedObject(PtrByteSize, CCInfo.getStackSize(),
7411+
/* IsImmutable */ true, /* IsAliased */ true);
7412+
}
7413+
7414+
FuncInfo->setVarArgsFrameIndex(VAListIndex);
7415+
SDValue FIN = DAG.getFrameIndex(VAListIndex, PtrVT);
73987416

73997417
static const MCPhysReg GPR_32[] = {PPC::R3, PPC::R4, PPC::R5, PPC::R6,
74007418
PPC::R7, PPC::R8, PPC::R9, PPC::R10};
@@ -7406,17 +7424,19 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
74067424
// The fixed integer arguments of a variadic function are stored to the
74077425
// VarArgsFrameIndex on the stack so that they may be loaded by
74087426
// dereferencing the result of va_next.
7409-
for (unsigned GPRIndex =
7410-
(CCInfo.getStackSize() - LinkageSize) / PtrByteSize;
7411-
GPRIndex < NumGPArgRegs; ++GPRIndex) {
7427+
for (unsigned
7428+
GPRIndex = (CCInfo.getStackSize() - LinkageSize) / PtrByteSize,
7429+
Offset = 0;
7430+
GPRIndex < NumGPArgRegs; ++GPRIndex, Offset += PtrByteSize) {
74127431

74137432
const Register VReg =
74147433
IsPPC64 ? MF.addLiveIn(GPR_64[GPRIndex], &PPC::G8RCRegClass)
74157434
: MF.addLiveIn(GPR_32[GPRIndex], &PPC::GPRCRegClass);
74167435

74177436
SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
7418-
SDValue Store =
7419-
DAG.getStore(Val.getValue(1), dl, Val, FIN, MachinePointerInfo());
7437+
MachinePointerInfo MPI =
7438+
MachinePointerInfo::getFixedStack(MF, VAListIndex, Offset);
7439+
SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, MPI);
74207440
MemOps.push_back(Store);
74217441
// Increment the address for the next argument to store.
74227442
SDValue PtrOff = DAG.getConstant(PtrByteSize, dl, PtrVT);

‎llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg-mir.ll‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -8,22 +8,22 @@ define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
88
; CHECK-NEXT: {{ $}}
99
; CHECK-NEXT: renamable $r11 = ADDI %fixed-stack.0, 0
1010
; CHECK-NEXT: STW killed renamable $r4, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0)
11-
; CHECK-NEXT: STW killed renamable $r6, 8, %fixed-stack.0 :: (store (s32))
12-
; CHECK-NEXT: STW killed renamable $r7, 12, %fixed-stack.0 :: (store (s32))
13-
; CHECK-NEXT: STW killed renamable $r8, 16, %fixed-stack.0 :: (store (s32))
14-
; CHECK-NEXT: STW killed renamable $r9, 20, %fixed-stack.0 :: (store (s32))
15-
; CHECK-NEXT: STW killed renamable $r10, 24, %fixed-stack.0 :: (store (s32))
11+
; CHECK-NEXT: STW killed renamable $r5, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
12+
; CHECK-NEXT: STW killed renamable $r6, 8, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 8)
13+
; CHECK-NEXT: STW killed renamable $r7, 12, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 12)
14+
; CHECK-NEXT: STW killed renamable $r8, 16, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 16)
15+
; CHECK-NEXT: STW killed renamable $r9, 20, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 20)
16+
; CHECK-NEXT: STW killed renamable $r10, 24, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 24)
1617
; CHECK-NEXT: STW renamable $r11, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
1718
; CHECK-NEXT: STW killed renamable $r11, 0, %stack.1.arg2 :: (store (s32) into %ir.arg2)
1819
; CHECK-NEXT: renamable $r4 = ADDI %fixed-stack.0, 4
1920
; CHECK-NEXT: STW renamable $r4, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
20-
; CHECK-NEXT: renamable $r6 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.argp.cur)
21+
; CHECK-NEXT: renamable $r5 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.argp.cur)
2122
; CHECK-NEXT: STW killed renamable $r4, 0, %stack.1.arg2 :: (store (s32) into %ir.arg2)
2223
; CHECK-NEXT: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.argp.cur2)
23-
; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r6, killed renamable $r3
24+
; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r5, killed renamable $r3
2425
; CHECK-NEXT: renamable $r4 = RLWINM killed renamable $r4, 1, 0, 30
2526
; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
26-
; CHECK-NEXT: STW killed renamable $r5, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
2727
; CHECK-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
2828
entry:
2929
%arg1 = alloca ptr, align 4
@@ -115,12 +115,12 @@ define double @double_va_arg(double %a, ...) local_unnamed_addr {
115115
; CHECK-NEXT: liveins: $f1, $r5, $r6, $r7, $r8, $r9, $r10
116116
; CHECK-NEXT: {{ $}}
117117
; CHECK-NEXT: renamable $r3 = ADDI %fixed-stack.0, 0
118-
; CHECK-NEXT: STW killed renamable $r7, 8, %fixed-stack.0 :: (store (s32), align 8)
118+
; CHECK-NEXT: STW killed renamable $r7, 8, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 8, align 8)
119119
; CHECK-NEXT: STW renamable $r5, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0, align 16)
120120
; CHECK-NEXT: STW renamable $r6, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
121-
; CHECK-NEXT: STW killed renamable $r8, 12, %fixed-stack.0 :: (store (s32))
121+
; CHECK-NEXT: STW killed renamable $r8, 12, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 12)
122122
; CHECK-NEXT: STW killed renamable $r9, 16, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 16, align 16)
123-
; CHECK-NEXT: STW killed renamable $r10, 20, %fixed-stack.0 :: (store (s32))
123+
; CHECK-NEXT: STW killed renamable $r10, 20, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 20)
124124
; CHECK-NEXT: STW renamable $r3, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
125125
; CHECK-NEXT: STW killed renamable $r3, 0, %stack.1.arg2 :: (store (s32) into %ir.arg2)
126126
; CHECK-NEXT: STW renamable $r5, 0, %stack.2 :: (store (s32) into %stack.2, align 8)

‎llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -7,21 +7,21 @@ define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
77
; CHECK-NEXT: addi 11, 1, 28
88
; CHECK-NEXT: stw 4, 28(1)
99
; CHECK-NEXT: addi 4, 1, 32
10-
; CHECK-NEXT: stw 6, 36(1)
10+
; CHECK-NEXT: stw 5, 32(1)
1111
; CHECK-NEXT: stw 11, -4(1)
1212
; CHECK-NEXT: stw 11, -8(1)
1313
; CHECK-NEXT: stw 4, -4(1)
14-
; CHECK-NEXT: lwz 6, 28(1)
14+
; CHECK-NEXT: lwz 5, 28(1)
1515
; CHECK-NEXT: stw 4, -8(1)
16-
; CHECK-NEXT: add 3, 6, 3
16+
; CHECK-NEXT: add 3, 5, 3
1717
; CHECK-NEXT: lwz 4, 28(1)
1818
; CHECK-NEXT: slwi 4, 4, 1
19-
; CHECK-NEXT: stw 7, 40(1)
19+
; CHECK-NEXT: stw 6, 36(1)
2020
; CHECK-NEXT: add 3, 3, 4
21+
; CHECK-NEXT: stw 7, 40(1)
2122
; CHECK-NEXT: stw 8, 44(1)
2223
; CHECK-NEXT: stw 9, 48(1)
2324
; CHECK-NEXT: stw 10, 52(1)
24-
; CHECK-NEXT: stw 5, 32(1)
2525
; CHECK-NEXT: blr
2626
entry:
2727
%arg1 = alloca ptr, align 4

‎llvm/test/CodeGen/PowerPC/aix32-vector-vararg-callee.ll‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -17,11 +17,11 @@ define <4 x i32> @callee(i32 %count, ...) {
1717
; CHECK: [[COPY6:%[0-9]+]]:gprc = COPY $r4
1818
; CHECK: STW [[COPY6]], 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0)
1919
; CHECK: STW [[COPY5]], 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
20-
; CHECK: STW [[COPY4]], 8, %fixed-stack.0 :: (store (s32))
21-
; CHECK: STW [[COPY3]], 12, %fixed-stack.0 :: (store (s32))
22-
; CHECK: STW [[COPY2]], 16, %fixed-stack.0 :: (store (s32))
23-
; CHECK: STW [[COPY1]], 20, %fixed-stack.0 :: (store (s32))
24-
; CHECK: STW [[COPY]], 24, %fixed-stack.0 :: (store (s32))
20+
; CHECK: STW [[COPY4]], 8, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 8)
21+
; CHECK: STW [[COPY3]], 12, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 12)
22+
; CHECK: STW [[COPY2]], 16, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 16)
23+
; CHECK: STW [[COPY1]], 20, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 20)
24+
; CHECK: STW [[COPY]], 24, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 24)
2525
; CHECK: LIFETIME_START %stack.0.arg_list
2626
; CHECK: [[ADDI:%[0-9]+]]:gprc = ADDI %fixed-stack.0, 0
2727
; CHECK: STW killed [[ADDI]], 0, %stack.0.arg_list :: (store (s32) into %ir.arg_list)

‎llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg-mir.ll‎

Lines changed: 26 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -7,23 +7,23 @@ define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
77
; CHECK-NEXT: liveins: $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10
88
; CHECK-NEXT: {{ $}}
99
; CHECK-NEXT: renamable $x11 = ADDI8 %fixed-stack.0, 0
10-
; CHECK-NEXT: STD killed renamable $x6, 16, %fixed-stack.0 :: (store (s64))
11-
; CHECK-NEXT: STD killed renamable $x7, 24, %fixed-stack.0 :: (store (s64))
12-
; CHECK-NEXT: STD killed renamable $x8, 32, %fixed-stack.0 :: (store (s64))
13-
; CHECK-NEXT: STD killed renamable $x9, 40, %fixed-stack.0 :: (store (s64))
14-
; CHECK-NEXT: STD killed renamable $x10, 48, %fixed-stack.0 :: (store (s64))
15-
; CHECK-NEXT: STD renamable $x11, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
16-
; CHECK-NEXT: renamable $x6 = LD 0, %stack.1.arg2 :: (load (s64) from %ir.arg2)
17-
; CHECK-NEXT: renamable $x7 = disjoint ADDI8 %fixed-stack.0, 4
18-
; CHECK-NEXT: renamable $r8 = LWZ 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0, align 8)
19-
; CHECK-NEXT: renamable $x9 = ADDI8 renamable $x6, 4
2010
; CHECK-NEXT: STD killed renamable $x4, 0, %fixed-stack.0 :: (store (s64) into %fixed-stack.0)
2111
; CHECK-NEXT: STD killed renamable $x5, 8, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 8)
12+
; CHECK-NEXT: STD killed renamable $x6, 16, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 16)
13+
; CHECK-NEXT: STD killed renamable $x7, 24, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 24)
14+
; CHECK-NEXT: STD killed renamable $x8, 32, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 32)
15+
; CHECK-NEXT: STD killed renamable $x9, 40, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 40)
16+
; CHECK-NEXT: STD killed renamable $x10, 48, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 48)
17+
; CHECK-NEXT: STD renamable $x11, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
18+
; CHECK-NEXT: renamable $x4 = LD 0, %stack.1.arg2 :: (load (s64) from %ir.arg2)
19+
; CHECK-NEXT: renamable $x5 = disjoint ADDI8 %fixed-stack.0, 4
2220
; CHECK-NEXT: STD killed renamable $x11, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
23-
; CHECK-NEXT: STD killed renamable $x7, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
24-
; CHECK-NEXT: STD killed renamable $x9, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
25-
; CHECK-NEXT: renamable $r4 = LWZ 0, killed renamable $x6 :: (load (s32))
26-
; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r8, renamable $r3, implicit killed $x3
21+
; CHECK-NEXT: STD killed renamable $x5, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
22+
; CHECK-NEXT: renamable $r5 = LWZ 0, %fixed-stack.0 :: (load (s32) from %fixed-stack.0, align 8)
23+
; CHECK-NEXT: renamable $x6 = ADDI8 renamable $x4, 4
24+
; CHECK-NEXT: STD killed renamable $x6, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
25+
; CHECK-NEXT: renamable $r4 = LWZ 0, killed renamable $x4 :: (load (s32))
26+
; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r5, renamable $r3, implicit killed $x3
2727
; CHECK-NEXT: renamable $r4 = RLWINM killed renamable $r4, 1, 0, 30
2828
; CHECK-NEXT: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4, implicit-def $x3
2929
; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
@@ -101,22 +101,22 @@ define double @double_va_arg(double %a, ...) local_unnamed_addr {
101101
; CHECK-NEXT: liveins: $f1, $x4, $x5, $x6, $x7, $x8, $x9, $x10
102102
; CHECK-NEXT: {{ $}}
103103
; CHECK-NEXT: renamable $x3 = ADDI8 %fixed-stack.0, 0
104-
; CHECK-NEXT: STD killed renamable $x6, 16, %fixed-stack.0 :: (store (s64))
105-
; CHECK-NEXT: STD killed renamable $x7, 24, %fixed-stack.0 :: (store (s64))
106-
; CHECK-NEXT: STD killed renamable $x8, 32, %fixed-stack.0 :: (store (s64))
107-
; CHECK-NEXT: STD killed renamable $x9, 40, %fixed-stack.0 :: (store (s64))
108-
; CHECK-NEXT: STD killed renamable $x10, 48, %fixed-stack.0 :: (store (s64))
109-
; CHECK-NEXT: STD renamable $x3, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
110-
; CHECK-NEXT: renamable $x6 = LD 0, %stack.1.arg2 :: (load (s64) from %ir.arg2)
111-
; CHECK-NEXT: renamable $x7 = ADDI8 %fixed-stack.0, 8
112104
; CHECK-NEXT: STD killed renamable $x4, 0, %fixed-stack.0 :: (store (s64) into %fixed-stack.0)
105+
; CHECK-NEXT: STD killed renamable $x5, 8, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 8)
106+
; CHECK-NEXT: STD killed renamable $x6, 16, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 16)
107+
; CHECK-NEXT: STD killed renamable $x7, 24, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 24)
108+
; CHECK-NEXT: STD killed renamable $x8, 32, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 32)
109+
; CHECK-NEXT: STD killed renamable $x9, 40, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 40)
110+
; CHECK-NEXT: STD killed renamable $x10, 48, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 48)
111+
; CHECK-NEXT: STD renamable $x3, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
112+
; CHECK-NEXT: renamable $x4 = LD 0, %stack.1.arg2 :: (load (s64) from %ir.arg2)
113+
; CHECK-NEXT: renamable $x5 = ADDI8 %fixed-stack.0, 8
113114
; CHECK-NEXT: STD killed renamable $x3, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
114-
; CHECK-NEXT: STD killed renamable $x7, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
115+
; CHECK-NEXT: STD killed renamable $x5, 0, %stack.0.arg1 :: (store (s64) into %ir.arg1)
115116
; CHECK-NEXT: renamable $f0 = LFD 0, %fixed-stack.0 :: (load (s64))
116-
; CHECK-NEXT: renamable $x3 = ADDI8 renamable $x6, 8
117-
; CHECK-NEXT: STD killed renamable $x5, 8, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 8)
117+
; CHECK-NEXT: renamable $x3 = ADDI8 renamable $x4, 8
118118
; CHECK-NEXT: STD killed renamable $x3, 0, %stack.1.arg2 :: (store (s64) into %ir.arg2)
119-
; CHECK-NEXT: renamable $f2 = LFD 0, killed renamable $x6 :: (load (s64))
119+
; CHECK-NEXT: renamable $f2 = LFD 0, killed renamable $x4 :: (load (s64))
120120
; CHECK-NEXT: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
121121
; CHECK-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f2, renamable $f2, implicit $rm
122122
; CHECK-NEXT: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm

‎llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -5,24 +5,24 @@
55
define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
66
; CHECK-LABEL: int_va_arg:
77
; CHECK: # %bb.0: # %entry
8+
; CHECK-NEXT: addi 11, 1, 56
89
; CHECK-NEXT: std 4, 56(1)
9-
; CHECK-NEXT: addi 4, 1, 56
10-
; CHECK-NEXT: std 4, -16(1)
10+
; CHECK-NEXT: addi 4, 1, 60
11+
; CHECK-NEXT: std 11, -16(1)
12+
; CHECK-NEXT: std 11, -8(1)
1113
; CHECK-NEXT: std 4, -8(1)
1214
; CHECK-NEXT: ld 4, -16(1)
13-
; CHECK-NEXT: std 5, 64(1)
14-
; CHECK-NEXT: addi 5, 1, 60
15-
; CHECK-NEXT: std 5, -8(1)
16-
; CHECK-NEXT: addi 5, 4, 4
1715
; CHECK-NEXT: std 6, 72(1)
16+
; CHECK-NEXT: addi 6, 4, 4
17+
; CHECK-NEXT: std 5, 64(1)
1818
; CHECK-NEXT: std 7, 80(1)
1919
; CHECK-NEXT: std 8, 88(1)
2020
; CHECK-NEXT: std 9, 96(1)
2121
; CHECK-NEXT: std 10, 104(1)
22-
; CHECK-NEXT: std 5, -16(1)
23-
; CHECK-NEXT: lwz 11, 56(1)
22+
; CHECK-NEXT: std 6, -16(1)
23+
; CHECK-NEXT: lwz 5, 56(1)
2424
; CHECK-NEXT: lwz 4, 0(4)
25-
; CHECK-NEXT: add 3, 11, 3
25+
; CHECK-NEXT: add 3, 5, 3
2626
; CHECK-NEXT: slwi 4, 4, 1
2727
; CHECK-NEXT: add 3, 3, 4
2828
; CHECK-NEXT: blr

‎llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -17,11 +17,11 @@ define <4 x i32> @callee(i32 signext %count, ...) {
1717
; CHECK: [[COPY6:%[0-9]+]]:g8rc = COPY $x4
1818
; CHECK: STD [[COPY6]], 0, %fixed-stack.0 :: (store (s64) into %fixed-stack.0)
1919
; CHECK: STD [[COPY5]], 8, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 8)
20-
; CHECK: STD [[COPY4]], 16, %fixed-stack.0 :: (store (s64))
21-
; CHECK: STD [[COPY3]], 24, %fixed-stack.0 :: (store (s64))
22-
; CHECK: STD [[COPY2]], 32, %fixed-stack.0 :: (store (s64))
23-
; CHECK: STD [[COPY1]], 40, %fixed-stack.0 :: (store (s64))
24-
; CHECK: STD [[COPY]], 48, %fixed-stack.0 :: (store (s64))
20+
; CHECK: STD [[COPY4]], 16, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 16)
21+
; CHECK: STD [[COPY3]], 24, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 24)
22+
; CHECK: STD [[COPY2]], 32, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 32)
23+
; CHECK: STD [[COPY1]], 40, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 40)
24+
; CHECK: STD [[COPY]], 48, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 48)
2525
; CHECK: LIFETIME_START %stack.0.arg_list
2626
; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = ADDI8 %fixed-stack.0, 0
2727
; CHECK: STD killed [[ADDI8_]], 0, %stack.0.arg_list :: (store (s64) into %ir.arg_list)

‎llvm/test/CodeGen/PowerPC/aix64-vector-vararg-fixed-callee.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ define double @callee(i32 signext %count, <4 x i32> %vsi, double %next, ...) {
1515
; CHECK: [[COPY2:%[0-9]+]]:g8rc = COPY $x8
1616
; CHECK: STD [[COPY2]], 0, %fixed-stack.0 :: (store (s64) into %fixed-stack.0)
1717
; CHECK: STD [[COPY1]], 8, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 8)
18-
; CHECK: STD [[COPY]], 16, %fixed-stack.0 :: (store (s64))
18+
; CHECK: STD [[COPY]], 16, %fixed-stack.0 :: (store (s64) into %fixed-stack.0 + 16)
1919
; CHECK: LIFETIME_START %stack.0.arg_list
2020
; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = ADDI8 %fixed-stack.0, 0
2121
; CHECK: STD killed [[ADDI8_]], 0, %stack.0.arg_list :: (store (s64) into %ir.arg_list)

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