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zhaoqi5Honey Goyal
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[LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors (llvm#170621)
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
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; RUN: llc --mtriple=loongarch64 --mattr=+lasx %s -o - | FileCheck %s
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define void @shufflevector_bswap_h(ptr %res, ptr %a) nounwind {
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; CHECK-LABEL: shufflevector_bswap_h:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvshuf4i.b $xr0, $xr0, 177
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%va = load <32 x i8>, ptr %a
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%b = shufflevector <32 x i8> %va, <32 x i8> poison, <32 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14, i32 17, i32 16, i32 19, i32 18, i32 21, i32 20, i32 23, i32 22, i32 25, i32 24, i32 27, i32 26, i32 29, i32 28, i32 31, i32 30>
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store <32 x i8> %b, ptr %res
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ret void
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}
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define void @shufflevector_bswap_w(ptr %res, ptr %a) nounwind {
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; CHECK-LABEL: shufflevector_bswap_w:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: xvshuf4i.b $xr0, $xr0, 27
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%va = load <32 x i8>, ptr %a
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%b = shufflevector <32 x i8> %va, <32 x i8> poison, <32 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12, i32 19, i32 18, i32 17, i32 16, i32 23, i32 22, i32 21, i32 20, i32 27, i32 26, i32 25, i32 24, i32 31, i32 30, i32 29, i32 28>
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store <32 x i8> %b, ptr %res
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ret void
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}
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define void @shufflevector_bswap_d(ptr %res, ptr %a) nounwind {
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; CHECK-LABEL: shufflevector_bswap_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xvld $xr0, $a1, 0
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; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI2_0)
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; CHECK-NEXT: xvld $xr1, $a1, %pc_lo12(.LCPI2_0)
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; CHECK-NEXT: xvshuf.b $xr0, $xr0, $xr0, $xr1
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; CHECK-NEXT: xvst $xr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%va = load <32 x i8>, ptr %a
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%b = shufflevector <32 x i8> %va, <32 x i8> poison, <32 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24>
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store <32 x i8> %b, ptr %res
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ret void
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}
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx %s -o - | FileCheck %s
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define void @shufflevector_bswap_h(ptr %res, ptr %a) nounwind {
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; CHECK-LABEL: shufflevector_bswap_h:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a1, 0
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; CHECK-NEXT: vshuf4i.b $vr0, $vr0, 177
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%va = load <16 x i8>, ptr %a
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%b = shufflevector <16 x i8> %va, <16 x i8> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
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store <16 x i8> %b, ptr %res
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ret void
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}
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define void @shufflevector_bswap_w(ptr %res, ptr %a) nounwind {
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; CHECK-LABEL: shufflevector_bswap_w:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a1, 0
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; CHECK-NEXT: vshuf4i.b $vr0, $vr0, 27
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%va = load <16 x i8>, ptr %a
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%b = shufflevector <16 x i8> %va, <16 x i8> poison, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
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store <16 x i8> %b, ptr %res
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ret void
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}
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define void @shufflevector_bswap_d(ptr %res, ptr %a) nounwind {
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; CHECK-LABEL: shufflevector_bswap_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vld $vr0, $a1, 0
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; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI2_0)
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; CHECK-NEXT: vld $vr1, $a1, %pc_lo12(.LCPI2_0)
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; CHECK-NEXT: vshuf.b $vr0, $vr0, $vr0, $vr1
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; CHECK-NEXT: vst $vr0, $a0, 0
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; CHECK-NEXT: ret
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entry:
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%va = load <16 x i8>, ptr %a
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%b = shufflevector <16 x i8> %va, <16 x i8> poison, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>
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store <16 x i8> %b, ptr %res
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ret void
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}

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