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1 parent 117b1df commit b1c7ea8Copy full SHA for b1c7ea8
snippets/verilog.snippets
@@ -58,7 +58,7 @@ snippet al
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end
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# Module block
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snippet mod
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- module ${1:module_name} (${2});
+ module ${1:`vim_snippets#Filename('$1', 'name')`} (${2});
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${0}
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endmodule
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# For
@@ -86,3 +86,14 @@ snippet ini
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initial begin
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+# typedef struct packed
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+snippet tdsp
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+ typedef struct packed {
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+ int ${2:data};
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+ } ${1:`vim_snippets#Filename('$1_t', 'name')`};
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+# typedef eum
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+snippet tde
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+ typedef enum ${2:logic[15:0]}
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+ {
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+ ${3:REG = 16'h0000}
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+ } ${1:my_dest_t};
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