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GlobalISel: Translate minimumnum and maximumnum (llvm#139106)
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‎llvm/docs/GlobalISel/GenericOpcode.rst‎

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@@ -608,6 +608,16 @@ NaN-propagating maximum that also treat -0.0 as less than 0.0. While
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FMAXNUM_IEEE follow IEEE 754-2008 semantics, FMAXIMUM follows IEEE
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754-2019 semantics.
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G_FMINIMUMNUM
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^^^^^^^^^^^^^
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IEEE-754 2019 minimumNumber
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G_FMAXIMUMNUM
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^^^^^^^^^^^^^
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IEEE-754 2019 maximumNumber
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G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FREM
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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‎llvm/include/llvm/Support/TargetOpcodes.def‎

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@@ -724,6 +724,8 @@ HANDLE_TARGET_OPCODE(G_FMAXNUM_IEEE)
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/// FP min/max matching IEEE-754 2018 draft semantics.
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HANDLE_TARGET_OPCODE(G_FMINIMUM)
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HANDLE_TARGET_OPCODE(G_FMAXIMUM)
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HANDLE_TARGET_OPCODE(G_FMINIMUMNUM)
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HANDLE_TARGET_OPCODE(G_FMAXIMUMNUM)
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/// Access to FP environment.
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HANDLE_TARGET_OPCODE(G_GET_FPENV)

‎llvm/include/llvm/Target/GenericOpcodes.td‎

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@@ -885,6 +885,21 @@ def G_FMAXIMUM : GenericInstruction {
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let isCommutable = true;
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}
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/// G_FMINIMUMNUM/G_FMAXIMUMNUM - IEEE-754 2019 minimumNumber/maximumNumber
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def G_FMINIMUMNUM : GenericInstruction {
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let OutOperandList = (outs type0:$dst);
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let InOperandList = (ins type0:$src1, type0:$src2);
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let hasSideEffects = false;
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let isCommutable = true;
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}
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def G_FMAXIMUMNUM : GenericInstruction {
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let OutOperandList = (outs type0:$dst);
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let InOperandList = (ins type0:$src1, type0:$src2);
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let hasSideEffects = false;
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let isCommutable = true;
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}
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//------------------------------------------------------------------------------
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// Floating Point Binary ops.
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//------------------------------------------------------------------------------

‎llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp‎

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@@ -1929,6 +1929,10 @@ unsigned IRTranslator::getSimpleIntrinsicOpcode(Intrinsic::ID ID) {
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return TargetOpcode::G_FMINIMUM;
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case Intrinsic::maximum:
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return TargetOpcode::G_FMAXIMUM;
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case Intrinsic::minimumnum:
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return TargetOpcode::G_FMINIMUMNUM;
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case Intrinsic::maximumnum:
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return TargetOpcode::G_FMAXIMUMNUM;
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case Intrinsic::canonicalize:
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return TargetOpcode::G_FCANONICALIZE;
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case Intrinsic::floor:

‎llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll‎

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@@ -79,6 +79,62 @@ define float @test_maximum(float %x, float %y) {
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ret float %val
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}
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define float @test_minimumnum(float %x, float %y) {
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; CHECK-LABEL: name: test_minimumnum
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $s0, $s1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s1
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; CHECK-NEXT: [[FMINIMUMNUM:%[0-9]+]]:_(s32) = G_FMINIMUMNUM [[COPY]], [[COPY1]]
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; CHECK-NEXT: $s0 = COPY [[FMINIMUMNUM]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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%val = call float @llvm.minimumnum.f32(float %x, float %y)
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ret float %val
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}
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define float @test_minimumnum_nnan(float %x, float %y) {
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; CHECK-LABEL: name: test_minimumnum_nnan
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $s0, $s1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s1
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; CHECK-NEXT: [[FMINIMUMNUM:%[0-9]+]]:_(s32) = nnan G_FMINIMUMNUM [[COPY]], [[COPY1]]
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; CHECK-NEXT: $s0 = COPY [[FMINIMUMNUM]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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%val = call nnan float @llvm.minimumnum.f32(float %x, float %y)
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ret float %val
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}
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define float @test_maximumnum(float %x, float %y) {
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; CHECK-LABEL: name: test_maximumnum
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $s0, $s1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s1
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; CHECK-NEXT: [[FMAXIMUMNUM:%[0-9]+]]:_(s32) = G_FMAXIMUMNUM [[COPY]], [[COPY1]]
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; CHECK-NEXT: $s0 = COPY [[FMAXIMUMNUM]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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%val = call float @llvm.maximumnum.f32(float %x, float %y)
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ret float %val
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}
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define float @test_maximumnum_nnan(float %x, float %y) {
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; CHECK-LABEL: name: test_maximumnum_nnan
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: liveins: $s0, $s1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $s0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $s1
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; CHECK-NEXT: [[FMAXIMUMNUM:%[0-9]+]]:_(s32) = nnan G_FMAXIMUMNUM [[COPY]], [[COPY1]]
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; CHECK-NEXT: $s0 = COPY [[FMAXIMUMNUM]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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%val = call nnan float @llvm.maximumnum.f32(float %x, float %y)
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ret float %val
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}
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declare float @llvm.minnum.f32(float, float) #0
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declare float @llvm.maxnum.f32(float, float) #0
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‎llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir‎

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@@ -598,6 +598,12 @@
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# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
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# DEBUG-NEXT: .. the first uncovered type index: 1, OK
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# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
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# DEBUG-NEXT: G_FMINIMUMNUM (opcode {{[0-9]+}}): 1 type index
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_FMAXIMUMNUM (opcode {{[0-9]+}}): 1 type index
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_GET_FPENV (opcode {{[0-9]+}}): 1 type index, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected

‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir‎

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@@ -591,6 +591,12 @@
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# DEBUG-NEXT: G_FMAXIMUM (opcode {{[0-9]+}}): 1 type index
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_FMINIMUMNUM (opcode {{[0-9]+}}): 1 type index
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_FMAXIMUMNUM (opcode {{[0-9]+}}): 1 type index
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_GET_FPENV (opcode {{[0-9]+}}): 1 type index, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined

‎llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td‎

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@@ -513,7 +513,7 @@ def : Pat<(frag GPR32:$src1, complex:$src2, complex:$src3),
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// R00O-NEXT: GIM_Reject,
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// R00O: // Label [[DEFAULT_NUM]]: @[[DEFAULT]]
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// R00O-NEXT: GIM_Reject,
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// R00O-NEXT: }; // Size: 1848 bytes
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// R00O-NEXT: }; // Size: 1856 bytes
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def INSNBOB : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3, GPR32:$src4),
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[(set GPR32:$dst,

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