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[TableGen][SelectionDAG][GISel][RISCV] Support IsNonExtLoad for IsAtomic PatFrags. (llvm#137401)
Use it for RISC-V as a demonstration. Other targets will follow.
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-36
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5 files changed

+72
-36
lines changed

‎llvm/include/llvm/Target/TargetSelectionDAG.td

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1835,6 +1835,13 @@ defm atomic_load_uinc_wrap : binary_atomic_op<atomic_load_uinc_wrap>;
18351835
defm atomic_load_udec_wrap : binary_atomic_op<atomic_load_udec_wrap>;
18361836
defm atomic_cmp_swap : ternary_atomic_op<atomic_cmp_swap>;
18371837

1838+
/// Atomic load which does not extend.
1839+
def atomic_load_nonext :
1840+
PatFrag<(ops node:$ptr), (atomic_load node:$ptr)> {
1841+
let IsAtomic = true; // FIXME: Should be IsLoad and/or IsAtomic?
1842+
let IsNonExtLoad = true;
1843+
}
1844+
18381845
/// Atomic load which zeroes the excess high bits.
18391846
def atomic_load_zext :
18401847
PatFrag<(ops node:$ptr), (atomic_load node:$ptr)> {
@@ -1876,13 +1883,38 @@ def atomic_load_32 :
18761883
let IsAtomic = true;
18771884
let MemoryVT = i32;
18781885
}
1886+
18791887
def atomic_load_64 :
18801888
PatFrag<(ops node:$ptr),
18811889
(atomic_load node:$ptr)> {
18821890
let IsAtomic = true;
18831891
let MemoryVT = i64;
18841892
}
18851893

1894+
def atomic_load_nonext_8 :
1895+
PatFrag<(ops node:$ptr), (atomic_load_nonext node:$ptr)> {
1896+
let IsAtomic = true; // FIXME: Should be IsLoad and/or IsAtomic?
1897+
let MemoryVT = i8;
1898+
}
1899+
1900+
def atomic_load_nonext_16 :
1901+
PatFrag<(ops node:$ptr), (atomic_load_nonext node:$ptr)> {
1902+
let IsAtomic = true; // FIXME: Should be IsLoad and/or IsAtomic?
1903+
let MemoryVT = i16;
1904+
}
1905+
1906+
def atomic_load_nonext_32 :
1907+
PatFrag<(ops node:$ptr), (atomic_load_nonext node:$ptr)> {
1908+
let IsAtomic = true; // FIXME: Should be IsLoad and/or IsAtomic?
1909+
let MemoryVT = i32;
1910+
}
1911+
1912+
def atomic_load_nonext_64 :
1913+
PatFrag<(ops node:$ptr), (atomic_load_nonext node:$ptr)> {
1914+
let IsAtomic = true; // FIXME: Should be IsLoad and/or IsAtomic?
1915+
let MemoryVT = i64;
1916+
}
1917+
18861918
def atomic_load_zext_8 :
18871919
PatFrag<(ops node:$ptr), (atomic_load_zext node:$ptr)> {
18881920
let IsAtomic = true; // FIXME: Should be IsLoad and/or IsAtomic?

‎llvm/lib/Target/RISCV/RISCVInstrInfoA.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -174,12 +174,12 @@ let Predicates = [HasAtomicLdSt] in {
174174
}
175175

176176
let Predicates = [HasAtomicLdSt, IsRV32] in {
177-
def : LdPat<relaxed_load<atomic_load_32>, LW>;
177+
def : LdPat<relaxed_load<atomic_load_nonext_32>, LW>;
178178
}
179179

180180
let Predicates = [HasAtomicLdSt, IsRV64] in {
181181
def : LdPat<relaxed_load<atomic_load_asext_32>, LW>;
182-
def : LdPat<relaxed_load<atomic_load_64>, LD, i64>;
182+
def : LdPat<relaxed_load<atomic_load_nonext_64>, LD, i64>;
183183
def : StPat<relaxed_store<atomic_store_64>, SD, GPR, i64>;
184184
}
185185

‎llvm/lib/Target/RISCV/RISCVInstrInfoZalasr.td

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -95,17 +95,17 @@ let Predicates = [HasStdExtZalasr] in {
9595
} // Predicates = [HasStdExtZalasr]
9696

9797
let Predicates = [HasStdExtZalasr, IsRV32] in {
98-
def : PatLAQ<acquiring_load<atomic_load_32>, LW_AQ>;
99-
def : PatLAQ<seq_cst_load<atomic_load_32>, LW_AQ>;
98+
def : PatLAQ<acquiring_load<atomic_load_nonext_32>, LW_AQ>;
99+
def : PatLAQ<seq_cst_load<atomic_load_nonext_32>, LW_AQ>;
100100

101101
} // Predicates = [HasStdExtZalasr, IsRV64]
102102

103103
let Predicates = [HasStdExtZalasr, IsRV64] in {
104104
def : PatLAQ<acquiring_load<atomic_load_asext_32>, LW_AQ>;
105105
def : PatLAQ<seq_cst_load<atomic_load_asext_32>, LW_AQ>;
106106

107-
def : PatLAQ<acquiring_load<atomic_load_64>, LD_AQ>;
108-
def : PatLAQ<seq_cst_load<atomic_load_64>, LD_AQ>;
107+
def : PatLAQ<acquiring_load<atomic_load_nonext_64>, LD_AQ>;
108+
def : PatLAQ<seq_cst_load<atomic_load_nonext_64>, LD_AQ>;
109109

110110
def : PatSRL<releasing_store<atomic_store_64>, SD_RL>;
111111
def : PatSRL<seq_cst_store<atomic_store_64>, SD_RL>;

‎llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp

Lines changed: 23 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -933,21 +933,19 @@ std::string TreePredicateFn::getPredCode() const {
933933
getMinAlignment() < 1)
934934
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
935935
"IsLoad cannot be used by itself");
936-
} else {
936+
} else if (!isAtomic()) {
937937
if (isNonExtLoad())
938938
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
939-
"IsNonExtLoad requires IsLoad");
940-
if (!isAtomic()) {
941-
if (isAnyExtLoad())
942-
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
943-
"IsAnyExtLoad requires IsLoad or IsAtomic");
944-
if (isSignExtLoad())
945-
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
946-
"IsSignExtLoad requires IsLoad or IsAtomic");
947-
if (isZeroExtLoad())
948-
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
949-
"IsZeroExtLoad requires IsLoad or IsAtomic");
950-
}
939+
"IsNonExtLoad requires IsLoad or IsAtomic");
940+
if (isAnyExtLoad())
941+
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
942+
"IsAnyExtLoad requires IsLoad or IsAtomic");
943+
if (isSignExtLoad())
944+
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
945+
"IsSignExtLoad requires IsLoad or IsAtomic");
946+
if (isZeroExtLoad())
947+
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
948+
"IsZeroExtLoad requires IsLoad or IsAtomic");
951949
}
952950

953951
if (isStore()) {
@@ -966,10 +964,10 @@ std::string TreePredicateFn::getPredCode() const {
966964
}
967965

968966
if (isAtomic()) {
969-
if (getMemoryVT() == nullptr && !isAtomicOrderingMonotonic() &&
970-
getAddressSpaces() == nullptr &&
967+
if (getMemoryVT() == nullptr && getAddressSpaces() == nullptr &&
971968
// FIXME: Should atomic loads be IsLoad, IsAtomic, or both?
972-
!isAnyExtLoad() && !isZeroExtLoad() && !isSignExtLoad() &&
969+
!isNonExtLoad() && !isAnyExtLoad() && !isZeroExtLoad() &&
970+
!isSignExtLoad() && !isAtomicOrderingMonotonic() &&
973971
!isAtomicOrderingAcquire() && !isAtomicOrderingRelease() &&
974972
!isAtomicOrderingAcquireRelease() &&
975973
!isAtomicOrderingSequentiallyConsistent() &&
@@ -1076,11 +1074,16 @@ std::string TreePredicateFn::getPredCode() const {
10761074
"return false;\n";
10771075

10781076
if (isAtomic()) {
1079-
if ((isAnyExtLoad() + isSignExtLoad() + isZeroExtLoad()) > 1)
1080-
PrintFatalError(getOrigPatFragRecord()->getRecord()->getLoc(),
1081-
"IsAnyExtLoad, IsSignExtLoad, and IsZeroExtLoad are "
1082-
"mutually exclusive");
1077+
if ((isNonExtLoad() + isAnyExtLoad() + isSignExtLoad() + isZeroExtLoad()) >
1078+
1)
1079+
PrintFatalError(
1080+
getOrigPatFragRecord()->getRecord()->getLoc(),
1081+
"IsNonExtLoad, IsAnyExtLoad, IsSignExtLoad, and IsZeroExtLoad are "
1082+
"mutually exclusive");
10831083

1084+
if (isNonExtLoad())
1085+
Code += "if (cast<AtomicSDNode>(N)->getExtensionType() != "
1086+
"ISD::NON_EXTLOAD) return false;\n";
10841087
if (isAnyExtLoad())
10851088
Code += "if (cast<AtomicSDNode>(N)->getExtensionType() != ISD::EXTLOAD) "
10861089
"return false;\n";

‎llvm/utils/TableGen/GlobalISelEmitter.cpp

Lines changed: 11 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -622,16 +622,17 @@ Expected<InstructionMatcher &> GlobalISelEmitter::addBuiltinPredicates(
622622
}
623623

624624
// G_LOAD is used for both non-extending and any-extending loads.
625-
if (Predicate.isLoad() && Predicate.isNonExtLoad()) {
626-
InsnMatcher.addPredicate<MemoryVsLLTSizePredicateMatcher>(
627-
0, MemoryVsLLTSizePredicateMatcher::EqualTo, 0);
628-
return InsnMatcher;
629-
}
630-
if ((Predicate.isLoad() || Predicate.isAtomic()) &&
631-
Predicate.isAnyExtLoad()) {
632-
InsnMatcher.addPredicate<MemoryVsLLTSizePredicateMatcher>(
633-
0, MemoryVsLLTSizePredicateMatcher::LessThan, 0);
634-
return InsnMatcher;
625+
if (Predicate.isLoad() || Predicate.isAtomic()) {
626+
if (Predicate.isNonExtLoad()) {
627+
InsnMatcher.addPredicate<MemoryVsLLTSizePredicateMatcher>(
628+
0, MemoryVsLLTSizePredicateMatcher::EqualTo, 0);
629+
return InsnMatcher;
630+
}
631+
if (Predicate.isAnyExtLoad()) {
632+
InsnMatcher.addPredicate<MemoryVsLLTSizePredicateMatcher>(
633+
0, MemoryVsLLTSizePredicateMatcher::LessThan, 0);
634+
return InsnMatcher;
635+
}
635636
}
636637

637638
if (Predicate.isStore()) {

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