Xilinx Zynqmp: The read data is inconsistent with the data written by the PL

[zhanghongg]

The problem is sporadic.
It seems to always happen at the last position of buf.

[ikwzm]

Please give more information.

[zhanghongg]

U-dma-buf devicetree:

	udmabuf@0x00 {
		compatible = "ikwzm,u-dma-buf";
		device-name = "udmabuf0";
		size = <0x14000000>;
	};

U-dma-buf initialization:

    fd_ = open("/dev/udmabuf0", O_RDWR);
    if (fd_ < 0) {   
        log_error("UdmaBuf mmap!");
        assert(false);
    }
    user_ptr_ = mmap64(NULL, map_size_, PROT_READ | PROT_WRITE, MAP_SHARED, fd_, 			base_addr_);
    if(user_ptr_ != MAP_FAILED) {
        log_info("UdmaBuf mmap succuffully!");
        ClearBuf();
    }
    else {
        log_error("UdmaBuf mmap failed!"); 
}

U-dma-buf ClearBuf:

    unsigned char* tmp = reinterpret_cast<unsigned char*>(user_ptr_);
memset(tmp,0,map_size_);

V4l2 Userptr REQBUFS:

    uint64_t reserved_base_addr = 0;
    reserved_memory_ = std::make_shared<UdmaBuf>(reserved_base_addr, req_count * 			buf_length_);

    struct v4l2_requestbuffers reqBufs;
    memset(&reqBufs, 0, sizeof(struct v4l2_requestbuffers));
    reqBufs.count  = req_count;
    reqBufs.type   = V4L2_BUF_TYPE_VIDEO_CAPTURE;
    reqBufs.memory = V4L2_MEMORY_USERPTR;
    if (ioctl(fd_, VIDIOC_REQBUFS, &reqBufs)) {
        log_error("v4l2 VIDIOC_REQBUFS failed: %s", strerror(errno));
        return false;
    }
    video_buf_.resize(req_count);
    dq_video_bufs_.resize(req_count);
    for(int i = 0; i < reqBufs.count; i++){
        struct v4l2_buffer videoBuf;
        memset(&videoBuf, 0, sizeof(struct v4l2_buffer));
        videoBuf.index = i;
        videoBuf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
        videoBuf.memory = V4L2_MEMORY_USERPTR;
        if(ioctl(fd_, VIDIOC_QUERYBUF, &videoBuf)){
            log_error("v4l2 VIDIOC_QUERYBUF failed: %s", strerror(errno));
            return false;
        }
        void* myPtr = reserved_memory_->GetMappAddr();
        video_buf_[i] = reinterpret_cast<unsigned char*>(myPtr) + i*buf_length_;
        videoBuf.m.userptr = reinterpret_cast<unsigned long>(video_buf_[i]);

        if(ioctl(fd_, VIDIOC_QBUF, &videoBuf)){
            log_error("v4l2 VIDIOC_QBUF failed: %s", strerror(errno));
            return false;
        }
    }

    return true;

Program running logic and Problem describe:

PL will write a value of the last four bytes of buf, and the ps side will write the last four bytes of buf as 0 every time the ps side reads buf. The problem is that when ps obtain buf3,it occasionally reads out the last four byte values of 0, but the pl terminal has written it as a non-0 value.

[ikwzm]

How is Cache Coherency?

[zhanghongg]

The code shown above is everything I do

[zhanghongg]

Please provide some suggestions, thank you.

[zhanghongg]

supplement: PL use axi_hp to write ddr.

I tried using the method that "Manual cache management with the CPU cache still being enabled" in udmabuf readme.
The problem will still occur.

May I ask how I should solve this problem?

[ikwzm]

I tried using the method that "Manual cache management with the CPU cache still being enabled" in udmabuf readme.
The problem will still occur.

How did you do this?

[ikwzm]

How many is the value of buf_length_ ?
What is the value of videoBuf.length ?

[ikwzm]

What I would like to know is not so much when, but when are you syncing?

[zhanghongg]

When CPU using buf, the following code is roughly executed:

// set sync_offset
unsigned char attr[1024];
unsigned long sync_offset = 16777216* index; // index: 0-19
if ((fd = open("/sys/class/u-dma-buf/udmabuf0/sync_offset", O_WRONLY)) != -1) {
sprintf(attr, "%d", sync_offset); /* or sprintf(attr, "0x%x", sync_offset); /
write(fd, attr, strlen(attr));
close(fd);
}
// set sync_size
unsigned char attr[1024];
unsigned long sync_size = 16777216;
if ((fd = open("/sys/class/u-dma-buf/udmabuf0/sync_size", O_WRONLY)) != -1) {
sprintf(attr, "%d", sync_size); / or sprintf(attr, "0x%x", sync_size); */
write(fd, attr, strlen(attr));
close(fd);
}

// set sync_direction
unsigned char attr[1024];
unsigned long sync_direction = 1;
if ((fd = open("/sys/class/u-dma-buf/udmabuf0/sync_direction", O_WRONLY)) != -1) {
sprintf(attr, "%d", sync_direction);
write(fd, attr, strlen(attr));
close(fd);
}
// set sync_for_cpu
unsigned char attr[1024];
unsigned long sync_for_cpu = 1;
if ((fd = open("/sys/class/u-dma-buf/udmabuf0/sync_for_cpu", O_WRONLY)) != -1) {
sprintf(attr, "%d", sync_for_cpu);
write(fd, attr, strlen(attr));
close(fd);
}
// set sync_for_device
unsigned char attr[1024];
unsigned long sync_for_device = 0;
if ((fd = open("/sys/class/u-dma-buf/udmabuf0/sync_for_device", O_WRONLY)) != -1) {
sprintf(attr, "%d", sync_for_device);
write(fd, attr, strlen(attr));
close(fd);
}

[ikwzm]

Umm...
I do not know what you are doing.
Please show me the source code, not the text.

[zhanghongg]

After obtaining the v4l2 buf, I executed the sync code above

[ikwzm]

After obtaining the v4l2 buf, I executed the sync code above

It does not work at all.

[zhanghongg]

What I would like to know is not so much when, but when are you syncing?

what means？

It does not work at all.

why...

[zhanghongg]

Thank you very much for your answer. The purpose of using udmabuf is to improve the speed of memcpy. What should I do now?